Re: [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 03:19, Richard Henderson wrote: Signed-off-by: Richard Henderson --- accel/tcg/tb-internal.h | 5 ++--- accel/tcg/cputlb.c | 2 +- accel/tcg/tb-maint.c| 4 ++-- 3 files changed, 5 insertions(+), 6 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 03:19, Richard Henderson wrote: Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 3 ++- accel/tcg/tb-maint.c | 10 ++ accel/tcg/translate-all.c | 2 +- accel/tcg/user-exec.c | 4 ++-- system/physmem.c | 2 +- target/arm/helper.c

Re: [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked}

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 03:19, Richard Henderson wrote: Merge tb_invalidate_phys_page_fast__locked into its only caller, tb_invalidate_phys_range_fast. Signed-off-by: Richard Henderson --- accel/tcg/tb-maint.c | 36 +++- 1 file changed, 11 insertions(+), 25 deletions(-)

Re: [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 03:19, Richard Henderson wrote: Signed-off-by: Richard Henderson --- accel/tcg/tb-maint.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 714dcaedc9..e8a465c9ac 100644 --- a/accel/tcg/tb-maint.c +++ b/ac

Re: [PATCH 2/4] meson: Remove CONFIG_STATX and CONFIG_STATX_MNT_ID

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 06:50, Akihiko Odaki wrote: CONFIG_STATX and CONFIG_STATX_MNT_ID are not used since commit 8ab5e8a503b5 ("virtiofsd: Remove build and docs glue"). since commit e0dc2631ec4 ("virtiofsd: Remove source"), otherwise: Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé

Re: [PATCH 1/4] meson: Use has_header_symbol() to check getcpu()

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 06:50, Akihiko Odaki wrote: The use of gnu_source_prefix in the detection of getcpu() was ineffective because the header file that declares getcpu() when _GNU_SOURCE is defined was not included. Pass sched.h to has_header_symbol() so that the existence of the declaration will be proper

[PATCH] vfio: Register/unregister container for CPR only once for each container

2025-04-23 Thread Zhenzhong Duan
vfio_cpr_register_container and vfio_cpr_unregister_container are container scoped function. Calling them for each device attaching/detaching would corrupt CPR reboot notifier list, i.e., when two VFIO devices are attached to same container and have same notifier registered twice. Fixes: d9fa4223b

Re: [PATCH 4/4] meson: Use osdep_prefix for strchrnul()

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 06:50, Akihiko Odaki wrote: macOS SDK may have the symbol of strchrnul(), but it is actually available only on macOS 15.4 or later and that fact is codified in string.h. Include the header file using osdep_prefix to check if the function is available on the deployment target. Signed-o

Re: [PATCH 3/4] meson: Share common C source prefixes

2025-04-23 Thread Philippe Mathieu-Daudé
On 24/4/25 06:50, Akihiko Odaki wrote: gnu_source_prefix defines _GNU_SOURCE for compiler object functions. The definition is universally available in the code base. docs/devel/style.rst also says that the "qemu/osdep.h" header is always included, so files included in the file is also universall

Re: [RFC 05/10] i386/cpu: Introduce cache model for SapphireRapids

2025-04-23 Thread Zhao Liu
Hi Tejus, > Thank you for this improvement! I see that even within the SPR-SP line of > Processors, the cache sizes vary across different models. What happens for > an instance when a processor only has 37.5 MiB of L3 per socket, but the CPU > Model exposes 60 MiB of L3 to the VM? AFAIK, the Linu

Re: [PATCH v3 2/9] add vnc h264 encoder

2025-04-23 Thread Dietmar Maurer
> > > > +VNC_DEBUG("Could not add source to gst pipeline\n"); > > > > +goto error; > > > > +} > > > > + > > > > +gst_object_ref(vs->h264->convert); > > > > +if (!gst_bin_add(GST_BIN(vs->h264->pipeline), vs->h264->convert)) { > > > > > > Can you use gst_bin_add_many() ? >

Re: [PATCH 1/5] qapi/qom: Introduce kvm-pmu-filter object

2025-04-23 Thread Zhao Liu
Hi Markus, > > This is for security purposes, and can restrict Guest users from > > accessing certain sensitive hardware information on the Host via perf or > > PMU counter. > > > > When a PMU event is blocked by KVM, Guest users can't get the > > corresponding event count via perf/PMU counter. >

Re: [PATCH v8 31/55] i386/cpu: introduce x86_confidential_guest_cpu_instance_init()

2025-04-23 Thread Xiaoyao Li
Hi Paolo, On 4/1/2025 9:01 PM, Xiaoyao Li wrote: ... diff --git a/target/i386/cpu.c b/target/i386/cpu.c index add6430f7edd..5c69d1489365 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -36,6 +36,7 @@ #include "hw/qdev-properties.h" #include "hw/i386/topology.h" #ifndef CONFIG_USE

[PULL 136/148] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code()

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Use TCGCPUOps::guest_default_memory_order to set TCGContext::guest_mo. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

2025-04-23 Thread bibo mao
On 2025/4/24 上午10:11, WANG Rui wrote: Hi Song, On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote: 在 2025/4/18 下午4:45, bibo mao 写道: On 2025/4/18 下午4:21, WANG Rui wrote: This patch replaces uses of the generic TRANS macro with TRANS64 for instructions that are only valid when 64-bit support

Re: [RFC 05/10] i386/cpu: Introduce cache model for SapphireRapids

2025-04-23 Thread Tejus GK
On 23/04/25 5:16 PM, Zhao Liu wrote: !---| CAUTION: External Email |---! Add the cache model to SapphireRapids (v4) to better emulate its environment. The cache mo

[PATCH 0/4] meson: Use osdep_prefix for strchrnul()

2025-04-23 Thread Akihiko Odaki
changed, 34 insertions(+), 46 deletions(-) --- base-commit: 1da8f3a3c53b604edfe0d55e475102640490549e change-id: 20250423-buildsys-84d2feefca6b Best regards, -- Akihiko Odaki

[PATCH 4/4] meson: Use osdep_prefix for strchrnul()

2025-04-23 Thread Akihiko Odaki
macOS SDK may have the symbol of strchrnul(), but it is actually available only on macOS 15.4 or later and that fact is codified in string.h. Include the header file using osdep_prefix to check if the function is available on the deployment target. Signed-off-by: Akihiko Odaki --- meson.build |

[PATCH 3/4] meson: Share common C source prefixes

2025-04-23 Thread Akihiko Odaki
gnu_source_prefix defines _GNU_SOURCE for compiler object functions. The definition is universally available in the code base. docs/devel/style.rst also says that the "qemu/osdep.h" header is always included, so files included in the file is also universally available in the code base. Rename gnu

[PATCH 2/4] meson: Remove CONFIG_STATX and CONFIG_STATX_MNT_ID

2025-04-23 Thread Akihiko Odaki
CONFIG_STATX and CONFIG_STATX_MNT_ID are not used since commit 8ab5e8a503b5 ("virtiofsd: Remove build and docs glue"). Signed-off-by: Akihiko Odaki --- meson.build | 10 -- 1 file changed, 10 deletions(-) diff --git a/meson.build b/meson.build index c0ecb6feab77..1a02cd89903b 100644 ---

[PATCH 1/4] meson: Use has_header_symbol() to check getcpu()

2025-04-23 Thread Akihiko Odaki
The use of gnu_source_prefix in the detection of getcpu() was ineffective because the header file that declares getcpu() when _GNU_SOURCE is defined was not included. Pass sched.h to has_header_symbol() so that the existence of the declaration will be properly checked. Signed-off-by: Akihiko Odaki

[PULL 081/148] target/loongarch: Restrict SoftMMU mmu_index() to TCG

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-11-phi...@linaro.org> --- target/loongarch/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/loon

Re: [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

2025-04-23 Thread WANG Rui
On Thu, Apr 24, 2025 at 12:11 PM bibo mao wrote: > > > > On 2025/4/24 上午10:59, WANG Rui wrote: > > Hi Bibo, > > > > On Thu, Apr 24, 2025 at 10:32 AM bibo mao wrote: > >> > >> > >> > >> On 2025/4/24 上午10:11, WANG Rui wrote: > >>> Hi Song, > >>> > >>> On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote:

Re: [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

2025-04-23 Thread bibo mao
On 2025/4/24 上午10:59, WANG Rui wrote: Hi Bibo, On Thu, Apr 24, 2025 at 10:32 AM bibo mao wrote: On 2025/4/24 上午10:11, WANG Rui wrote: Hi Song, On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote: 在 2025/4/18 下午4:45, bibo mao 写道: On 2025/4/18 下午4:21, WANG Rui wrote: This patch replaces

RE: [PATCH v5 06/11] hw/arm/aspeed: Add support for loading vbootrom image via "-bios"

2025-04-23 Thread Jamin Lin
Hi Cedric, > Subject: Re: [PATCH v5 06/11] hw/arm/aspeed: Add support for loading > vbootrom image via "-bios" > > On 4/23/25 09:23, Jamin Lin wrote: > > Introduce "aspeed_load_vbootrom()" to support loading a virtual boot > > ROM image into the vbootrom memory region, using the "-bios" > command

RE: [PATCH v5 03/11] hw/arm/aspeed: Add vbootrom support on AST2700 EVB machines

2025-04-23 Thread Jamin Lin
Hi Cedric, > Subject: Re: [PATCH v5 03/11] hw/arm/aspeed: Add vbootrom support on > AST2700 EVB machines > > On 4/23/25 09:23, Jamin Lin wrote: > > Introduce a new "vbootrom" field in the AspeedMachineClass to indicate > > whether a machine supports the virtual boot ROM region. > > > > Set this f

RE: [PATCH v5 04/11] hw/arm/aspeed: Reuse rom_size variable for vbootrom setup

2025-04-23 Thread Jamin Lin
Hi Cedric, > Subject: Re: [PATCH v5 04/11] hw/arm/aspeed: Reuse rom_size variable for > vbootrom setup > > On 4/23/25 09:23, Jamin Lin wrote: > > Move the declaration of "rom_size" to an outer scope in > > aspeed_machine_init() so it can be reused for setting up the vbootrom region > as well. >

[PULL 141/148] tcg: Pass max_threads not max_cpus to tcg_init

2025-04-23 Thread Richard Henderson
In effect, hoist the check for mttcg from tcg_n_regions() to tcg_init_machine(). Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/tcg/startup.h | 6 +++--- tcg/tcg-internal.h| 2 +- accel/tcg/tcg-all.c | 14 -- t

[PULL 068/148] accel/tcg: Move get_page_addr_code* declarations

2025-04-23 Thread Richard Henderson
Move the declarations from exec/exec-all.h to the private accel/tcg/internal-common.h. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- accel/tcg/internal-common.h | 34 ++ include/exec/exec-all.h | 34 --

[PULL 028/148] include/exec: Inline *_code memory operations

2025-04-23 Thread Richard Henderson
These need to be per-target for 'abi_ptr' and endianness. These expand inline to the *_mmu api with a lookup of the target's cpu_mmu_index() and ra == 0. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 31 +++ accel/tcg/cp

[PULL 042/148] gdbstub: Move syscalls.c out of common_ss

2025-04-23 Thread Richard Henderson
Copy to libuser_ss and libsystem_ss. This file uses semihosting/semihost.h, which has separate implementations with and without CONFIG_USER_ONLY. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- gdbstub/meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) dif

Re: [PATCH v2 08/11] mirror: Skip writing zeroes when target is already zero

2025-04-23 Thread Sunny Zhu
on Thu, 17 Apr 2025 13:39:13 -0500, Eric Blake wrote: > When mirroring, the goal is to ensure that the destination reads the > same as the source; this goal is met whether the destination is sparse > or fully-allocated. However, if the destination cannot efficiently > write zeroes, then any time t

Re: [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

2025-04-23 Thread WANG Rui
Hi Bibo, On Thu, Apr 24, 2025 at 10:32 AM bibo mao wrote: > > > > On 2025/4/24 上午10:11, WANG Rui wrote: > > Hi Song, > > > > On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote: > >> > >> 在 2025/4/18 下午4:45, bibo mao 写道: > >>> > >>> > >>> On 2025/4/18 下午4:21, WANG Rui wrote: > This patch replaces

[PULL 05/13] target/loongarch: Add stub function loongarch_get_addr_from_tlb

2025-04-23 Thread Song Gao
From: Bibo Mao Stub function loongarch_get_addr_from_tlb() is added if option CONFIG_TCG is not enabled, so this function can be called in KVM only mode. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-5-maob...@loongson.cn> Signed-off-by: Song G

[PULL 07/13] target/loongarch: Define function loongarch_get_addr_from_tlb() non-static

2025-04-23 Thread Song Gao
From: Bibo Mao Define function loongarch_get_addr_from_tlb() non-static, and add its definition in header file tcg/tcg_loongarch.h Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-7-maob...@loongson.cn> Signed-off-by: Song Gao --- target/loongar

[PULL 04/13] target/loongarch: Move function get_dir_base_width to common directory

2025-04-23 Thread Song Gao
From: Bibo Mao Function get_dir_base_width() is used by loongarch_page_table_walker(), so it is used by KVM mode also, here move this function from directory tcg to common directory. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-4-maob...@loong

[PULL 131/148] exec: Restrict 'cpu_ldst.h' to accel/tcg/

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Mechanical change using: $ sed -i -e 's,exec/cpu_ldst,accel/tcg/cpu-ldst,' \ $(git grep -l exec/cpu_ldst.h) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- bsd-use

[PULL 00/13] loongarch-to-apply queue

2025-04-23 Thread Song Gao
The following changes since commit 91d0d16b44c93fa82cf76ae12990ce3aa96096c9: Merge tag 'pull-avr-20250422' of https://gitlab.com/rth7680/qemu into staging (2025-04-23 09:29:33 -0400) are available in the Git repository at: https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250424

[PULL 02/13] target/loongarch: Move header file helper.h to directory tcg

2025-04-23 Thread Song Gao
From: Bibo Mao Header file helper.h is specified for tcg mode, move this file to directory tcg. And create new file helper.h to include header file in tcg mode. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-2-maob...@loongson.cn> Signed-off-by:

[PULL 03/13] target/loongarch: Add function loongarch_get_addr_from_tlb

2025-04-23 Thread Song Gao
From: Bibo Mao Function loongarch_get_addr_from_tlb() is added to get physical address from TLB tables. TLB table only works in TCG mode, in future this function will be moved to TCG directory. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-3-ma

[PULL 06/13] target/loongarch: Set function loongarch_map_address() with common code

2025-04-23 Thread Song Gao
From: Bibo Mao Function loongarch_map_address is to get physical address from virtual address, it is used by qmp commands to dump memory from virtual address. It is used by kvm mode also, here move function loongarch_map_address() out of macro CONFIG_TCG. And it is common code, the similar with

[PULL 01/13] hw/intc/loongarch_pch_msi: Remove gpio input handler

2025-04-23 Thread Song Gao
From: Bibo Mao MSI interrupt is triggered by writing message on specified memory address. In generic it is used by PCI devices, and no device is connected pch MSI irqchip with GPIO pin line method, here remove gpio input setting for MSI controller. Signed-off-by: Bibo Mao Reviewed-by: Song Gao

[PULL 09/13] target/loongarch: Add static definition with function loongarch_tlb_search()

2025-04-23 Thread Song Gao
From: Bibo Mao Function loongarch_tlb_search() is only referenced in file tcg/tlb_helper.c, define this function with static attribution. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-9-maob...@loongson.cn> Signed-off-by: Song Gao --- target/

[PULL 08/13] target/loongarch: Move function loongarch_tlb_search to directory tcg

2025-04-23 Thread Song Gao
From: Bibo Mao Function loongarch_tlb_search() and loongarch_map_tlb_entry() works only in TCG mode, move these functions to directory tcg. There is no any function change, only code moving. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250423080417.3739809-8-maob

[PULL 099/148] page-vary: Move and rename qemu_target_page_bits_min

2025-04-23 Thread Richard Henderson
Rename to migration_legacy_page_bits, to make it clear that we cannot change the value without causing a migration break. Move to page-vary.h and page-vary-target.c. Define via TARGET_PAGE_BITS if not TARGET_PAGE_BITS_VARY. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- incl

[PULL 052/148] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h

2025-04-23 Thread Richard Henderson
We were hiding a number of declarations from user-only, although it hurts nothing to allow them. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/exec/cpu-common.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-com

Re: [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel

2025-04-23 Thread Zhao Liu
> > +/* > > + * cache info (L1 cache) > > + * > > + * For !vendor_cpuid_only case, non-AMD CPU would get the wrong > > + * information, i.e., get AMD's cache model. It doesn't matter, > > + * vendor_cpuid_only has been turned on by default since > > +

[PATCH 15/15] accel/tcg: Compile tb-maint.c twice

2025-04-23 Thread Richard Henderson
Signed-off-by: Richard Henderson --- accel/tcg/tb-hash.h | 3 +-- accel/tcg/tb-maint.c | 2 -- accel/tcg/meson.build | 2 +- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h index 3bc5042d9d..f7b159f04c 100644 --- a/accel/tcg/tb-hash.h ++

Re: [RFC PATCH v4 06/19] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries

2025-04-23 Thread Philippe Mathieu-Daudé
On 22/4/25 19:40, Richard Henderson wrote: On 4/22/25 07:54, Philippe Mathieu-Daudé wrote: Since the qemu-system-aarch64 binary is able to run all machines indistinctly, simply register the TYPE_TARGET_AARCH64_MACHINE interface for all existing machines under the hw/arm/ directory. "indistinct

Re: [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

2025-04-23 Thread WANG Rui
Hi Song, On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote: > > 在 2025/4/18 下午4:45, bibo mao 写道: > > > > > > On 2025/4/18 下午4:21, WANG Rui wrote: > >> This patch replaces uses of the generic TRANS macro with TRANS64 for > >> instructions that are only valid when 64-bit support is available. > >> > >>

[PULL 129/148] tcg: Always define TARGET_INSN_START_EXTRA_WORDS

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Do not define TARGET_INSN_START_EXTRA_WORDS under the hood, have each target explicitly define it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/tcg/insn-start-words.h | 4 include/tcg/tcg-o

[PULL 073/148] accel/tcg: Introduce TCGCPUOps::mmu_index() callback

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-3-phi...@linaro.org> --- include/accel/tcg/cpu-mmu-index.h | 5

[PULL 108/148] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier We prepare to remove cpu.h from cpu-all.h, which will transitively remove it from accel/tcg/tb-internal.h, and thus from most of tcg compilation units. Note: this was caught by a test regression for s390x-softmmu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bo

[PULL 100/148] page-vary: Restrict scope of TARGET_PAGE_BITS_MIN

2025-04-23 Thread Richard Henderson
The only place we really need to know the minimum is within page-vary-target.c. Rename the target/arm TARGET_PAGE_BITS_MIN to TARGET_PAGE_BITS_LEGACY to emphasize what it really means. Move the assertions related to minimum page size as well. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard

[PULL 125/148] hw/arm: make most of the compilation units common

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-30-pierrick.bouv...@linaro.org> --- hw/arm/meson.build | 112 ++--- 1 file changed, 56 insertions(+

[PULL 076/148] target/avr: Restrict SoftMMU mmu_index() to TCG

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-6-phi...@linaro.org> --- target/avr/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/avr/cpu.c b

[PULL 139/148] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé By directly using TCGCPUOps::guest_default_memory_order, we don't need the TCG_GUEST_DEFAULT_MO definition anymore. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Signed-off-by: Rich

[PULL 111/148] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-15-pierrick.bouv...@linaro.org> --- include/exec/cpu-all.h | 1 - include/exec/cpu_ldst.h | 1 + targ

[PULL 110/148] exec/cpu-all: remove exec/target_page include

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- accel/tcg/tb-hash.h | 1 + hw/s390x/ipl.h | 1 + include/exec/cpu-all.h | 1 - hw/alpha/dp264.c |

Re: [PATCH v6 6/7] linux-header: update-linux-header script changes

2025-04-23 Thread Eric Farman
On Wed, 2025-04-23 at 17:45 -0400, Rorie Reyes wrote: > Kernel commit 8a14 changed from using ASSEMBLY to ASSEMBLER Kernel commit 8a141be3233a ("x86/headers: Replace __ASSEMBLY__ with __ASSEMBLER__ in UAPI headers") > Updated the update-linux-header script to match > > Signed-off-by: Rorie Reye

[PULL 148/148] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition, have each target set the 'mttcg_supported' field in the TCGCPUOps structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Richard He

[PULL 109/148] exec/cpu-all: remove cpu include

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Now we made sure important defines are included using their direct path, we can remove cpu.h from cpu-all.h. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-14-pierrick.bouv...@linaro.org

[PULL 135/148] tcg: Define guest_default_memory_order in TCGCPUOps

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Add the TCGCPUOps::guest_default_memory_order field and have each target initialize it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/

[PULL 059/148] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h

2025-04-23 Thread Richard Henderson
While setup_post and has_memory will not be used for CONFIG_USER_ONLY, let the struct have constant layout. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/qemu/accel.h | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/include/qemu/accel.h

Re: [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

2025-04-23 Thread gaosong
在 2025/4/18 下午4:45, bibo mao 写道: On 2025/4/18 下午4:21, WANG Rui wrote: This patch replaces uses of the generic TRANS macro with TRANS64 for instructions that are only valid when 64-bit support is available. This improves correctness and avoids potential assertion failures or undefined behavior

[PULL 078/148] target/i386: Remove unused cpu_(ldub, stb)_kernel macros

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-8-phi...@linaro.org> --- target/i386/tcg/seg_helper.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/i386/tcg/s

[PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked

2025-04-23 Thread Richard Henderson
Signed-off-by: Richard Henderson --- accel/tcg/tb-maint.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 714dcaedc9..e8a465c9ac 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1100,9 +1100,12 @@ bool

[PULL 103/148] exec/cpu-all: remove system/memory include

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier We include this header where needed. When includes set already have ifdef CONFIG_USER_ONLY, we add it here, else, we don't condition the include. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.

[PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target

2025-04-23 Thread Richard Henderson
Move the declarations of these functions out of exec/exec-all.h to accel/tcg/internal-common.h. Signed-off-by: Richard Henderson --- accel/tcg/internal-common.h | 3 +++ include/exec/exec-all.h | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/accel/tcg/internal-common.h

[PULL 116/148] target/arm/cpu: flags2 is always uint64_t

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Do not rely on target dependent type, but use a fixed type instead. Since the original type is unsigned, it is safe to extend its size without any side effect. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-

[PULL 049/148] hw/core: Move unconditional files to libsystem_ss, libuser_ss

2025-04-23 Thread Richard Henderson
Many of the headers used by these require CONFIG_USER_ONLY. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- hw/core/meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/core/meson.build b/hw/core/meson.build index b5a545a0ed..547de6527c 10064

[PATCH 00/15] accel/tcg: Compile tb-maint.c twice

2025-04-23 Thread Richard Henderson
More progress for single-binary: build tb-maint.c once for user mode and once for system mode. r~ Richard Henderson (15): accel/tcg: Add CPUState argument to page_unprotect accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind accel/tcg: Add CPUState arg to tb_invalidate_phys

[PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range

2025-04-23 Thread Richard Henderson
Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 3 ++- accel/tcg/tb-maint.c | 10 ++ accel/tcg/translate-all.c | 2 +- accel/tcg/user-exec.c | 4 ++-- system/physmem.c | 2 +- target/arm/helper.c | 2 +- 6 files changed, 13 insertions(+), 10 d

[PULL 051/148] plugins: Move api.c, core.c to libuser_ss, libsystem_ss

2025-04-23 Thread Richard Henderson
Headers used by these files require CONFIG_USER_ONLY. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- plugins/meson.build | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/plugins/meson.build b/plugins/meson.build index 3be8245a69..5383c7b88b 100644 ---

[PULL 064/148] accel/tcg: Pass CPUTLBEntryFull to tlb_reset_dirty_range_locked

2025-04-23 Thread Richard Henderson
While we're renaming things, don't modify addr; save it for reuse in the qatomic_set. Compute the host address into a new local variable. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 20 ++-- 1 file

[PULL 027/148] include/exec: Inline *_data memory operations

2025-04-23 Thread Richard Henderson
These need to be per-target for 'abi_ptr'. Expand inline to the *_data_ra api with ra == 0. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 123 ++-- accel/tcg/ldst_common.c.inc | 89 -- 2

[PULL 060/148] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h

2025-04-23 Thread Richard Henderson
While RISCVCPUConfig.satp_mode is unused for user-only, this header is used from disas/riscv.h, whose users are only built once. The savings of 4 bytes isn't worth it. Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/riscv/cpu_cfg.h | 2 -

[PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked}

2025-04-23 Thread Richard Henderson
Merge tb_invalidate_phys_page_fast__locked into its only caller, tb_invalidate_phys_range_fast. Signed-off-by: Richard Henderson --- accel/tcg/tb-maint.c | 36 +++- 1 file changed, 11 insertions(+), 25 deletions(-) diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb

[PULL 123/148] hw/arm/xlnx-zynqmp: prepare compilation unit to be common

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Remove kvm unused headers. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-28-pierrick.bouv...@linaro.org> --- hw/arm/xlnx-zynqmp.c | 2 -- 1 file ch

[PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h

2025-04-23 Thread Richard Henderson
There's nothing left in internal-target.h that is target specific. Signed-off-by: Richard Henderson --- accel/tcg/internal-common.h | 29 +++ accel/tcg/internal-target.h | 46 - accel/tcg/cpu-exec.c| 1 - accel/tcg/cputlb.c

[PULL 112/148] exec/cpu-all: remove this header

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-16-pierrick.bouv...@linaro.org> --- include/exec/cpu-all.h | 25 - include/hw/core/cpu.h | 2 +- include/qemu/b

Re: [PATCH 10.1 v3 00/27] target/riscv: SATP mode and CPU definition overhaul

2025-04-23 Thread Alistair Francis
On Sun, Apr 6, 2025 at 5:03 PM Paolo Bonzini wrote: > > This is the combination of the previously posted series to store max SATP > mode in RISCVCPUConfig as a single integer, and convert CPU definitions > to a small extension of RISCVCPUConfig called RISCVCPUDef. I put them > together because th

[PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback

2025-04-23 Thread Richard Henderson
Use vaddr instead of target_ulong. At the same time, use int instead of unsigned long for flags, to match page_set_flags(). Signed-off-by: Richard Henderson --- include/user/page-protection.h | 4 +--- accel/tcg/user-exec.c | 10 +- linux-user/elfload.c | 19

[PULL 134/148] tcg: Simplify tcg_req_mo() macro

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Now that TCG_GUEST_DEFAULT_MO is always defined, simplify the tcg_req_mo() macro. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- accel/tcg/inte

[PULL 101/148] exec/cpu-all: move cpu_copy to linux-user/qemu.h

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-3-pierrick.bouv...@linaro.org> --- include/exec/cpu-all.h | 2 -- linux-user/qemu.h | 3 +++ 2 files changed, 3 insertions(+), 2 delet

[PULL 105/148] exec/cpu-all: remove tswap include

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-ID: <20250325045915.994760-7-pierrick.bouv...@linaro.org> --- include/exec/cpu-all.h | 1 - target/ppc/mmu-hash64.h | 2 ++ target/i386/tcg

[PULL 057/148] include/exec: Protect icount_enabled from poisoned symbols

2025-04-23 Thread Richard Henderson
Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/exec/icount.h | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/include/exec/icount.h b/include/exec/icount.h index 4964987ae4..7a26b40084 100644 --- a/include/exec/icount.h +++ b/include/exec/

[PULL 132/148] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h'

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Only 2 files requiring "accel/tcg/cpu-ldst.h" API do not include it: - accel/tcg/cpu-exec.c - target/arm/tcg/sve_helper.c Include it there and remove it from "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard

[PULL 084/148] target/mips: Restrict SoftMMU mmu_index() to TCG

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-14-phi...@linaro.org> --- target/mips/cpu.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/ta

[PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect

2025-04-23 Thread Richard Henderson
In the next patch, page_unprotect will need to pass the CPUState to tb_invalidate_phys_page_unwind. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/user/page-protection.h | 2 +- accel/tcg/user-exec.c | 8 +--- linux-user/elfload.c | 2 +-

[PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast

2025-04-23 Thread Richard Henderson
Signed-off-by: Richard Henderson --- accel/tcg/tb-internal.h | 5 ++--- accel/tcg/cputlb.c | 2 +- accel/tcg/tb-maint.c| 4 ++-- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h index 1078de6c99..40439f03c3 100644 --- a/acce

[PULL 142/148] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h'

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé qemu_tcg_mttcg_enabled() is specific to 1/ TCG and 2/ system emulation. Move the prototype declaration to "system/tcg.h", reducing 'mttcg_enabled' variable scope. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard Henderson Me

[PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc

2025-04-23 Thread Richard Henderson
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition, have each target set the 'precise_smc' field in the TCGCPUOps structure. Signed-off-by: Richard Henderson --- include/accel/tcg/cpu-ops.h | 7 +++ include/exec/poison.h | 1 - target/i386/cpu.h | 4 t

[PULL 127/148] tcg: Include missing 'cpu.h' in translate-all.c

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé tb_check_watchpoint() calls cpu_get_tb_cpu_state(), which is declared in each "cpu.h" header. It is indirectly included via "tcg/insn-start-words.h". Since we want to rework "tcg/insn-start-words.h", removing "cpu.h" in the next commit, add the missing header now, oth

[PULL 094/148] target/hexagon: Implement TCGCPUOps.mmu_index

2025-04-23 Thread Richard Henderson
This hook is about to become mandatory. Since hexagon is still user-only, the implementation is trivial. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Brian Cain Signed-off-by: Richard Henderson --- target/hexagon/cpu.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target/hexag

[PULL 092/148] target/tricore: Restrict SoftMMU mmu_index() to TCG

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-22-phi...@linaro.org> --- target/tricore/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/tricor

[PATCH 13/15] accel/tcg: Use vaddr in user/page-protection.h

2025-04-23 Thread Richard Henderson
Signed-off-by: Richard Henderson --- include/user/page-protection.h | 18 ++-- accel/tcg/user-exec.c | 51 -- 2 files changed, 32 insertions(+), 37 deletions(-) diff --git a/include/user/page-protection.h b/include/user/page-protection.h index 55a

[PULL 119/148] target/arm: Expose Aarch64 helpers unconditionally

2025-04-23 Thread Richard Henderson
From: Philippe Mathieu-Daudé At worst, for 32-bit arm binary, using these methods will now produce a link time error, instead of a compile time one. Signed-off-by: Philippe Mathieu-Daudé Message-ID: <20250403235821.9909-37-phi...@linaro.org> Reviewed-by: Richard Henderson Signed-off-by: Richar

[PULL 120/148] meson: add common hw files

2025-04-23 Thread Richard Henderson
From: Pierrick Bouvier Those files will be compiled once per base architecture ("arm" in this case), instead of being compiled for every variant/bitness of architecture. We make sure to not include target cpu definitions (exec/cpu-defs.h) by defining header guard directly. This way, a given comp

[PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h

2025-04-23 Thread Richard Henderson
Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 4 include/exec/translation-block.h | 4 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 24383b6aba..90986152df 100644 --- a/include/exec/exec-a

  1   2   3   4   5   6   >