Re: [PATCH-for-10.0 2/5] qtest/bios-tables-test: Whitelist aarch64/virt/APIC.its_off blob

2025-04-02 Thread Gustavo Romero
Hi Phil, On 4/2/25 07:31, Philippe Mathieu-Daudé wrote: On 2/4/25 08:43, Gustavo Romero wrote: Hi Phil, On 3/31/25 19:12, Philippe Mathieu-Daudé wrote: Prepare for ACPI table change in aarch64/virt/APIC.its_off. The comment could be smth like: Ignore APIC.its_off expected table (blob) for

Re: [PATCH-for-10.0 5/5] qtest/bios-tables-test: Update aarch64/virt/APIC.its_off blob

2025-04-02 Thread Gustavo Romero
Hi Phil, On 4/2/25 07:34, Philippe Mathieu-Daudé wrote: On 2/4/25 08:45, Gustavo Romero wrote: Hi Phil, On 3/31/25 19:12, Philippe Mathieu-Daudé wrote: Changes in the tables:    @@ -1,32 +1,32 @@     /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20240927 (6

Re: [PATCH-for-10.0 3/5] hw/arm/virt-acpi: Factor its_enabled() helper out

2025-04-02 Thread Gustavo Romero
Hi Phil, On 4/2/25 07:27, Philippe Mathieu-Daudé wrote: On 2/4/25 08:43, Gustavo Romero wrote: Hi Phil, On 3/31/25 19:12, Philippe Mathieu-Daudé wrote: GIC ITS is checked for the MADT and IORT tables. Factor the checks out to the its_enabled() helper. Signed-off-by: Philippe Mathieu-Daudé -

Re: [PATCH-for-10.0 1/5] qtest/bios-tables-test: Add test for -M virt,its=off

2025-04-02 Thread Gustavo Romero
Hi Phil, On 4/2/25 07:30, Philippe Mathieu-Daudé wrote: On 2/4/25 08:41, Gustavo Romero wrote: Hi Phil, On 3/31/25 19:12, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé Please, put commit message (body) into the commits. For example, the commit message here could quic

Re: [PATCH v5 4/4] virtio_net: Add third acceptable configuration for MAC setup.

2025-04-02 Thread Cindy Lu
On Thu, Apr 3, 2025 at 12:36 AM Michael S. Tsirkin wrote: > > On Wed, Mar 26, 2025 at 09:19:33PM +0800, Cindy Lu wrote: > > For VDPA devices, Allow configurations where both the hardware MAC address > > and QEMU command line MAC address are zero. > > > > Signed-off-by: Cindy Lu > > --- > > hw/ne

[PATCH-for-10.1 13/13] hw/arm/virt-acpi: Replace arm_feature() -> arm_cpu_has_feature()

2025-04-02 Thread Philippe Mathieu-Daudé
Using arm_cpu_has_feature() instead of arm_feature() remove a dependency on (the indirectly included) "cpu.h" header. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/virt-acpi-build.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-ac

[PATCH-for-10.1 01/13] target/arm/cpu-features: Include missing 'cpu.h' header

2025-04-02 Thread Philippe Mathieu-Daudé
"target/arm/cpu-features.h" dereferences the ARMISARegisters structure, which is defined in "cpu.h". Include the latter to avoid when refactoring unrelated headers: In file included from target/arm/internals.h:33: target/arm/cpu-features.h:45:54: error: unknown type name 'ARMISARegisters'

Re: [PATCH] Rust: Add tracing and logging support for Rust code

2025-04-02 Thread Paolo Bonzini
Il mar 1 apr 2025, 10:27 Daniel P. Berrangé ha scritto: > This is a non-trivial degradation for the tracing code. The code is > generated in an inline function in the header so that when a probe > point is not active, it has as little overhead as possible - with > some backends it will just a 'no

[PATCH] ui/curses: Fix infinite loop on windows

2025-04-02 Thread William Hu via
>From a42046272f0544dd18ed58661e53ea17d1584c2c Mon Sep 17 00:00:00 2001 From: William Hu Date: Wed, 2 Apr 2025 12:00:00 -0400 Subject: [PATCH] ui/curses: Fix infinite loop on windows Replace -1 comparisons for wint_t with WEOF to fix infinite loop caused by a 65535 == -1 comparison. Resolves: ht

Re: [RFC PATCH-for-10.1 v2 0/7] tcg: Move TCG_GUEST_DEFAULT_MO -> TCGCPUOps::guest_default_memory_order

2025-04-02 Thread Philippe Mathieu-Daudé
On 2/4/25 22:27, Philippe Mathieu-Daudé wrote: On 2/4/25 22:00, Richard Henderson wrote: On 3/21/25 11:15, Philippe Mathieu-Daudé wrote: Since v1: - Do not use tcg_ctx in tcg_req_mo (rth) Hi, In this series we replace the TCG_GUEST_DEFAULT_MO definition from "cpu-param.h" by a 'guest_default_

Re: [PATCH v8 01/28] vfio/container: pass MemoryRegion to DMA operations

2025-04-02 Thread Cédric Le Goater
On 2/19/25 15:48, John Levon wrote: From: Jagannathan Raman Pass through the MemoryRegion to DMA operation handlers of vfio containers. The vfio-user container will need this later. Originally-by: John Johnson Signed-off-by: Jagannathan Raman Signed-off-by: Elena Ufimtseva Signed-off-by: Jo

Re: [PATCH 1/3] target/mips: Revert TARGET_PAGE_BITS_VARY

2025-04-02 Thread Huacai Chen
On Thu, Apr 3, 2025 at 2:11 AM Richard Henderson wrote: > > On 4/1/25 20:04, Huacai Chen wrote: > > Hi, Richard, > > > > On Tue, Apr 1, 2025 at 9:39 PM Richard Henderson > > wrote: > >> > >> On 3/31/25 20:15, Huacai Chen wrote: > # define TARGET_VIRT_ADDR_SPACE_BITS 32 > #endif >

[PATCH-for-10.1 10/13] target/arm: Extract feature definitions to 'cpu_has_feature.h' header

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 54 +- target/arm/cpu_has_feature.h | 65 2 files changed, 66 insertions(+), 53 deletions(-) create mode 100644 target/arm/cpu_has_feature.h diff --git a/tar

Re: [PATCH] hw/arm/virt.c: Fix wrong default cpu type in AARCH64

2025-04-02 Thread Zhang Chen
On Thu, Apr 3, 2025 at 2:43 AM Richard Henderson wrote: > > On 4/2/25 06:54, Zhang Chen wrote: > > Because of the CONFIG_TCG auto enabled, the cpu type "cortex-a15" > > is mistakenly set to the default AARCH64 target. > > This is the correct backward compatible setting. > In essence, it means that

Re: [PATCH v1 13/22] test/qtest: Introduce a new aspeed-hace-utils.c to place common testcases

2025-04-02 Thread Cédric Le Goater
On 3/21/25 10:26, Jamin Lin wrote: The test cases for the ASPEED HACE model were originally placed in aspeed_hace-test.c. However, this test file only supports ARM32. To enable compatibility with all ASPEED SoCs, including the AST2700, which uses the AArch64 architecture, this update introduces a

[PATCH-for-10.1 v2 38/43] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/backend-ldst.h| 41 + accel/tcg/internal-common.h | 27 accel/tcg/internal-target.h | 28 - accel/tcg/cputlb.c | 1 + accel/tcg/user-exec.c

Re: [PATCH-for-10.1 21/43] target/s390x: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
On 2/4/25 23:03, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/s390x/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 1f75629ddc2..320ace67198 100644 --- a/t

Re: [PATCH 1/3] ipmi/bmc-sim: implement watchdog dont log flag

2025-04-02 Thread Corey Minyard
On Mon, Mar 31, 2025 at 10:57:22PM +1000, Nicholas Piggin wrote: > If the dont-log flag is set in the 'timer use' field for the > 'set watchdog' command, a watchdog timeout will not get logged as > a timer use expiration. > > Signed-off-by: Nicholas Piggin > --- > hw/ipmi/ipmi_bmc_sim.c | 7

[PATCH-for-10.1 12/13] hw/arm/realview: Replace arm_feature() -> arm_cpu_has_feature()

2025-04-02 Thread Philippe Mathieu-Daudé
By using arm_cpu_has_feature() instead of arm_feature() we don't need to include "cpu.h" anymore. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/realview.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/arm/realview.c b/hw/arm/realview.c index f81d084eb80..48

[PATCH-for-10.1 03/13] target/arm/kvm: Include missing 'cpu-qom.h' header

2025-04-02 Thread Philippe Mathieu-Daudé
ARMCPU typedef is declared in "cpu-qom.h". Include it in order to avoid when refactoring unrelated headers: target/arm/kvm_arm.h:54:29: error: unknown type name 'ARMCPU' 54 | bool write_list_to_kvmstate(ARMCPU *cpu, int level); | ^ Signed-off-by: Philipp

[PATCH-for-10.1 09/13] target/arm: Extract PSCI definitions to 'psci.h'

2025-04-02 Thread Philippe Mathieu-Daudé
Extract PSCI definitions (which are not target specific) to the new "target/arm/psci.h", so code from hw/arm/ can use them without having to include the target specific "cpu.h" header. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/boot.h | 3 ++- target/arm/cpu.h | 6

[PATCH-for-10.1 02/13] target/arm/qmp: Include missing 'cpu.h' header

2025-04-02 Thread Philippe Mathieu-Daudé
arm-qmp-cmds.c uses ARM_MAX_VQ, which is defined in "cpu.h". Include the latter to avoid when refactoring unrelated headers: target/arm/arm-qmp-cmds.c:83:19: error: use of undeclared identifier 'ARM_MAX_VQ' 83 | QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16); | ^ Signed-off-

[PATCH-for-10.1 06/13] target/arm: Restrict inclusion of 'multiprocessing.h'

2025-04-02 Thread Philippe Mathieu-Daudé
Only cpu.c requires "multiprocessing.h" definitions so far. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 1 - target/arm/cpu.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 88ed06987f3..768e784c3e9 100644 --- a/targe

[PATCH-for-10.1 08/13] hw/arm: Include missing 'target/arm/gtimer.h' header

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed_ast27x0.c| 1 + hw/arm/bcm2838.c | 1 + hw/arm/exynos4210.c| 1 + hw/arm/fsl-imx8mp.c| 1 + hw/arm/mps3r.c | 1 + hw/arm/npcm8xx.c | 1 + hw/vmapple/vmapple.c | 1 + target/arm/tcg/op

[PATCH-for-10.1 11/13] target/arm: Add arm_cpu_has_feature() helper

2025-04-02 Thread Philippe Mathieu-Daudé
arm_cpu_has_feature() is equivalent of arm_feature(), however while the latter uses CPUARMState so is target-specific, the former doesn't and can be called by target-agnostic code in hw/. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu_has_feature.h | 2 ++ target/arm/cpu.c

[PATCH-for-10.1 04/13] target/arm/hvf: Include missing 'cpu-qom.h' header

2025-04-02 Thread Philippe Mathieu-Daudé
ARMCPU typedef is declared in "cpu-qom.h". Include it in order to avoid when refactoring unrelated headers: target/arm/hvf_arm.h:23:41: error: unknown type name 'ARMCPU' 23 | void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu); | ^ Signed-of

[PATCH-for-10.1 00/13] arm: Spring header cleanups

2025-04-02 Thread Philippe Mathieu-Daudé
This series is more useful for heterogeneous emulation preparation than single binary, because it allows non-ARM hw/ code to configure ARM cores, so not using target-specific APIs. I figured some patches could be useful to Pierrick "build hw/arm once" series (in particular arm_cpu_has_feature). Ph

[PATCH-for-10.1 12/43] target/loongarch: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/loongarch/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ea1665e2705..cb96b17911a 100644 --- a/target/loongarch/cpu.c +++ b/target/loon

Re: [PULL 04/23] include/exec: Split out exec/cpu-interrupt.h

2025-04-02 Thread Philippe Mathieu-Daudé
On 2/4/25 20:46, Richard Henderson wrote: On 4/2/25 03:17, Philippe Mathieu-Daudé wrote: Hi Richard, On 8/3/25 23:58, Richard Henderson wrote: Some of these bits are actually common to all cpus; while the reset have common reservations for target-specific usage. While generic code cannot know

[PATCH-for-10.1 v2 00/43] tcg: philmd's queue

2025-04-02 Thread Philippe Mathieu-Daudé
Hi Richard, Here is my patch queue based on your tcg-next tree. Missing review: 38, 41, 43 (all news) Thanks, Phil. Since v1: - Deferred warning change and updated desc (patches 40 & 42) (skipping patches 1-37 because identical of v1: https://lore.kernel.org/qemu-devel/20250402210328.52897-1-

Re: [RFC PATCH-for-10.1 v2 0/7] tcg: Move TCG_GUEST_DEFAULT_MO -> TCGCPUOps::guest_default_memory_order

2025-04-02 Thread Richard Henderson
On 3/21/25 11:15, Philippe Mathieu-Daudé wrote: Since v1: - Do not use tcg_ctx in tcg_req_mo (rth) Hi, In this series we replace the TCG_GUEST_DEFAULT_MO definition from "cpu-param.h" by a 'guest_default_memory_order' field in TCGCPUOps. Since tcg_req_mo() now accesses tcg_ctx, this impact the

[PATCH-for-10.1] hw/intc: Build TYPE_M68K_IRQC with common system objects

2025-04-02 Thread Philippe Mathieu-Daudé
m68k_set_irq_level() prototype doesn't use target-specific types, move its declaration from target-specific "cpu.h" to target-agnostic "cpu-qom.h". Doing so we can remove the "cpu.h" header in m68k_irqc.c, making it target-agnostic, which can be build as part of the system_ss[] source set. Signed-

[PATCH-for-10.1 v2 41/43] tcg: Factor mttcg_init() out

2025-04-02 Thread Philippe Mathieu-Daudé
Keep MTTCG initialization code out of tcg_init_machine(). Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-all.c | 50 + 1 file changed, 28 insertions(+), 22 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 15d4e9232ae.

[PATCH-for-10.1 v2 43/43] target/arm: Update comment around cpu_untagged_addr()

2025-04-02 Thread Philippe Mathieu-Daudé
Since commit f9ba56a03c2 ("user: Introduce 'user/guest-host.h' header") cpu_untagged_addr() is only needed in "user/guest-host.h". Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h in

Re: [PULL 23/29] ui & main loop: Redesign of system-specific main thread event handling

2025-04-02 Thread David Woodhouse
On Tue, 2025-04-01 at 13:58 +0200, Philippe Mathieu-Daudé wrote: > On 1/4/25 13:43, David Woodhouse wrote: > > On Tue, 2025-04-01 at 13:30 +0200, Philippe Mathieu-Daudé wrote: > > > On 1/4/25 13:18, Philippe Mathieu-Daudé wrote: > > > > Hi David, > > > > > > > > On 8/1/25 14:51, David Woodhouse wr

[PATCH-for-10.1 v2 40/43] tcg: Convert TCGState::mttcg_enabled to TriState

2025-04-02 Thread Philippe Mathieu-Daudé
Use the OnOffAuto type as 3-state. Since the TCGState instance is zero-initialized, the mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO). In tcg_init_machine(), if mttcg_enabled is still AUTO, set a default value (effectively inlining the default_mttcg_enabled() method content). In the tcg

[PATCH-for-10.1 v2 42/43] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field

2025-04-02 Thread Philippe Mathieu-Daudé
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition, have each target set the 'mttcg_supported' field in the TCGCPUOps structure. Since so far we only emulate one target architecture at a time, tcg_init_machine() gets whether MTTCG is supported via the current CPU class (CPU_RESOLVIN

Re: [PATCH-for-10.0?] target/riscv: Do not expose rv128 CPU on user mode emulation

2025-04-02 Thread Daniel Henrique Barboza
On 4/2/25 5:51 PM, Philippe Mathieu-Daudé wrote: As Richard mentioned: We should allow RV128 in user-mode at all until there's a kernel abi for it. By the context I suppose Richard said 'We shouldn't allow RV128 ...'. If this was said in a gitlab issue or something it would be nice t

[PATCH-for-10.1 32/43] tcg: Simplify tcg_req_mo() macro

2025-04-02 Thread Philippe Mathieu-Daudé
Now that TCG_GUEST_DEFAULT_MO is always defined, simplify the tcg_req_mo() macro. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 9 + accel/tcg/tcg-all.c | 3 ---

[PATCH-for-10.1 02/43] tcg: Always define TARGET_INSN_START_EXTRA_WORDS

2025-04-02 Thread Philippe Mathieu-Daudé
Do not define TARGET_INSN_START_EXTRA_WORDS under the hood, have each target explicitly define it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/tcg/insn-start-words.h | 4 include/tcg/tcg-op.h | 2 +- target/alpha/cpu-param.h | 2 ++ targ

[PATCH-for-10.1 29/43] exec: Restrict 'cpu_ldst.h' to accel/tcg/

2025-04-02 Thread Philippe Mathieu-Daudé
Mechanical change using: $ sed -i -e 's,exec/cpu_ldst,accel/tcg/cpu-ldst,' \ $(git grep -l exec/cpu_ldst.h) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- bsd-user/qemu.h | 2 +- include/{exec/

[PATCH-for-10.1 42/43] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field

2025-04-02 Thread Philippe Mathieu-Daudé
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition, have each target set the 'mttcg_supported' field in the TCGCPUOps structure. Since so far we only emulate one target architecture at a time, tcg_init_machine() gets whether MTTCG is supported via the &first_cpu global. Signed-off-

[PATCH-for-10.1 41/43] tcg: Factor mttcg_init() out

2025-04-02 Thread Philippe Mathieu-Daudé
Keep MTTCG initialization code out of tcg_init_machine(). Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-all.c | 50 + 1 file changed, 28 insertions(+), 22 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index ae3a137e87f.

[PATCH-for-10.1 08/43] target/hppa: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/hppa/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 0da8cdf41f5..51bff0c5d62 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -257,6 +25

[PATCH-for-10.1 17/43] target/ppc: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/ppc/cpu_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 3686bbc9380..30238e9a223 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_

[PATCH-for-10.1 30/43] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h'

2025-04-02 Thread Philippe Mathieu-Daudé
Only 2 files requiring "accel/tcg/cpu-ldst.h" API do not include it: - accel/tcg/cpu-exec.c - target/arm/tcg/sve_helper.c Include it there and remove it from "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- include/exec/e

[PATCH-for-10.1 26/43] hw/core/cpu: Remove CPUClass::mmu_index()

2025-04-02 Thread Philippe Mathieu-Daudé
All targets have been converted to TCGCPUOps::mmu_index(), remove the now unused CPUClass::mmu_index(). Since this handler is now mandatory, add an assertion in tcg_exec_realizefn(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu-mmu-index.h | 4 +---

[PATCH-for-10.1 25/43] target/xtensa: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/xtensa/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index ec6a0a8b662..51f9ee9e89a 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@

[PATCH-for-10.1 43/43] target/arm: Update comment around cpu_untagged_addr()

2025-04-02 Thread Philippe Mathieu-Daudé
Since commit f9ba56a03c2 ("user: Introduce 'user/guest-host.h' header") cpu_untagged_addr() is only needed in "user/guest-host.h". Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h in

[PATCH-for-10.1 22/43] target/sh4: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/sh4/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index ce84bdf539a..df093988cb1 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -266,6 +266,7 @

[PATCH-for-10.1 18/43] target/riscv: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Move riscv_cpu_mmu_index() to the TCG-specific file, convert CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/riscv/cpu.c | 6 -- target/riscv/tcg/tcg-cpu.c | 6 ++ 2 files changed, 6 insertions(+),

[PATCH-for-10.1 38/43] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/backend-ldst.h| 41 + accel/tcg/internal-common.h | 27 accel/tcg/internal-target.h | 28 - accel/tcg/cputlb.c | 1 + accel/tcg/user-exec.c

[PATCH-for-10.1 40/43] tcg: Convert TCGState::mttcg_enabled to TriState

2025-04-02 Thread Philippe Mathieu-Daudé
Use the OnOffAuto type as 3-state. Since the TCGState instance is zero-initialized, the mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO). In tcg_init_machine(), if mttcg_enabled is still AUTO, set a default value (effectively inlining the default_mttcg_enabled() method content). Instead of

[PATCH-for-10.1 37/43] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally

2025-04-02 Thread Philippe Mathieu-Daudé
By directly using TCGCPUOps::guest_default_memory_order, we don't need the TCG_GUEST_DEFAULT_MO definition anymore. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- docs/devel/multi-thread-tcg.rst | 4 ++-- ta

[PATCH-for-10.1 13/43] target/m68k: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/m68k/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 0065e1c1ca5..4409d8941ce 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -592,6 +59

[PATCH-for-10.1 34/43] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code()

2025-04-02 Thread Philippe Mathieu-Daudé
Use TCGCPUOps::guest_default_memory_order to set TCGContext::guest_mo. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/translate-all.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c ind

[PATCH-for-10.1 24/43] target/tricore: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/tricore/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 16acc4ecb92..833a93d37af 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.

[PATCH-for-10.1 35/43] tcg: Propagate CPUState argument to cpu_req_mo()

2025-04-02 Thread Philippe Mathieu-Daudé
In preparation of having tcg_req_mo() access CPUState in the next commit, pass it to cpu_req_mo(), its single caller. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/internal-target.h | 3 ++- accel/tcg/cputlb.c | 20 ++-- accel/tcg/u

[PATCH-for-10.1 09/43] target/i386: Remove unused cpu_(ldub, stb)_kernel macros

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/i386/tcg/seg_helper.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/i386/tcg/seg_helper.h b/target/i386/tcg/seg_helper.h index ebf10352778..6b8606cd6d8 100644 --- a/target/i386/tcg/seg_helper.h +++

[PATCH-for-10.1 27/43] exec: Restrict cpu-mmu-index.h to accel/tcg/

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/{exec => accel/tcg}/cpu-mmu-index.h | 6 +++--- include/exec/cpu_ldst.h | 2 +- accel/tcg/translator.c | 2 +- semihosting/uaccess.c | 2 +- target/arm/

[PATCH-for-10.1 15/43] target/mips: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 47df563e123..269d3d69bd5 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -554,6 +55

[PATCH-for-10.1 11/43] target/i386: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Move x86_cpu_mmu_index() to tcg-cpu.c, convert CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/i386/cpu.h| 2 -- target/i386/tcg/tcg-cpu.h| 2 ++ target/i386/cpu.c| 18

[PATCH-for-10.1 20/43] target/rx: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/rx/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 723262f4b54..e14d9cbef93 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -208,6 +208,7 @@ sta

[PATCH-for-10.1 16/43] target/openrisc: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/openrisc/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index e8abf1f8b5c..dc55594a7de 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc

[PATCH-for-10.1 03/43] hw/core/cpu: Update CPUClass::mmu_index docstring

2025-04-02 Thread Philippe Mathieu-Daudé
Since commits 32a8ea12fab..90b7022e698 (target: "Split out TARGET_env_mmu_index"), target's memory_rw_debug() callbacks use the target's TARGET_env_mmu_index(), not the generic CPUClass::mmu_index() callback. Update the documentation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Hen

[PATCH-for-10.1 14/43] target/microblaze: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/microblaze/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f3bebea856e..88baeb6807a 100644 --- a/target/microblaze/cpu.c +++ b/target/

[PATCH-for-10.1 06/43] target/arm: Restrict SoftMMU mmu_index() to TCG

2025-04-02 Thread Philippe Mathieu-Daudé
Move arm_cpu_mmu_index() within CONFIG_TCG #ifdef'ry and expose its prototype in "target/arm/internals.h". Convert CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/internals.h | 1 + target/arm/cpu.c

[PATCH-for-10.1 00/43] tcg: philmd's queue

2025-04-02 Thread Philippe Mathieu-Daudé
Hi Richard, Here is my patch queue based on your tcg-next tree. Missing review: 38, 41, 43 (all news) Thanks, Phil. Philippe Mathieu-Daudé (43): tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h' tcg: Always define TARGET_INSN_START_EXTRA_WORDS hw/core/cpu: Update CPUClass::mmu_

[PATCH-for-10.1 04/43] accel/tcg: Introduce TCGCPUOps::mmu_index() callback

2025-04-02 Thread Philippe Mathieu-Daudé
We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/accel/tcg/cpu-ops.h | 3 +++ include/exec/cpu-mmu-index.h | 5 - 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/accel/tcg/cpu-

[PATCH-for-10.0?] target/riscv: Do not expose rv128 CPU on user mode emulation

2025-04-02 Thread Philippe Mathieu-Daudé
As Richard mentioned: We should allow RV128 in user-mode at all until there's a kernel abi for it. Remove the experimental 'x-rv128' CPU on user emulation (since it is experimental, no deprecation period is required). Reported-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé ---

Re: [RFC PATCH-for-10.1 v2 0/7] tcg: Move TCG_GUEST_DEFAULT_MO -> TCGCPUOps::guest_default_memory_order

2025-04-02 Thread Philippe Mathieu-Daudé
On 2/4/25 22:00, Richard Henderson wrote: On 3/21/25 11:15, Philippe Mathieu-Daudé wrote: Since v1: - Do not use tcg_ctx in tcg_req_mo (rth) Hi, In this series we replace the TCG_GUEST_DEFAULT_MO definition from "cpu-param.h" by a 'guest_default_memory_order' field in TCGCPUOps. Since tcg_req

Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h

2025-04-02 Thread Philippe Mathieu-Daudé
On 2/4/25 20:33, Richard Henderson wrote: On 4/2/25 04:26, Philippe Mathieu-Daudé wrote: Hi Richard, On 18/3/25 22:31, Richard Henderson wrote: The implementation of cpu_mmu_index was split between cpu-common.h and cpu-all.h, depending on CONFIG_USER_ONLY.  We already have the plumbing common

Re: [PULL 04/23] include/exec: Split out exec/cpu-interrupt.h

2025-04-02 Thread Richard Henderson
On 4/2/25 03:17, Philippe Mathieu-Daudé wrote: Hi Richard, On 8/3/25 23:58, Richard Henderson wrote: Some of these bits are actually common to all cpus; while the reset have common reservations for target-specific usage. While generic code cannot know what the target-specific usage is, common c

Re: [PATCH 1/2] hvf: avoid repeatedly setting trap debug for each cpu

2025-04-02 Thread Daniel Gomez
On Wed, Apr 02, 2025 at 03:52:28PM +0100, Mads Ynddal wrote: > From: Mads Ynddal > > hvf_arch_set_traps is already called from a context of a specific > CPUState, so we don't need to do a nested CPU_FOREACH. > > It also results in an error from hv_vcpu_set_sys_reg, as it may only be > called fro

Re: [PATCH for-10.1 v9 0/9] virtio-net: add support for SR-IOV emulation

2025-04-02 Thread Pasha Tatashin
On Fri, Mar 14, 2025 at 2:15 AM Akihiko Odaki wrote: > > Based-on: <20250104-reuse-v18-0-c349eafd8...@daynix.com> > ("[PATCH v18 00/14] hw/pci: SR-IOV related fixes and improvements") > > Introduction > > > This series is based on the RFC series submitted by Yui Washizu[1]. > See also

Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h

2025-04-02 Thread Richard Henderson
On 4/2/25 04:26, Philippe Mathieu-Daudé wrote: Hi Richard, On 18/3/25 22:31, Richard Henderson wrote: The implementation of cpu_mmu_index was split between cpu-common.h and cpu-all.h, depending on CONFIG_USER_ONLY.  We already have the plumbing common to user and system mode.  Using MMU_USER_ID

Re: [PATCH v8 04/28] vfio: add vfio_attach_device_by_iommu_type()

2025-04-02 Thread Cédric Le Goater
On 2/19/25 15:48, John Levon wrote: Allow attachment by explicitly passing a TYPE_VFIO_IOMMU_* string; vfio-user will use this later. Signed-off-by: John Levon --- hw/vfio/common.c | 30 +++--- include/hw/vfio/vfio-common.h | 3 +++ 2 files changed, 22

Re: [PATCH v8 03/28] vfio/container: support VFIO_DMA_UNMAP_FLAG_ALL

2025-04-02 Thread Cédric Le Goater
On 2/19/25 15:48, John Levon wrote: Some containers can directly implement unmapping all regions; add a new flag to support this. Originally-by: John Johnson Signed-off-by: Elena Ufimtseva Signed-off-by: Jagannathan Raman Signed-off-by: John Levon --- hw/vfio/common.c

Re: [PATCH v5 4/4] virtio_net: Add third acceptable configuration for MAC setup.

2025-04-02 Thread Michael S. Tsirkin
On Wed, Mar 26, 2025 at 09:19:33PM +0800, Cindy Lu wrote: > For VDPA devices, Allow configurations where both the hardware MAC address > and QEMU command line MAC address are zero. > > Signed-off-by: Cindy Lu > --- > hw/net/virtio-net.c | 13 + > 1 file changed, 13 insertions(+) > >

Re: [PATCH v5 3/4] virtio_net: Add second acceptable configuration for MAC setup

2025-04-02 Thread Michael S. Tsirkin
On Wed, Mar 26, 2025 at 09:19:32PM +0800, Cindy Lu wrote: > For VDPA devices, Allow configurations where the hardware MAC address > is non-zero while the MAC address in the QEMU command line is zero. > > Signed-off-by: Cindy Lu > --- > hw/net/virtio-net.c | 14 ++ > 1 file changed, 1

Re: [PATCH v5 2/4] virtio_net: Add the check for vdpa's mac address

2025-04-02 Thread Michael S. Tsirkin
On Wed, Mar 26, 2025 at 09:19:31PM +0800, Cindy Lu wrote: > When using a VDPA device, it is important to ensure that the MAC > address is correctly set. The MAC address in the hardware should > match the MAC address from the QEMU command line. This is a recommended > configuration and will allow th

Re: [PATCH v2 1/2] target/hexagon: Replace `prepare` script with meson target

2025-04-02 Thread Brian Cain
On 4/2/2025 6:42 AM, Anton Johansson wrote: The purpose of the prepare script is to invoke `cpp` to preprocess input to idef-parser by expanding a few select macros. On macOS `cpp` expands into `clang ... -traditional-cpp` which breaks macro concatenation. Replace `cpp` with `${compiler} -E`

Re: [PATCH v2 2/2] target/hexagon: Only indent on linux

2025-04-02 Thread Brian Cain
On 4/2/2025 6:42 AM, Anton Johansson wrote: indent on macOS, installed via homebrew, doesn't support -linux. Only run indent on linux hosts. Signed-off-by: Anton Johansson --- Reviewed-by: Brian Cain target/hexagon/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) d

Re: [PATCH for-10.1 v2 28/37] vfio: Make vfio_container_query_dirty_bitmap() static

2025-04-02 Thread Joao Martins
On 26/03/2025 07:51, Cédric Le Goater wrote: > vfio_container_query_dirty_bitmap() is only used in "container-base.c". > Also, rename to vfio_container_vioc_query_dirty_bitmap() to reflect it > is using the VFIO IOMMU backend device ->query_dirty_bitmap() handler. > > Signed-off-by: Cédric Le Goat

[ANNOUNCE] QEMU 10.0.0-rc2 is now available

2025-04-02 Thread Michael Roth
Hello, On behalf of the QEMU Team, I'd like to announce the availability of the third release candidate for the QEMU 10.0 release. This release is meant for testing purposes and should not be used in a production environment. http://download.qemu.org/qemu-10.0.0-rc2.tar.xz http://download.qem

Re: [PATCH v5 49/65] i386/tdx: handle TDG.VP.VMCALL

2025-04-02 Thread Daniel P . Berrangé
On Wed, Apr 02, 2025 at 11:26:11PM +0800, Xiaoyao Li wrote: > Sorry for the late response. > > KVM part of TDX attestation support is submitting again. QEMU part will > follow and we need to settle dowm this topic before QEMU patches submission. > > On 10/4/2024 2:08 AM, Daniel P. Berrangé wrote:

Re: [PATCH 05/18] target/arm: Move CPU QOM type definitions to "hw/arm/cpu.h"

2025-04-02 Thread Pierrick Bouvier
On 4/1/25 21:06, Philippe Mathieu-Daudé wrote: Cc'ing Pierrick On 12/1/23 08:17, Philippe Mathieu-Daudé wrote: On 11/1/23 21:02, Richard Henderson wrote: On 1/10/23 08:43, Philippe Mathieu-Daudé wrote: +++ b/target/arm/cpu.h @@ -26,6 +26,7 @@   #include "cpu-qom.h"   #include "exec/cpu-defs

Re: [PATCH v5 49/65] i386/tdx: handle TDG.VP.VMCALL

2025-04-02 Thread Xiaoyao Li
Sorry for the late response. KVM part of TDX attestation support is submitting again. QEMU part will follow and we need to settle dowm this topic before QEMU patches submission. On 10/4/2024 2:08 AM, Daniel P. Berrangé wrote: On Thu, Feb 29, 2024 at 01:37:10AM -0500, Xiaoyao Li wrote: From:

Re: [PATCH v2 20/30] target/arm/cpu: always define kvm related registers

2025-04-02 Thread Pierrick Bouvier
On 4/2/25 06:36, Philippe Mathieu-Daudé wrote: On 25/3/25 02:24, Richard Henderson wrote: On 3/24/25 14:11, Pierrick Bouvier wrote: On 3/23/25 12:37, Richard Henderson wrote: On 3/20/25 15:29, Pierrick Bouvier wrote: This does not hurt, even if they are not used. Signed-off-by: Pierrick Bouv

Re: [PATCH v8 05/55] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES

2025-04-02 Thread Xiaoyao Li
On 4/2/2025 7:00 PM, Daniel P. Berrangé wrote: On Tue, Apr 01, 2025 at 09:01:15AM -0400, Xiaoyao Li wrote: KVM provides TDX capabilities via sub command KVM_TDX_CAPABILITIES of IOCTL(KVM_MEMORY_ENCRYPT_OP). Get the capabilities when initializing TDX context. It will be used to validate user's se

Re: [PATCH v3 2/3] include: Add a header to define host PCI MMIO functions

2025-04-02 Thread Stefan Hajnoczi
On Tue, Apr 01, 2025 at 10:22:45AM -0700, Farhan Ali wrote: > Add a generic API for host PCI MMIO reads/writes > (e.g. Linux VFIO BAR accesses). The functions access > little endian memory and returns the result in > host cpu endianness. > > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Fa

[PATCH] hw/arm/virt.c: Fix wrong default cpu type in AARCH64

2025-04-02 Thread Zhang Chen
Because of the CONFIG_TCG auto enabled, the cpu type "cortex-a15" is mistakenly set to the default AARCH64 target. Signed-off-by: Zhang Chen --- hw/arm/virt.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a96452f17a..63649e9543 10064

[PATCH 1/2] hvf: avoid repeatedly setting trap debug for each cpu

2025-04-02 Thread Mads Ynddal
From: Mads Ynddal hvf_arch_set_traps is already called from a context of a specific CPUState, so we don't need to do a nested CPU_FOREACH. It also results in an error from hv_vcpu_set_sys_reg, as it may only be called from the thread owning the vCPU. Tested-by: Daniel Gomez Signed-off-by: Mads

Re: [PATCH for-10.1 v2 10/37] vfio: Introduce a new header file for VFIOIOMMUFD declarations

2025-04-02 Thread Joao Martins
On 26/03/2025 07:50, Cédric Le Goater wrote: > Gather all VFIOIOMMUFD related declarations introduced by commits > 5ee3dc7af785 ("vfio/iommufd: Implement the iommufd backend") and > 5b1e96e65403 ("vfio/iommufd: Introduce auto domain creation") into > "vfio-iommufd.h". This to reduce exposure of VFI

Re: [PATCH for-10.1 v2 32/37] vfio: Introduce new files for VFIO MemoryListener

2025-04-02 Thread Joao Martins
On 26/03/2025 07:51, Cédric Le Goater wrote: > File "common.c" has been emptied of most of its definitions by the > previous changes and the only definitions left are related to the VFIO > MemoryListener handlers. Rename it to "listener.c" and introduce its > associated "vfio-listener.h" header fil

Re: [PATCH for-10.1 v2 27/37] vfio: Make vfio_devices_query_dirty_bitmap() static

2025-04-02 Thread Joao Martins
On 26/03/2025 07:51, Cédric Le Goater wrote: > vfio_devices_query_dirty_bitmap() is only used in "container-base.c". > Also, rename to vfio_container_devices_query_dirty_bitmap() to reflect > with the prefix 'vfio_container_devices_' that it simply loops over > the container's device list. > > Thi

Re: [PATCH for-10.1 v2 31/37] vfio: Rename vfio_get_dirty_bitmap()

2025-04-02 Thread Joao Martins
On 26/03/2025 07:51, Cédric Le Goater wrote: > vfio_container_query_dirty_bitmap() is consistent the VFIO container > routine naming scheme and is now free to use. > > Signed-off-by: Cédric Le Goater Reviewed-by: Joao Martins > --- > include/hw/vfio/vfio-container-base.h | 4 ++-- > hw/vfio/c

[PATCH v3] hw/rtc: Add RTC PCF8563 module

2025-04-02 Thread Ilya Chichkov
Add PCF8563 a real-time clock with calendar and I2C interface. This commit adds support for interfacing with it and implements functionality of setting timer, alarm, reading and writing time. Add a unit test for pcf8563_rtc module, that checks: - default value after initialization - set/get time

Re: [PATCH v2 20/30] target/arm/cpu: always define kvm related registers

2025-04-02 Thread Philippe Mathieu-Daudé
On 25/3/25 02:24, Richard Henderson wrote: On 3/24/25 14:11, Pierrick Bouvier wrote: On 3/23/25 12:37, Richard Henderson wrote: On 3/20/25 15:29, Pierrick Bouvier wrote: This does not hurt, even if they are not used. Signed-off-by: Pierrick Bouvier ---    target/arm/cpu.h | 2 --    1 file ch

Re: [PATCH for-10.1 v2 29/37] vfio: Rename vfio_devices_all_dirty_tracking_started()

2025-04-02 Thread Joao Martins
On 26/03/2025 07:51, Cédric Le Goater wrote: > Also rename vfio_devices_all_device_dirty_tracking_started() while at > it and use the prefix 'vfio_container_devices_' for routines simply > looping over the container's device list. > > Signed-off-by: Cédric Le Goater Much better name indeed:

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