On 3/21/25 11:15, Philippe Mathieu-Daudé wrote:
In preparation of having tcg_req_mo() access CPUState in
the next commit, pass it to cpu_req_mo(), its single caller.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-target.h | 3 ++-
accel/tcg/cputlb.c | 20 ++
On Fri, Mar 21, 2025 at 12:29 PM Konstantin Shkolnyy wrote:
>
> On 3/20/2025 20:22, Jason Wang wrote:
> > On Fri, Mar 21, 2025 at 12:45 AM Konstantin Shkolnyy
> > wrote:
> >>
> >> On 3/19/2025 19:58, Jason Wang wrote:
> >>> On Thu, Mar 20, 2025 at 12:34 AM Konstantin Shkolnyy
> >>> wrote:
> >>
On 23/03/2025 22.35, Daan De Meyer wrote:
We have to make sure the array of bytes read from the path= file
is null-terminated, otherwise we run into a buffer overrun later on.
Fixes: bb99f4772f54017490e3356ecbb3df25c5d4537f ("hw/smbios: support loading OEM
strings values from a file")
Resolves:
On Sun, Mar 23, 2025 at 4:36 PM hemanshu.khilari.foss
wrote:
>
> The links to riscv iommu specification document are incorrect. This patch
> updates all the said link to point to correct location.
>
> Cc: qemu-ri...@nongnu.org
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2808
> Signed
Add testcases for testing fadump with PSeries and PSeries+KVM
combinations
It tests if fadump is successfully detected and registered in the first
kernel boot. Then crashes the kernel, and verifies whether we have a
/proc/vmcore in the 2nd boot
Also introduce 'wait_for_regex_console_pattern' to c
Prepare for offset_io being non-zero in do_stb.
Signed-off-by: Richard Henderson
---
target/avr/helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 9608e59584..3323f32c22 100644
--- a/target/avr/helper.c
+++ b/target/avr/
Bibo Mao writes:
> In function virt_cpu_plug() and virt_cpu_unplug(), the error is
> impossile. Destination error is not propagated and replaced with
> error_abort. With this, the logic is simple.
>
> Signed-off-by: Bibo Mao
I did not double-check myself that errors are impossible.
Acked-by: M
Bibo Mao writes:
> In function virt_cpu_plug(), Object cpuslot::cpu is set at last
> only when there is no any error, otherwise it is problematic that
> cpuslot::cpu is set in advance however it returns because of error.
>
> Fixes: ab9935d2991e (hw/loongarch/virt: Implement cpu plug interface)
>
On 23/03/2025 16.30, Philippe Mathieu-Daudé wrote:
Fixes: 41868f846d2 ("s390x/cpumodel: "host" and "qemu" as CPU subclasses")
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.
The following changes since commit 527dede083d3e3e5a13ee996776926e0a0c4e258:
Merge tag 'pull-request-2025-03-19' of https://gitlab.com/thuth/qemu into
staging (2025-03-20 08:41:25 -0400)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-aspee
On 3/21/25 08:59, Philippe Mathieu-Daudé wrote:
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.
Since so far we only emulate one target architecture at a time,
tcg_init_machine() gets whether MTTCG is
Do not unconditionally attempt to read 4 bytes, as there
may only be 2 bytes remaining in the translator cache.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Richard Henderson
---
target/avr/disas.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/target/avr
On 3/20/25 15:30, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
hw/arm/xlnx-zynqmp.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index d6022ff2d3d..ec2b3a41eda 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -2
Register sparc_cpu_list() as CPUClass:list_cpus callback
and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.h | 1 -
target/s390x/cpu.c | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 5b
On 3/20/2025 11:15 AM, Chenyi Qiang wrote:
>
>
> On 3/19/2025 7:56 PM, Gupta, Pankaj wrote:
>> On 3/19/2025 12:23 PM, Chenyi Qiang wrote:
>>>
>>>
>>> On 3/19/2025 4:55 PM, Gupta, Pankaj wrote:
>> As the commit 852f0048f3 ("RAMBlock: make guest_memfd require
>> uncoordinate
For single-binary, we would really like to have a common
TARGET_PAGE_BITS_MIN. A value of 10 will suffice for armv4
and will just fit required page flags and alignment.
AVR's use of TARGET_PAGE_BITS == 8 is unfortunate, and is due to
having memory mapped i/o in the first 256 or 512 bytes and sram
Platform (ie. QEMU) is expected to pass few device tree properties for
details for fadump:
* "ibm,configure-kernel-dump-sizes": Space required to store dump data
for firmware provided dump sections (ie. CPU & HPTE regions)
* "ibm,configure-kernel-dump-version": Versions of fadump supported
Register ppc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/ppc/cpu.h | 4
target/ppc/cpu_init.c | 3 ++-
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/ppc/cpu.h b/
'cpu_list' might be defined per target, and force code to be
built per-target. We can avoid that by introducing a CPUClass
callback.
This series combined with another which converts CPU_RESOLVING_TYPE
to a runtime helper, allows to move most of cpu-target to common.
Philippe Mathieu-Daudé (6):
On 23/3/25 18:37, Richard Henderson wrote:
Match the prototype of cpu_memory_rw_debug().
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 2 +-
target/sparc/cpu.h| 2 +-
target/sparc/mmu_helper.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
Reviewed-by
On Sat, Mar 22, 2025 at 4:03 AM Michael Tokarev wrote:
>
> On 06.03.2025 09:46, Deepak Gupta wrote:
> > Commit:8205bc1 ("target/riscv: introduce ssp and enabling controls for
> > zicfiss") introduced CSR_SSP but it mis-interpreted the spec on access
> > to CSR_SSP in M-mode. Gated to CSR_SSP is no
In function virt_cpu_plug() and virt_cpu_unplug(), the error is
impossile. Destination error is not propagated and replaced with
error_abort. With this, the logic is simple.
Also there is bugfix in function virt_cpu_plug(), Object cpuslot::cpu is
set at last only when there is no any error.
---
In function virt_cpu_plug() and virt_cpu_unplug(), the error is
impossile. Destination error is not propagated and replaced with
error_abort. With this, the logic is simple.
Signed-off-by: Bibo Mao
---
hw/loongarch/virt.c | 39 +++
1 file changed, 7 insertions
On Sun, Mar 23, 2025 at 4:36 PM hemanshu.khilari.foss
wrote:
>
> The links to riscv iommu specification document are incorrect. This patch
> updates all the said link to point to correct location.
>
> Cc: qemu-ri...@nongnu.org
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2808
> Signed
On Sun, 23 Mar 2025, Philippe Mathieu-Daudé wrote:
On 23/3/25 20:07, Richard Henderson wrote:
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 28fbbb8d3c1..ed79cc1a6b7 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7490,6 +7490,7 @@ static const TCGCPUOps ppc_
Register x86_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/cpu.h | 3 ---
target/i386/cpu.c | 3 ++-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.h b/target/i
Register sparc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/sparc/cpu.h | 3 ---
target/sparc/cpu.c | 3 ++-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/sparc/cpu.h b/tar
On 3/20/25 05:43, Paolo Bonzini wrote:
Targets know whether they are big-endian more than they know if
the endianness is different from the host: the former is mostly
a constant, at least in machine creation code, while the latter
has to be computed with TARGET_BIG_ENDIAN != HOST_BIG_ENDIAN or
so
On Mon, Mar 24, 2025 at 12:03 AM hemanshu.khilari.foss
wrote:
>
> Added docs/specs/riscv-iommu.rst under `RISC-V TCG CPUs` section in
> in MAINTAINERS file since
> `scripts/get_maintainer.pl -f docs/specs/riscv-iommu.rst` doesn't list any
> maintainers.
>
> Signed-off-by: hemanshu.khilari.foss
R
On 23/3/25 23:13, BALATON Zoltan wrote:
On Sun, 23 Mar 2025, Philippe Mathieu-Daudé wrote:
On 23/3/25 20:07, Richard Henderson wrote:
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 28fbbb8d3c1..ed79cc1a6b7 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7490
On 3/21/25 11:15, Philippe Mathieu-Daudé wrote:
In order to use TCG with multiple targets, replace the
compile time use of TCG_GUEST_DEFAULT_MO by a runtime access
to TCGCPUOps::guest_default_memory_order via CPUState.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-target.h | 9
On 3/21/25 08:59, Philippe Mathieu-Daudé wrote:
qemu_tcg_mttcg_enabled() is specific to 1/ TCG and
2/ system emulation. Move the prototype declaration
to "system/tcg.h", reducing 'mttcg_enabled' variable
scope.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/core/cpu.h | 9
On Mon, 24 Mar 2025, Philippe Mathieu-Daudé wrote:
The break in the QEMU_OPTION_machine case is mis-placed.
Not a big deal, since producing the same outcome, but
suspicious, so put it in the correct place.
Why is it misplaced? It's at the end of the block. This swich has other
cases that put
On Mon, Mar 24, 2025 at 12:03 AM hemanshu.khilari.foss
wrote:
>
> Added docs/specs/riscv-iommu.rst under `RISC-V TCG CPUs` section in
> in MAINTAINERS file since
> `scripts/get_maintainer.pl -f docs/specs/riscv-iommu.rst` doesn't list any
> maintainers.
>
> Signed-off-by: hemanshu.khilari.foss
T
On 3/20/25 15:29, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
hw/arm/armv7m.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 98a69846119..c367c2dcb99 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@
We have to make sure the array of bytes read from the path= file
is null-terminated, otherwise we run into a buffer overrun later on.
Fixes: bb99f4772f54017490e3356ecbb3df25c5d4537f ("hw/smbios: support loading
OEM strings values from a file")
Resolves: https://gitlab.com/qemu-project/qemu/-/issu
On 3/20/25 15:29, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
hw/arm/digic_boards.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 2492fafeb85..466b8b84c0e 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/
On 23/3/25 18:37, Richard Henderson wrote:
This define isn't really used.
Signed-off-by: Richard Henderson
---
target/avr/cpu.h| 2 --
target/avr/helper.c | 3 +--
2 files changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
hw/avr/atmega.h | 20
hw/avr/atmega.c | 22 +-
2 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/hw/avr/atmega.h b/hw/avr/atmega.h
index a99ee15c7e..f031e6c10a 100644
--- a/hw/avr/atmega.h
+++ b/hw/avr/at
On 3/21/25 08:59, Philippe Mathieu-Daudé wrote:
Use the OnOffAuto type as 3-state.
Since the TCGState instance is zero-initialized, the
mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO).
In tcg_init_machine(), if mttcg_enabled is still AUTO,
set a default value (effectively inlining the
de
Not that AVR has memory paging traps, but it's better
form to allow the memory operation to finish before
updating the cpu register.
Signed-off-by: Richard Henderson
---
target/avr/translate.c | 32 +++-
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git a/
On 3/20/25 15:29, Pierrick Bouvier wrote:
Now we eliminated poisoned identifiers from headers, this file can now
be compiled once for all arm targets.
Signed-off-by: Pierrick Bouvier
---
hw/arm/boot.c | 1 +
hw/arm/meson.build | 5 -
2 files changed, 5 insertions(+), 1 deletion(-)
We only use qemu_get_betl() and qemu_put_betl() once in
the whole code base. Inline them (checking TARGET_SPARC64
instead of TARGET_LONG_BITS == 64) so we can remove them
later as unused.
Signed-off-by: Philippe Mathieu-Daudé
---
target/sparc/machine.c | 14 --
1 file changed, 12 ins
Fixes: 41868f846d2 ("s390x/cpumodel: "host" and "qemu" as CPU subclasses")
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index d73142600bf..1f75629ddc2 100644
--- a/target/s3
On Sunday, March 16, 2025 1:20:46 AM CET BALATON Zoltan wrote:
> Quoting Volker Rümelin: "try-poll=on tells the ALSA backend to try to
> use an event loop instead of the audio timer. This works most of the
> time. But the poll event handler in the ALSA backend has a bug. For
> example, if the guest
Added docs/specs/riscv-iommu.rst under `RISC-V TCG CPUs` section in
in MAINTAINERS file since
`scripts/get_maintainer.pl -f docs/specs/riscv-iommu.rst` doesn't list any
maintainers.
Signed-off-by: hemanshu.khilari.foss
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINE
> -Original Message-
> From: ltaylorsimp...@gmail.com
> Sent: Monday, March 17, 2025 12:44 PM
> To: 'Brian Cain' ; qemu-devel@nongnu.org
> Cc: richard.hender...@linaro.org; phi...@linaro.org; Matheus Bernardino
> (QUIC) ; a...@rev.ng; a...@rev.ng; Marco
> Liebel (QUIC) ; alex.ben...@lina
On Sun, 16 Mar 2025, BALATON Zoltan wrote:
Quoting Volker Rümelin: "try-poll=on tells the ALSA backend to try to
use an event loop instead of the audio timer. This works most of the
time. But the poll event handler in the ALSA backend has a bug. For
example, if the guest can't provide enough audi
Bibo Mao writes:
> When there is an error, it is put into a local variable and then
> propagated to somewhere else. Instead the error can be set right
> away, error propagation can be removed.
>
> Signed-off-by: Bibo Mao
Reviewed-by: Markus Armbruster
On 3/19/25 11:22, Alex Bennée wrote:
It's not used outside of the gdbstub code.
Signed-off-by: Alex Bennée
---
target/ppc/cpu.h | 1 -
target/ppc/gdbstub.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 1e833ade04..950bb6e
On Thu, Mar 20, 2025 at 10:19 PM Konstantin Shkolnyy wrote:
>
> On 3/19/2025 19:58, Jason Wang wrote:
> > Adding Cindy and Eugenio
> >
> > On Thu, Mar 20, 2025 at 12:34 AM Konstantin Shkolnyy
> > wrote:
> >>
> >> I’m observing a problem while testing VDPA with Nvidia ConnectX-6 (mlx5)
> >> on s3
Reverse the logical condition for HDM passthrough support in
pci_expander_bridge. This patch ensures the HDM passthrough condition
is evaluated only when hdm_for_passthrough is set to true, aligning
behavior with intended semantics and comments.
Signed-off-by: Li Zhijian
---
This change corrects
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