On 2/6/25 19:18, Philippe Mathieu-Daudé wrote:
"cpu.h" is target-specific. Definitions which can be used
by hw/ code when building QOM blocks can be in "cpu-qom.h",
which is target-agnostic.
Move the MISA bits (removing the pointless target_ulong cast)
and the IRQ index definitions.
This seems
Currently, single-stepping is tied to GDB debugging. This means that when
EXCP_DEBUG is returned, a debug exception is triggered in many cases. We
define a new EXCP_SINGLESTEP to differentiate the case where we want a
single step to not be tied to a debug exception. We also define a new flag
for cp
Signed-off-by: Joelle van Dyne
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 256013ca80..6818c54787 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -11,6 +11,7 @@ config ARM_VIRT
imply TPM_TIS_I2C
imply NVDIMM
imply
When the VM exits with an data abort, we check the ISV field in the ESR and when
ISV=1, that means the processor has filled the remaining fields with information
needed to determine the access that caused the abort: address, access width, and
the register operand. However, only a limited set of ins
We create a toggle to allow TCG emulation to be used dynamically when
running other accelerators. Tracking dirty code can be expensive so we
need to flush the TLBs and TBs every time we toggle emulation mode. Plugin
support is currently disabled when running in this mode.
Signed-off-by: Joelle van
On a data abort, the processor will try to decode the faulting instruction
so the hypervisor can emulate the read/write. However, it is not always
able to do this and ISV=0 whenever the instruction is not decoded. This is
the case for example if the faulting instruction is SIMD or a LDP/STP.
When
According to the ARM manual, when SSE=1 the data item must be sign
extended.
Signed-off-by: Joelle van Dyne
---
target/arm/hvf/hvf.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 0afd96018e..28886970c9 100644
--- a/target/arm/hvf/h
This is now handled by the configs/targets/*.mak fragment.
Reviewed-by: Thomas Huth
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/alpha/cpu-param.h | 2 --
target/arm/cpu-param.h| 2 --
target/avr/cpu-param.h| 1 -
Require a 64-bit host binary to spawn a 64-bit guest.
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
meson.build | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/meson.build b/meson.build
index e50a103f8a
Require a 64-bit host binary to spawn a 64-bit guest.
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
meson.build | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/meson.build b/meson.build
index 1af8aeb194..911955cfa
0/qemu.git tags/pull-tcg-20250208
for you to fetch changes up to 6d701c9bac1d3571e9ad511e01b27df7237f0b13:
meson: Deprecate 32-bit host support (2025-02-08 12:41:40 -0800)
meson: Disallow 64-bit on 32-bit
Require a 64-bit host binary to spawn a 64-bit guest.
For HVF this is trivially true because macOS 11 dropped
support for 32-bit applications entirely.
For NVMM, NetBSD only enables nvmm on x86_64:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/nvmm/Makefile?rev=1.1.6.2;content-type=text%2Fpl
We deprecated i686 system mode support for qemu 8.0. However, to
make real cleanups to TCG we need to deprecate all 32-bit hosts.
Reviewed-by: Thomas Huth
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
docs/about/deprecated.rst | 7 +++
For system mode, we can rarely support the amount of RAM that
the guest requires. TCG emulation is restricted to round-robin
mode, which solves many of the atomicity issues, but not those
associated with virtio. In any case, round-robin does nothing
to help the speed of emulation.
For user mode,
Configuration of 64-bit host on 32-bit guest will shortly
be denied. Use a 32-bit guest instead.
Reviewed-by: Thomas Huth
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
.gitlab-ci.d/crossbuilds.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.gitlab-ci.d
This reverts commit dae0ec159f9 ("accel: build tcg modular").
The attempt was only enabled for x86, only modularized a small
portion of tcg, and in more than 3 years there have been no
follow-ups to improve the situation.
Reviewed-by: Thomas Huth
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Ma
Define TARGET_LONG_BITS in each target's configure fragment.
Do this without removing the define in target/*/cpu-param.h
so that errors are caught like so:
In file included from .../src/include/exec/cpu-defs.h:26,
from ../src/target/hppa/cpu.h:24,
from ../src/linu
> I have sent a docs/devel/rust.rst sometime last week, it will be in the
> next pull request and then you can send a patch on top.
>
Nice, I'll also have a look at that patch
And I plan to post v2 tomorrow... as I'll leave at next week from Tuesday.
Try to catch your pull request train if possib
> > > This needs to be "match addr & !4".
> >
> > I understand it's not necessary:
> >
> > In timer_and_addr(), I've masked the address with 0x18.
> >
> > fn timer_and_addr(&self, addr: hwaddr) ->
> > Option<(&BqlRefCell, hwaddr)> {
> > let timer_id: usize = ((addr - 0x100) / 0x20) as u
On 6/2/25 19:18, Philippe Mathieu-Daudé wrote:
"cpu.h" is target-specific. Definitions which can be used
by hw/ code when building QOM blocks can be in "cpu-qom.h",
which is target-agnostic.
What I'm trying to allow here are QOM uses such:
../../hw/riscv/opentitan.c:199:61: error: use of undec
On 7/2/25 22:06, Richard Henderson wrote:
Require a 64-bit host binary to spawn a 64-bit guest.
For HVF this is trivially true because macOS 11 dropped
support for 32-bit applications entirely.
For NVMM, NetBSD only enables nvmm on x86_64:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/nvm
On 7/2/25 22:06, Richard Henderson wrote:
For system mode, we can rarely support the amount of RAM that
the guest requires. TCG emulation is restricted to round-robin
mode, which solves many of the atomicity issues, but not those
associated with virtio. In any case, round-robin does nothing
to h
When transmission is disabled, characters are still queued
to the FIFO which eventually overruns. Report that error
condition in the status register.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/pl011.c | 20
hw/char/trace-events | 2 ++
2 files changed, 22 insert
In order to make the next commit easier to review,
introduce the transmit FIFO, but do not yet use it.
We only migrate the TX FIFO if it is in use.
When migrating from new to old VM:
- if the fifo is empty, migration will still work because
of the subsection.
- if the fifo is not empty, the su
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/pl011.c | 4 +++-
hw/char/trace-events | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index b9c9e5b5983..447f185e2d5 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -148,6 +148,7
Extract pl011_xmit() from pl011_write_txdata(). Use the
FIFO to pass the character to be transmitted.
Implement it using the FEWatchFunc prototype, since we want
to register it as GSource later. While the return value is
not yet used, we return G_SOURCE_REMOVE meaning the GSource
is removed from t
Hi,
This series add support for (async) FIFO on the transmit path
of the PL011 UART.
Since v5:
- Rebased (few patches already merged)
- Do not forbid disabled UART/receiver (Peter)
- Use fifo8_peek API for wrapped buffer (Mark)
Since v4:
- Rebased (loopback)
- Addressed Richard & Juan migration
When no character backend is connected, the PL011 frontend
just drains the FIFO.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/pl011.c | 13 +
hw/char/trace-events | 1 +
2 files changed, 14 insertions(+)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index ef39ab666a2..3c
If the UART back-end chardev doesn't drain data as fast as stdout
does or blocks, buffer in the TX FIFO to try again later.
This avoids having the IO-thread busy waiting on chardev back-ends,
reported recently when testing the Trusted Reference Stack and
using the socket backend.
Implement regist
We shouldn't receive characters when the full UART or its
receiver is disabled. However we don't want to break the
possibly incomplete "my first bare metal assembly program"s,
so we choose to simply display a warning when this occurs.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu
I merged this directly into qemu.git/master.
Stefan
Il sab 8 feb 2025, 11:36 Zhao Liu ha scritto:
> On Wed, Jan 29, 2025 at 11:58:14AM +0100, Paolo Bonzini wrote:
> > Date: Wed, 29 Jan 2025 11:58:14 +0100
> > From: Paolo Bonzini
> > Subject: Re: [PATCH 09/10] rust/timer/hpet: add qom and qdev APIs support
> >
> >
> >
> > On Sat, Jan 25, 2025 at 1
Il sab 8 feb 2025, 11:55 Zhao Liu ha scritto:
> On Fri, Feb 07, 2025 at 10:57:11AM +0100, Paolo Bonzini wrote:
> > Date: Fri, 7 Feb 2025 10:57:11 +0100
> > From: Paolo Bonzini
> > Subject: Re: [PATCH 03/10] rust/irq: Add a helper to convert
> > [InterruptSource] to [*mut IRQState]
> >
> > Il ve
> Use the "let" so that it's caught at compile time.
Thanks! Fixed.
> There's a difference with origianl C version:
> >
> > In C side, qdev_get_gpio_in() family could accept a NULL handler, but
> > there's no such case in current QEMU:
> >
> > * qdev_get_gpio_in
> > * qdev_init_gpio_in_named
> >
On Fri, Feb 07, 2025 at 10:57:11AM +0100, Paolo Bonzini wrote:
> Date: Fri, 7 Feb 2025 10:57:11 +0100
> From: Paolo Bonzini
> Subject: Re: [PATCH 03/10] rust/irq: Add a helper to convert
> [InterruptSource] to [*mut IRQState]
>
> Il ven 7 feb 2025, 08:25 Zhao Liu ha scritto:
>
> > Just to conf
> Please keep init_full(); init() would be a version without some of the
> arguments (e.g. the TimerListGroup, or the attributes).
Done.
...
> > > > +scale: u32,
>
> While at it, can you add constants for the scale, i.e.
>
> pub const NS: u32 = bindings::SCALE_NS;
> pub const U
Hello Peter,
On Fri, 7 Feb 2025 at 21:16, Peter Xu wrote:
> This is not easy to follow neither with the current name, nor that you
> "assumed this is main channel" and test it.
* It is not my doing, nor is there any assumption, but that is how
current implementation works.
===
static bool migrat
On Wed, Jan 29, 2025 at 11:58:14AM +0100, Paolo Bonzini wrote:
> Date: Wed, 29 Jan 2025 11:58:14 +0100
> From: Paolo Bonzini
> Subject: Re: [PATCH 09/10] rust/timer/hpet: add qom and qdev APIs support
>
>
>
> On Sat, Jan 25, 2025 at 1:32 PM Zhao Liu wrote:
> > fn read(&mut self, addr: hwa
When the KVM_REG_LOONGARCH_VCPU_RESET command word
is sent to the kernel through the kvm_set_one_reg interface,
the parameter source needs to be a legal address,
otherwise the kernel will return an error and the command word
will fail to be sent.
Signed-off-by: Xianglai Li
---
Cc: Bibo Mao
Cc: P
When the KVM_REG_LOONGARCH_VCPU_RESET command word
is sent to the kernel through the kvm_set_one_reg interface,
the parameter source needs to be a legal address,
otherwise the kernel will return an error and the command word
will fail to be sent.
Signed-off-by: Xianglai Li
---
Cc: Bibo Mao
Cc: S
On Wed, Jan 29, 2025 at 11:57:18AM +0100, Paolo Bonzini wrote:
> Date: Wed, 29 Jan 2025 11:57:18 +0100
> From: Paolo Bonzini
> Subject: Re: [PATCH 08/10] rust/timer/hpet: add basic HPET timer and
> HPETState
>
>
>
> On Sat, Jan 25, 2025 at 1:32 PM Zhao Liu wrote:
> > +// Register space for ea
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