Commit 8b46d7e2dc8e ("audio: Rename coreaudio extension to use
Objective-C compiler") renamed coreaudio.c to coreaudio.m.
Signed-off-by: Akihiko Odaki
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 38a290e9c2ce..1e30c0f1405
Hi,
Can anyone review this change?
Regards,
Akihiko Odaki
On 2024/03/18 18:02, Akihiko Odaki wrote:
Cocoa automatically zooms for a HiDPI display like Retina and makes
the display blurry. Revert the automatic zooming.
Signed-off-by: Akihiko Odaki
---
ui/cocoa.m | 9 ++---
1 file chang
Hi Jason,
Can you check this patch again?
Regards,
Akihiko Odaki
On 2024/10/22 13:59, Akihiko Odaki wrote:
On 2024/10/18 17:10, Jason Wang wrote:
On Sat, Oct 12, 2024 at 5:05 PM Akihiko Odaki
wrote:
On 2024/10/09 16:41, Jason Wang wrote:
On Tue, Oct 8, 2024 at 2:52 PM Akihiko Odaki
wrote
Hi Paolo,
Please review this patch.
Regards,
Akihiko Odaki
On 2024/10/13 16:31, Akihiko Odaki wrote:
call_rcu() callbacks may have potential memory leaks, but QEMU may
sometimes exit before draining the callbacks and leave the leaks
undetected by LeakSanitizer. For example, PCI devices registe
Hi,
It seems this series has been forgotten for a while. Can anyone take a
look at it?
Regards,
Akihiko Odaki
On 2024/07/16 16:27, Akihiko Odaki wrote:
qemu_get_runtime_dir() returns a dynamically allocated directory path
that is appropriate for storing runtime files. It corresponds to "run"
Jason, can you pull this series?
Regards,
Akihiko Odaki
On 2024/05/08 23:51, Philippe Mathieu-Daudé wrote:
ping?
On 28/4/24 13:11, Akihiko Odaki wrote:
iov_from_buf(), iov_to_buf(), iov_memset(), and iov_copy() asserts
that the given offset fits in the iov while tolerating the specified
numbe
On 1/11/25 05:05, Paolo Bonzini wrote:
Il ven 10 gen 2025, 14:03 Michael Clark ha scritto:
On 1/11/25 00:07, Paolo Bonzini wrote:
Il ven 10 gen 2025, 10:52 Michael Clark ha
scritto:
a note to announce a port of the x86-mini disassembler to QEMU.
-https://github.com/michaeljclark/qemu/tree/x
On 2025/01/11 0:18, Peter Xu wrote:
On Fri, Jan 10, 2025 at 05:43:15PM +0900, Akihiko Odaki wrote:
On 2025/01/10 4:37, Peter Xu wrote:
On Thu, Jan 09, 2025 at 02:29:21PM -0500, Peter Xu wrote:
On Thu, Jan 09, 2025 at 01:30:35PM +0100, BALATON Zoltan wrote:
On Thu, 9 Jan 2025, Akihiko Odaki wr
Nicolin,
Hi!
On 1/8/25 11:45 PM, Nicolin Chen wrote:
On Mon, Dec 16, 2024 at 10:01:29AM +, Shameerali Kolothum Thodi wrote:
And patches prior to this commit adds that support:
4ccdbe3: ("cover-letter: Add HW accelerated nesting support for arm
SMMUv3")
Nicolin is soon going to send out th
On 10/1/25 23:59, Pierrick Bouvier wrote:
On 1/10/25 13:29, Philippe Mathieu-Daudé wrote:
On 10/1/25 17:30, Peter Maydell wrote:
On Thu, 19 Dec 2024 at 18:32, Pierrick Bouvier
wrote:
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/virt.rst | 14 +++---
1 file changed, 11 in
Convert the TYPE_SERIAL (16550A UART) based devices
to three-phase reset.
Only local states are reset so use the ResetHold
handler, like other legacy devices.
TYPE_SERIAL is a plain QDev object:
- Implement and register ResetHold
- Remove call to serial_reset() in DeviceRealize
- Remove qemu_[un]
Use the QDev GPIO API to set the TYPE_SERIAL output
IRQ, this way we don't have to explicitly set the
SerialState::irq pointer before realizing the object.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial-isa.c | 2 +-
hw/char/serial-pci-multi.c | 2 +-
hw/char/serial-pci.c |
v3 (rework v2's crap):
- SerialState::irq is supposed to be a 'protected' field,
do not set it from 'outside' of the object, expose it
as QDev GPIO.
- Manually Reset SerialState from parents,
register global reset handler for SERIAL_MM (not on qbus)
v2:
- Addressed Paolo's comments from v1 (
On 1/10/25 13:29, Philippe Mathieu-Daudé wrote:
On 10/1/25 17:30, Peter Maydell wrote:
On Thu, 19 Dec 2024 at 18:32, Pierrick Bouvier
wrote:
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/virt.rst | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/d
On 10/1/25 19:27, Philippe Mathieu-Daudé wrote:
Convert the TYPE_SERIAL (16550A UART) to three-phase reset.
Only local states are reset so use the ResetHold handler,
like other legacy devices.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial.c | 10 --
1 file changed, 4 inse
On 10/1/25 19:27, Philippe Mathieu-Daudé wrote:
SerialState::irq must be set by parent when the object is realized.
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial-pci-multi.c | 2 +-
hw/char/serial-pci.c | 2 +-
hw/char/serial.c | 2 ++
From: David Hildenbrand
Let's register a RAM block notifier and react on remap notifications.
Simply re-apply the settings. Exit if something goes wrong.
Merging and dump settings are handled by the remap notification
in addition to memory policy and preallocation.
Signed-off-by: David Hildenbr
Am 10.01.2025 um 19:45 hat Paolo Bonzini geschrieben:
> rustc will check that every reachable #[cfg] matches a list of
> the expected config names and values. Recent versions of rustc are
> also complaining about #[cfg(test)], even if it is basically a standard
> part of the language. So, always
On 10/1/25 17:30, Peter Maydell wrote:
On Thu, 19 Dec 2024 at 18:32, Pierrick Bouvier
wrote:
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/virt.rst | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
From: David Hildenbrand
Notify registered listeners about the remap at the end of
qemu_ram_remap() so e.g., a memory backend can re-apply its
settings correctly.
Signed-off-by: David Hildenbrand
Signed-off-by: William Roche
---
hw/core/numa.c | 11 +++
include/exec/ramlist.h |
From: William Roche
In case of a large page impacted by a memory error, enhance
the existing Qemu error message which indicates that the error
is injected in the VM, adding "on lost large page SIZE@ADDR".
Include also a similar message to the ARM platform.
In the case of a large page impacted,
From: David Hildenbrand
We want to reuse the functionality when remapping RAM.
Signed-off-by: David Hildenbrand
Signed-off-by: William Roche
---
backends/hostmem.c | 155 -
1 file changed, 82 insertions(+), 73 deletions(-)
diff --git a/backends/hos
From: William Roche
Repair poisoned memory location(s), calling ram_block_discard_range():
punching a hole in the backend file when necessary and regenerating
a usable memory.
If the kernel doesn't support the madvise calls used by this function
and we are dealing with anonymous memory, fall back
From: William Roche
Hello David,
I'm keeping the description of the patch set you already reviewed:
---
This set of patches fixes several problems with hardware memory errors
impacting hugetlbfs memory backed VMs and the generic memory recovery
on VM reset.
When using hugetlbfs large pages, any
From: William Roche
The list of hwpoison pages used to remap the memory on reset
is based on the backend real page size. When dealing with
hugepages, we create a single entry for the entire page.
To correctly handle hugetlb, we must mmap(MAP_FIXED) a complete
hugetlb page; hugetlb pages cannot b
On 1/9/25 14:27, Philippe Mathieu-Daudé wrote:
On 9/1/25 20:45, Alex Bennée wrote:
Pierrick Bouvier writes:
On 1/9/25 09:06, Alex Bennée wrote:
This started as a clean-up to properly pass a Error handler to the
gdbserver_start so we could do the right thing for command line and
HMP invocatio
On 1/8/25 22:34, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
From: William Roche
Subject should likely start with "system/physmem:".
Maybe
"system/physmem: handle hugetlb correctly in qemu_ram_remap()"
I updated the commit title
The list of hwpoison pages used t
On 1/10/25 07:15, Alex Bennée wrote:
"Julian Ganz" writes:
Hi Alex,
January 9, 2025 at 3:04 PM, "Alex Bennée" wrote:
Julian Ganz writes:
We recently introduced new plugin API for registration of discontinuity
related callbacks. This change introduces a minimal plugin showcasing
the new
On 1/10/25 10:09, Philippe Mathieu-Daudé wrote:
triboard_machine_init() has access to the single CPU via:
TriBoardMachineState {
TC27XSoCState {
TriCoreCPU cpu;
...
} tc27x_soc;
} ms;
Pass it as argument to tricore_load_kernel() so we can
remove the &first_cpu glob
On 1/8/25 22:58, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
From: David Hildenbrand
We want to reuse the functionality when remapping or resizing RAM.
We should drop the "or resizing of RAM." part, as that does no longer
apply.
Commit message corrected.
On 1/8/25 22:53, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
From: William Roche
Merging and dump settings are handled by the remap notification
in addition to memory policy and preallocation.
Signed-off-by: William Roche
---
system/physmem.c | 2 --
1 file changed,
On 1/8/25 22:51, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
From: David Hildenbrand
Let's register a RAM block notifier and react on remap notifications.
Simply re-apply the settings. Exit if something goes wrong.
Note: qemu_ram_remap() will not remap when RAM_PREALLOC
On 1/8/25 22:44, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
+/* Try to simply remap the given location */
+static void qemu_ram_remap_mmap(RAMBlock *block, void* vaddr, size_t
size,
+ ram_addr_t offset)
Can you make the parameters match t
On 1/8/25 22:22, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
From: William Roche
Hello David,
Hi!
Let me start reviewing today a bit (it's already late, and I'll continue
tomorrow.
Here is an new version of our code and an updated description of the
patch set:
On 1/10/25 08:28, Peter Maydell wrote:
On Thu, 19 Dec 2024 at 18:32, Pierrick Bouvier
wrote:
qemu-system-aarch64 default pointer authentication (QARMA5) is expensive, we
spent up to 50% of the emulation time running it (when using TCG).
Switching to pauth-impdef=on is often given as a solutio
On 1/10/25 08:30, Peter Maydell wrote:
On Thu, 19 Dec 2024 at 18:32, Pierrick Bouvier
wrote:
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/virt.rst | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
On 1/10/25 10:27, Philippe Mathieu-Daudé wrote:
Convert the TYPE_SERIAL (16550A UART) to three-phase reset.
Only local states are reset so use the ResetHold handler,
like other legacy devices.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial.c | 10 --
1 file changed, 4 inse
On 1/10/25 10:27, Philippe Mathieu-Daudé wrote:
SerialState::irq must be set by parent when the object is realized.
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial-pci-multi.c | 2 +-
hw/char/serial-pci.c | 2 +-
hw/char/serial.c | 2 ++
On 1/10/25 12:33, Pierrick Bouvier wrote:
For now, it was only possible to build plugins using GCC on Windows. However,
windows-aarch64 only supports Clang.
This biggest roadblock was to get rid of gcc_struct attribute, which is not
supported by Clang. After investigation, we proved it was safe t
Windows uses a special mechanism to enable plugins to work (DLL delay
loading). Option for lld is different than ld.
MSYS2 clang based environment use lld by default, so restricting to this
config on Windows is safe, and will avoid false bug reports.
Reviewed-by: Philippe Mathieu-Daudé
Signed-of
This attribute is not recognized by clang.
An investigation has been performed to ensure this attribute has no
effect on layout of structures we use in QEMU [1], so it's safe to
remove now.
In the future, we'll forbid introducing new bitfields in packed struct,
as they are the one potentially imp
For now, it was only possible to build plugins using GCC on Windows. However,
windows-aarch64 only supports Clang.
This biggest roadblock was to get rid of gcc_struct attribute, which is not
supported by Clang. After investigation, we proved it was safe to drop it.
Built and tested on Windows (all
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
docs/devel/style.rst | 20
1 file changed, 20 insertions(+)
diff --git a/docs/devel/style.rst b/docs/devel/style.rst
index 2f68b500798..d025933808e 100644
--- a/docs/deve
On 1/11/25 05:05, Paolo Bonzini wrote:
Il ven 10 gen 2025, 14:03 Michael Clark ha scritto:
On 1/11/25 00:07, Paolo Bonzini wrote:
Il ven 10 gen 2025, 10:52 Michael Clark ha
scritto:
a note to announce a port of the x86-mini disassembler to QEMU.
- https://github.com/michaeljclark/qemu/t
From: Xiaoyao Li
The correct usage is tracking and maintaining features in env->features[]
instead of manually set it in cpu_x86_cpuid().
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20241219110125.1266461-11-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c
From: Xiaoyao Li
Introduce various helpers for getting the topology info of different
semantics. Using the helper is more self-explanatory.
Besides, the semantic of the helper will stay unchanged even when new
topology is added in the future. At that time, updating the
implementation of the help
From: Zhao Liu
In x86_cpu_filter_features(), if host doesn't support AVX10, the
configured avx10_version should be marked as filtered regardless of
whether prefix is NULL or not.
Check prefix before warn_report() instead of checking for
have_filtered_features.
Cc: qemu-sta...@nongnu.org
Fixes:
From: Xiaoyao Li
Now it changes to use env->topo_info.threads_per_core and doesn't depend
on qemu_init_vcpu() anymore. Put it together with other feature checks
before qemu_init_vcpu()
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20241219110125.1266461-8-xiaoyao...@intel.com
Signe
From: Xiaoyao Li
The name of nr_modules/nr_dies are ambiguous and they mislead people.
The purpose of them is to record and form the topology information. So
just maintain a X86CPUTopoInfo member in CPUX86State instead. Then
nr_modules and nr_dies can be dropped.
As the benefit, x86 can switch
From: Xiaoyao Li
Local variable cores_per_pkg is only used to calculate threads_per_pkg.
No need for it. Drop it and open-code it instead.
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20241219110125.1266461-4-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
Using a sextract or extract operation is only necessary if a
sign or zero extended value is needed. If not, a shift is
enough.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 2 +-
target/i386/tcg/emit.c.inc | 23 ---
2 files changed, 13 insertions(+), 12 de
There is no need to monkeypatch DeviceId::Luminary into the already-initialized
PL011State. Instead, now that we can define a class hierarchy, we can define
PL011Class and make device_id a field in there.
There is also no need anymore to have "Arm" as zero, so change DeviceId into a
wrapper for t
From: Zhao Liu
Update the comment to match the X86ConfidentialGuestClass
implementation.
Reported-by: Xiaoyao Li
Signed-off-by: Zhao Liu
Reviewed-by: Pankaj Gupta
Reviewed-by: Zide Chen
Link: https://lore.kernel.org/r/20241106030728.553238-8-zhao1@intel.com
Signed-off-by: Paolo Bonzini
The QEMU source archive is including the sources downloaded from crates.io
in both tarball form (in subprojects/packagecache) and expanded/patched
form (in the subprojects directory). The former is the more authoritative
form, as it has a hash that can be verified in the wrap file and checked
agai
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api-macros/src/lib.rs | 46 +++--
1 file changed, 27 insertions(+), 19 deletions(-)
diff --git a/rust/qemu-api-macros/src/lib.rs b/rust/qemu-api-macros/src/lib.rs
index 160b283d7fd..0f04cca3841 100644
-
The ObjectDeref trait now provides all the magic that is required to fake
inheritance. Replace the "impl SysBusDevice" block of qemu_api::sysbus
with a trait, so that sysbus_init_irq() can be invoked as "self.init_irq()"
without any intermediate upcast.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo
From: Xiaoyao Li
Currently CPUID_HT is evaluated in cpu_x86_cpuid() each time. It's not a
correct usage of how feature bit is maintained and evaluated. The
expected practice is that features are tracked in env->features[] and
cpu_x86_cpuid() should be the consumer of env->features[].
Track CPUID
From: Zhao Liu
Before commit 0cc42e63bb54 ("kvm/i386: refactor kvm_arch_init and split
it into smaller functions"), error_report() attempts to print the error
code from kvm_filter_msr(). However, printing error code does not work
due to kvm_filter_msr() returns bool instead int.
0cc42e63bb54 fix
From: Zhao Liu
Add feature definitions for KVM_CPUID_FEATURES in CPUID (
CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of
offset calculations.
Signed-off-by: Zhao Liu
Reviewed-by: Zide Chen
Link: https://lore.kernel.org/r/20241106030728.553238-3-zhao1@intel.com
Signed-
From: Zhao Liu
These 2 MSRs have been already defined in kvm_para.h (standard-headers/
asm-x86/kvm_para.h).
Remove QEMU local definitions to avoid duplication.
Signed-off-by: Zhao Liu
Reviewed-by: Xiaoyao Li
Reviewed-by: Zide Chen
Link: https://lore.kernel.org/r/20241106030728.553238-4-zhao1
This is going to be fairly common. Using a custom procedural macro
provides better error messages and automatically finds the right
type.
Note that this is different from the same-named macro in the
derive_more crate. That one provides conversion from e.g. tuples
to enums with tuple variants, not
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 4 ++--
rust/qemu-api/src/qom.rs | 8 ++--
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs
index 72a4cea042c..6
The "concrete_class" field of InterfaceClass is only ever written, and as far
as I can tell is not particularly useful when debugging either; remove it.
Signed-off-by: Paolo Bonzini
---
include/qom/object.h | 5 -
qom/object.c | 1 -
2 files changed, 4 insertions(+), 2 deletions(-)
From: Zhao Liu
Currently, there're following incorrect error handling cases in
kvm_arch_init():
* Missed to handle failure of kvm_get_supported_feature_msrs().
* Missed to return when kvm_vm_enable_disable_exits() fails.
* MSR filter related cases called exit() directly instead of returning
to
Add a type that, together with the C function object_deinit, ensures the
correct drop order for QOM objects relative to their superclasses.
Right now it is not possible to implement the Drop trait for QOM classes
that are defined in Rust, as the drop() function would not be called when
the object
kvm_install_msr_filters() uses KVM_MSR_FILTER_MAX_RANGES as the bound
when traversing msr_handlers[], while other places still compute the
size by ARRAY_SIZE(msr_handlers).
In fact, msr_handlers[] is an array with the fixed size
KVM_MSR_FILTER_MAX_RANGES, and this has to be true because
kvm_instal
From: Xiaoyao Li
No need to define smp_cores and smp_threads, just using ms->smp.cores
and ms->smp.threads is straightforward. It's also consistent with other
checks of socket/die/module.
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20241219110125.1266461-3-x
From: Zhao Liu
The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit
77d361b13c19 ("linux-headers: Update to kernel mainline commit
b357bf602").
Drop the related workaround.
Signed-off-by: Zhao Liu
Reviewed-by: Zide Chen
Link: https://lore.kernel.org/r/20241106030728.553238-7-zhao1@
It is relatively common in the low-level qemu_api code to assert that
a field of a struct has a specific type; for example, it can be used
to ensure that the fields match what the qemu_api and C code expects
for safety.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/meson.
From: Xiaoyao Li
There is no user of it now, remove it.
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20241219110125.1266461-9-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
include/hw/core/cpu.h | 2 --
hw/core/cpu-common.c | 1 -
system/cpus.c
From: Xiaoyao Li
There are duplicated code to setup the value of MSR_CORE_THREAD_COUNT.
Extract a common function for it.
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20241219110125.1266461-2-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386
This matches cargo's own usage of "--cap-lints allow" when building
dependencies. The dummy changes to the .wrap files help Meson notice
that the subproject is out of date.
Also remove an unnecessary subprojects/unicode-ident-1-rs/meson.build file.
Signed-off-by: Paolo Bonzini
---
subprojects/
Generalize the CompileError tuple to an enum, that can be either an error
message or a parse error from syn.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api-macros/src/lib.rs | 27 ++-
rust/qemu-api-macros/src/utils.rs | 26
From: Zhao Liu
It is common practice to return a negative value (like -1) to indicate
an error, and other functions in kvm_arch_init() follow this style.
To avoid confusion (sometimes returned -1 indicates failure, and
sometimes -1, in a same function), return -1 when
kvm_msr_energy_thread_init(
Because BT does not write back to the source operand, it can modify it to
ensure that one of the operands of TSTNE is a constant (after either gen_BT
or the optimizer's constant propagation). This produces better and more
optimizable TCG ops. For example, the sequence
movl $0x60013f, %ebx
bt
From: Zhao Liu
MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old)
kvmclock feature (KVM_FEATURE_CLOCKSOURCE).
So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is
enabled.
Signed-off-by: Zhao Liu
Reviewed-by: Zide Chen
Link: https://lore.kernel.org/r/202
Replace the customizable INSTANCE_FINALIZE with a generic function
that drops the Rust object.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/src/qom.rs | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/rust/qemu-api/src/qom.rs b/rust/qemu-
From: Xiaoyao Li
Update the comment of x86_apicid_from_topo_ids() to match the current
implementation,
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20241219110125.1266461-5-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
include/hw/i386/topology.h | 5
Leave IRQ and MMIO initialization to instance_post_init. In Rust the
two callbacks are more distinct, because only instance_post_init has a
fully initialized object available.
While at it, add a wrapper for sysbus_init_mmio so that accesses to
the SysBusDevice correctly use shared references.
Re
Convert derive_object to the same pattern of first making a
Result, and then doing
.unwrap_or_else(Into::into) to support checking the validity of
the input. Add is_c_repr to check that all QOM structs include
a #[repr(C)] attribute.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/
The following changes since commit 6528013b5f5ba6bb3934b7f5fe57a3110680530f:
Merge tag 'qga-pull-2025-01-06' of https://github.com/kostyanf14/qemu into
staging (2025-01-06 09:39:02 -0500)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you
--feature is an option for cargo but not for rustc.
Reported-by: Bernhard Beschow
Reviewed-by: Bernhard Beschow
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/rust/qemu-api/meson.build b/rust/qemu-api/meson.build
i
rustc will check that every reachable #[cfg] matches a list of
the expected config names and values. Recent versions of rustc are
also complaining about #[cfg(test)], even if it is basically a standard
part of the language. So, always allow it.
Signed-off-by: Paolo Bonzini
---
scripts/rust/rus
On Fri, 10 Jan 2025 at 08:22, Alex Bennée wrote:
>
> The following changes since commit bc6afa1c711da5b4f37c9685a812c77b114d84cb:
>
> Merge tag 'pull-xenfv-20250109-1' of https://gitlab.com/dwmw2/qemu into
> staging (2025-01-09 08:39:32 -0500)
>
> are available in the Git repository at:
>
> h
On 1/10/25 10:04, Philippe Mathieu-Daudé wrote:
rx_gdbsim_init() has access to the single CPU via:
RxGdbSimMachineState {
RX62NState {
RXCPU cpu;
...
} mcu;
} s;
Directly use that instead of the &first_cpu global.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-
Convert the TYPE_SERIAL (16550A UART) to three-phase reset.
Only local states are reset so use the ResetHold handler,
like other legacy devices.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/char/seri
v2:
- Addressed Paolo's comments from v1 (except &error_abort).
Note, this fixes a bug where serial_realize() was calling
serial_reset() -> qemu_irq_lower() while the IRQ was not
yet created.
Philippe Mathieu-Daudé (2):
hw/char/serial: Ensure SerialState::irq is set when realizing
hw/char/ser
SerialState::irq must be set by parent when the object is realized.
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/serial-pci-multi.c | 2 +-
hw/char/serial-pci.c | 2 +-
hw/char/serial.c | 2 ++
3 files changed, 4 insertions(+), 2 deletions(-)
di
On 10/1/25 19:12, Paolo Bonzini wrote:
On 1/10/25 18:57, Philippe Mathieu-Daudé wrote:
Convert the TYPE_SERIAL (16550A UART) to three-phase reset.
Local states are reset in the ResetHold handler.
Move the IRQ lowering to ResetExit, since it an external
object is accessed.
Accessing external o
On 1/10/25 10:09, Philippe Mathieu-Daudé wrote:
triboard_machine_init() has access to the single CPU via:
TriBoardMachineState {
TC27XSoCState {
TriCoreCPU cpu;
...
} tc27x_soc;
} ms;
Pass it as argument to tricore_load_kernel() so we can
remove the &first_cpu glob
rx_gdbsim_init() has access to the single CPU via:
RxGdbSimMachineState {
RX62NState {
RXCPU cpu;
...
} mcu;
} s;
Directly use that instead of the &first_cpu global.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/rx/rx-gdbsim.c | 4 ++--
1 file changed, 2 insertions(+), 2
On 1/10/25 18:57, Philippe Mathieu-Daudé wrote:
Convert the TYPE_SERIAL (16550A UART) to three-phase reset.
Local states are reset in the ResetHold handler.
Move the IRQ lowering to ResetExit, since it an external
object is accessed.
Accessing external objects is fine for hold; only "enter" ca
triboard_machine_init() has access to the single CPU via:
TriBoardMachineState {
TC27XSoCState {
TriCoreCPU cpu;
...
} tc27x_soc;
} ms;
Pass it as argument to tricore_load_kernel() so we can
remove the &first_cpu global use.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/
Convert the TYPE_SERIAL (16550A UART) to three-phase reset.
Local states are reset in the ResetHold handler.
Move the IRQ lowering to ResetExit, since it an external
object is accessed.
Note, this fixes a bug where serial_realize() was calling
serial_reset() -> qemu_irq_lower() while the IRQ was n
- Pass the CPU from machine as LINK property and remove
one &first_cpu use.
- Call qemu_set_irq() in ResetExit handler, not in Realize.
Philippe Mathieu-Daudé (2):
hw/ppc/prep_systemio: Use link property to remove &first_cpu
hw/ppc/prep_systemio: Set IOMap IRQ in ResetExit() handler
hw/ppc
Since the IOMap output IRQ is created in prep_systemio_realize(),
it can not yet be wired before the device is realized, thus
it is not reset properly. Fix by moving the qemu_set_irq() call
in the ResetExit handler.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/prep_systemio.c | 12 ++
In order to avoid using the &first_cpu global, pass the CPU
as link property from the 40p MachineClass::init().
Declare the link type as TYPE_POWERPC_CPU to have the CPU
type checked automatically.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/prep.c | 2 ++
hw/ppc/prep_systemio.c |
Adds the in_xlat_addr & out_xlat_addr hwaddr arrays to the
VirtQueueElement struct and introduces an optional GPA output parameter
to dma_memory_map().
These arrays will store a VirtQueueElement's input/output descriptors'
GPA of the mapped memory region, if it's backed by guest memory, via
dma_me
Removes the range check portion in vhost_iova_tree_map_alloc.
The previous patch decoupled the IOVA allocator from adding mappings to
the IOVA->HVA tree (now a partial SVQ IOVA->HVA tree) and instead adds
the allocated IOVA range to an IOVA-only tree. No value exists under
translated_addr for the
Implements the GPA->IOVA tree for handling mapping and unmapping for
guest memory. This, alongside the SVQ IOVA->HVA tree & IOVA-only tree
implemented in the previous patches, allows us to handle guest and
host-only memory mapping operations separately via their own respective
trees.
The next patc
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