On 10/01/2025 03:12, Alistair Francis wrote:
> On Tue, Dec 17, 2024 at 7:10 PM Clément Léger wrote:
>>
>> A double trap typically arises during a sensitive phase in trap handling
>> operations — when an exception or interrupt occurs while the trap
>> handler (the component responsible for manag
John Snow writes:
> On Thu, Jan 9, 2025, 3:00 AM Markus Armbruster wrote:
>
>> John Snow writes:
[...]
>> > Modifying freeform syntax to be purely rST that isn't modified or rewritten
>> > at all has benefits:
>> >
>> > - No need to mangle or multiplex source line source information
>> > - Less
On 9/1/25 18:06, Alex Bennée wrote:
All of the failures to configure devices will result in QEMU exiting
with an error code. In preparation for passing Error * down the chain
re-name the iterator to foreach_device_config_or_exit and exit using
&error_fatal instead of returning a failure indicatio
John Snow writes:
> On Fri, Dec 20, 2024, 8:13 AM Markus Armbruster wrote:
>
>> John Snow writes:
>>
>> > This patch adds an explicit section tag to all QAPIDoc
>> > sections. Members/Features are now explicitly tagged as such, with the
>> > name now being stored in a dedicated "name" field (wh
I tested this patch with virtio-net regression tests and tests
"mrg_rxbuf" on/off status with netperf tests, everything works fine.
Tested-by: Lei Yang
On Wed, Jan 8, 2025 at 8:23 PM Akihiko Odaki wrote:
>
> The specification says the device MUST set num_buffers to 1 if
> VIRTIO_NET_F_MRG_RXBUF
On 1/10/2025 9:42 AM, Alexey Kardashevskiy wrote:
>
>
> On 9/1/25 19:49, Chenyi Qiang wrote:
>>
>>
>> On 1/9/2025 4:18 PM, Alexey Kardashevskiy wrote:
>>>
>>>
>>> On 9/1/25 18:52, Chenyi Qiang wrote:
On 1/8/2025 7:38 PM, Alexey Kardashevskiy wrote:
>
>
> On 8/1/25 17
Hi Jonathon,
Thanks for more explaination!
Based on your clarification, I think the commit message for Patch 1
needs to be updated since I used the same wrods as the cover letter...
What about the following change?
On Wed, Jan 08, 2025 at 11:01:46PM +0800, Zhao Liu wrote:
> Date: Wed, 8 Jan 202
On 6/1/25 14:25, Jonah Palmer wrote:
On 12/22/24 4:13 AM, Michael Tokarev wrote:
16.12.2024 20:30, Jonah Palmer wrote:
...
Signed-off-by: Jonah Palmer
Should this be a Reviewed-by instead?
Thanks,
/mjt
Oof, yes, it should've been. My apologies, I was on vacation and only
saw this just
On 9/1/25 21:30, Fabiano Rosas wrote:
Ani Sinha writes:
At present, the libqos/fw_cfg.c library does not support the modern DMA
interface which is required to write to the fw_cfg files. It only uses the IO
interface. Implement read and write methods based on DMA. This will enable
developers to
On 1/10/2025 8:58 AM, Alexey Kardashevskiy wrote:
>
>
> On 9/1/25 15:29, Chenyi Qiang wrote:
>>
>>
>> On 1/9/2025 10:55 AM, Alexey Kardashevskiy wrote:
>>>
>>>
>>> On 9/1/25 13:11, Chenyi Qiang wrote:
On 1/8/2025 7:20 PM, Alexey Kardashevskiy wrote:
>
>
> On 8/1/25 2
Yes that is true a boot loader will do more than just set registers.
Ill rework the text a bit on the next update.
In my case i need to set the r5 register that specifies the memory
location to the device tree.
I also use the device loader to load in a elf file to ram, and the
device-loader to load
Hi,
Is anybody working on the CXL emulation on aarch64?
If there’s a WIP branch, a pointer would be appreciated.
Itaru.
> On 10 Jan 2025, at 2:00 AM, Fabiano Rosas wrote:
>
> Ani Sinha writes:
>
>> At present, the libqos/fw_cfg.c library does not support the modern DMA
>> interface which is required to write to the fw_cfg files. It only uses the IO
>> interface. Implement read and write methods based on DMA.
On 1/9/2025 5:32 PM, Alexey Kardashevskiy wrote:
>
>
> On 9/1/25 16:34, Chenyi Qiang wrote:
>>
>>
>> On 1/8/2025 12:47 PM, Alexey Kardashevskiy wrote:
>>> On 13/12/24 18:08, Chenyi Qiang wrote:
Introduce the realize()/unrealize() callbacks to initialize/
uninitialize
the new gue
t;[PATCH v2 0/4] hw/pci: Convert rom_bar into
OnOffAuto"?
https://lore.kernel.org/all/20240714-rombar-v2-0-af1504ef5...@daynix.com/
>
They are orthogonal. "[PATCH v2 0/4] hw/pci: Convert rom_bar into
OnOffAuto" was also abandoned in favor of "[PATCH v19 13/14] hw/pci: Use
> On 10 Jan 2025, at 1:31 AM, Fabiano Rosas wrote:
>
> Ani Sinha writes:
>
>> fw-cfg file directory iteration code can be used by other functions that may
>> want to implement fw-cfg file operations. Refactor it into a smaller helper
>> so that it can be reused.
>>
>> No functional change.
On Tue, Dec 17, 2024 at 7:10 PM Clément Léger wrote:
>
> A double trap typically arises during a sensitive phase in trap handling
> operations — when an exception or interrupt occurs while the trap
> handler (the component responsible for managing these events) is in a
> non-reentrant state. This
On Wed, Dec 4, 2024 at 9:18 AM Atish Patra wrote:
>
> This series adds the counter delegation extension support. The counter
> delegation ISA extension(Smcdeleg/Ssccfg) actually depends on multiple ISA
> extensions.
>
> 1. S[m|s]csrind : The indirect CSR extension[1] which defines additional
>
On Wed, Dec 4, 2024 at 9:16 AM Atish Patra wrote:
>
> From: Kaiwen Xue
>
> The Smcdeleg/Ssccfg adds the support for counter delegation via
> S*indcsr and Ssccfg.
>
> It also adds a new shadow CSR scountinhibit and menvcfg enable bit (CDE)
> to enable this extension and scountovf virtualization.
>
On Wed, Dec 4, 2024 at 9:17 AM Atish Patra wrote:
>
> The counter delegation/configuration extensions depend on the following
> extensions.
>
> 1. Smcdeleg - To enable counter delegation from M to S
> 2. S[m|s]csrind - To enable indirect access CSRs
>
> Add an implied rule so that these extensions
Hi,
> -Original Message-
> From: Alex Bennée
> Sent: 2025年1月9日 19:59
> To: Demin Han
> Cc: qemu-devel@nongnu.org; erdn...@crans.org; ma.mando...@gmail.com;
> pierrick.bouv...@linaro.org
> Subject: Re: [PATCH] plugins: add plugin API to get args passed to binary
>
> "demin.han" writes:
On 9/1/25 19:49, Chenyi Qiang wrote:
On 1/9/2025 4:18 PM, Alexey Kardashevskiy wrote:
On 9/1/25 18:52, Chenyi Qiang wrote:
On 1/8/2025 7:38 PM, Alexey Kardashevskiy wrote:
On 8/1/25 17:28, Chenyi Qiang wrote:
Thanks Alexey for your review!
On 1/8/2025 12:47 PM, Alexey Kardashevski
Hi Volker,
On 1/5/25 05:59, Volker Rümelin wrote:
In function create_long_filname(), the array name[8 + 3] in
struct direntry_t is used as if it were defined as name[32].
This is intentional and works. It's nevertheless an out of
bounds array access. To avoid this problem, this patch adds a
stru
On Wed, Dec 4, 2024 at 9:16 AM Atish Patra wrote:
>
> This adds the properties for counter delegation ISA extensions
> (Smcdeleg/Ssccfg). Definitions of new registers and and implementation
> will come in the next set of patches.
>
> Reviewed-by: Daniel Henrique Barboza
> Signed-off-by: Atish Pat
On Wed, Dec 4, 2024 at 9:17 AM Atish Patra wrote:
>
> From: Kaiwen Xue
>
> This adds the indirect access registers required by sscsrind/smcsrind
> and the operations on them. Note that xiselect and xireg are used for
> both AIA and sxcsrind, and the behavior of accessing them depends on
> whether
On 9/1/25 15:29, Chenyi Qiang wrote:
On 1/9/2025 10:55 AM, Alexey Kardashevskiy wrote:
On 9/1/25 13:11, Chenyi Qiang wrote:
On 1/8/2025 7:20 PM, Alexey Kardashevskiy wrote:
On 8/1/25 21:56, Chenyi Qiang wrote:
On 1/8/2025 12:48 PM, Alexey Kardashevskiy wrote:
On 13/12/24 18:08,
On Wed, Dec 4, 2024 at 9:17 AM Atish Patra wrote:
>
> From: Kaiwen Xue
>
> This adds the properties for sxcsrind. Definitions of new registers and
> implementations will come with future patches.
>
> Signed-off-by: Kaiwen Xue
> Reviewed-by: Daniel Henrique Barboza
> Signed-off-by: Atish Patra
On Wed, Jan 8, 2025 at 12:28 PM Sam Price wrote:
>
> I made the changes, and added documentation.
> https://gitlab.com/thesamprice/qemu/-/compare/master...loader?from_project_id=11167699
>
> I left it as [PREFIX]
>
> I can switch this to just RegNumber if desired.
>
> I am still struggling with th
On Fri, 2024-12-27 at 18:04 +0100, Dominik 'Disconnect3d' Czarnota
wrote:
> From: disconnect3d
>
> This commit fixes an incorrect format string for formatting integers
> provided to GDB when debugging a target run in QEMU user mode.
>
> The correct format is hexadecimal for both success and errn
On 10/1/25 00:44, Philippe Mathieu-Daudé wrote:
On 10/1/25 00:00, Philippe Mathieu-Daudé wrote:
On 7/1/25 09:00, Richard Henderson wrote:
Extracts which abut bit 32 may use 32-bit shifts.
(Fix typos?)
Signed-off-by: Richard Henderson
---
tcg/sparc64/tcg-target-has.h | 9 +++--
tcg
On 10/1/25 00:00, Philippe Mathieu-Daudé wrote:
On 7/1/25 09:00, Richard Henderson wrote:
Extracts which abut bit 32 may use 32-bit shifts.
Signed-off-by: Richard Henderson
---
tcg/sparc64/tcg-target-has.h | 9 +++--
tcg/sparc64/tcg-target.c.inc | 11 +++
2 files changed, 18 i
On Thu, 2025-01-02 at 19:25 +0100, Philippe Mathieu-Daudé wrote:
> Commit bb6cf6f0168 ("accel/tcg: Factor tcg_cpu_reset_hold()
> out") wanted to restrict tlb_flush() to system emulation,
> but inadvertently also restricted tcg_flush_jmp_cache(),
> which was before called on user emulation via:
>
>
On 7/1/25 09:00, Richard Henderson wrote:
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-has.h | 15 --
tcg/loongarch64/tcg-target.c.inc | 34 +
On 7/1/25 09:00, Richard Henderson wrote:
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-has.h | 39 ++
tcg/riscv/tcg-target.c.in
On 7/1/25 09:00, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/25 09:00, Richard Henderson wrote:
We're about to change canonicalization of masks as extract
instead of and. Retain the andi expansion here.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.c.inc | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
Reviewed-by: P
On 7/1/25 09:00, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 19 +++
1 file changed, 19 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/25 09:00, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/25 09:00, Richard Henderson wrote:
Add infrastructure for more consolidated output of opcodes.
The base structure allows for constraints to be either static
or dynamic, and for the existence of those constraints to
replace TCG_TARGET_HAS_* and the bulk of tcg_op_supported.
Signed-off-by:
On 7/1/25 09:00, Richard Henderson wrote:
Extracts which abut bit 32 may use 32-bit shifts.
Signed-off-by: Richard Henderson
---
tcg/sparc64/tcg-target-has.h | 9 +++--
tcg/sparc64/tcg-target.c.inc | 11 +++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/tcg/sp
On 7/1/25 09:00, Richard Henderson wrote:
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-has.h | 22 --
tcg/s390x/tcg-target.c.inc | 37 +
On 7/1/25 09:00, Richard Henderson wrote:
Trivially mirrors TCG_TARGET_HAS_{s}extract_*.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target-has.h | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/25 09:00, Richard Henderson wrote:
Trivially mirrors TCG_TARGET_HAS_{s}extract_*.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target-has.h | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/25 09:00, Richard Henderson wrote:
The armv6 uxt and sxt opcodes have a 2-bit rotate field
which supports extractions from ofs = {0,8,16,24}.
Special case ofs = 0, len <= 8 as AND.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target-has.h | 17 +
tcg/arm/tcg-target.c.i
On 7/1/25 09:00, Richard Henderson wrote:
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target-has.h | 16 ++--
tcg/ppc/tcg-target.c.inc | 30 +++
On 7/1/25 09:00, Richard Henderson wrote:
Accept AND, ext32u, ext32s extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target-has.h | 26 ++
tcg/mips/tcg-target.c.inc | 33 +
Hi Volker,
On 12/29/24 01:24, Volker Rümelin wrote:
Found with test sbsaref introduced in [1].
[1]
https://patchew.org/QEMU/20241203213629.2482806-1-pierrick.bouv...@linaro.org/
../block/vvfat.c:433:24: runtime error: index 14 out of bounds for type
'uint8_t [11]'
#0 0x56151a66b93a in c
On 7/1/25 09:00, Richard Henderson wrote:
We canonicalize subtract with constant to add with constant.
Fix this missed instance.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 1/9/25 05:52, Alex Bennée wrote:
Pierrick Bouvier writes:
Hi Julian,
thanks for the update!
Comments below.
On 12/2/24 11:26, Julian Ganz wrote:
The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. However, traps of
an
On 1/9/25 08:33, Alex Bennée wrote:
"Julian Ganz" writes:
(Add Richard to CC)
Hi Pierrick,
December 5, 2024 at 12:33 AM, "Pierrick Bouvier" wrote:
On 12/2/24 11:41, Julian Ganz wrote:
+static void insn_exec(unsigned int vcpu_index, void *userdata)
+{
+ struct cpu_state *state = qemu_
On 9/1/25 20:45, Alex Bennée wrote:
Pierrick Bouvier writes:
On 1/9/25 09:06, Alex Bennée wrote:
This started as a clean-up to properly pass a Error handler to the
gdbserver_start so we could do the right thing for command line and
HMP invocations.
Now that we have cleaned up foreach_device_c
On Thu, 2025-01-02 at 19:25 +0100, Philippe Mathieu-Daudé wrote:
> Since tcg_cpu_reset_hold() is a system emulation specific
> helper, factor tcg_exec_reset() out so we can use it from
> user emulation, similarly to the [un]realize() handlers.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> ac
On Thu, 2025-01-02 at 19:25 +0100, Philippe Mathieu-Daudé wrote:
> Very few source files require to access "exec/tb-flush.h"
> declarations, and except a pair, they all include it
> explicitly. No need to overload the generic "user-internals.h".
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
>
On 1/9/25 06:04, Alex Bennée wrote:
Julian Ganz writes:
We recently introduced new plugin API for registration of discontinuity
related callbacks. This change introduces a minimal plugin showcasing
the new API. It simply counts the occurances of interrupts, exceptions
and host calls per CPU an
On 1/9/25 03:44, Alex Bennée wrote:
Pierrick Bouvier writes:
Since 9.2.0 release, we are building contrib plugins using the QEMU build system
(before, it was external makefiles). When building for 32-bit host platform,
some warnings are triggered and build fail.
Thus, at the time, the decisio
On 12/27/24 15:50, Alex Bennée wrote:
Michael Tokarev writes:
17.12.2024 17:24, ckf104 wrote:
Standard simpoint tool reqeusts that index of basic block index starts from 1.
While this patch is a trivial one-liner, but the underlying issue requires at
least
a minimal understanding of what i
Ani Sinha writes:
> At present, the libqos/fw_cfg.c library does not support the modern DMA
> interface which is required to write to the fw_cfg files. It only uses the IO
> interface. Implement read and write methods based on DMA. This will enable
> developers to write tests that writes to the f
Ani Sinha writes:
> fw-cfg file directory iteration code can be used by other functions that may
> want to implement fw-cfg file operations. Refactor it into a smaller helper
> so that it can be reused.
>
> No functional change.
>
> Signed-off-by: Ani Sinha
> ---
> tests/qtest/libqos/fw_cfg.c |
Pierrick Bouvier writes:
> On 1/9/25 09:06, Alex Bennée wrote:
>> This started as a clean-up to properly pass a Error handler to the
>> gdbserver_start so we could do the right thing for command line and
>> HMP invocations.
>> Now that we have cleaned up foreach_device_config_or_exit() in
>> earl
On Thu, Jan 09, 2025 at 02:29:21PM -0500, Peter Xu wrote:
> On Thu, Jan 09, 2025 at 01:30:35PM +0100, BALATON Zoltan wrote:
> > On Thu, 9 Jan 2025, Akihiko Odaki wrote:
> > > Do not refer to "memory region's reference count"
> > > -
> > >
> > > Now M
On Thu, Jan 09, 2025 at 01:30:35PM +0100, BALATON Zoltan wrote:
> On Thu, 9 Jan 2025, Akihiko Odaki wrote:
> > Do not refer to "memory region's reference count"
> > -
> >
> > Now MemoryRegions do have their own reference counts, but they will not
> >
On Thu, Jan 09, 2025 at 03:52:48PM -0300, Fabiano Rosas wrote:
> Currently, if an array of pointers contains a NULL pointer, that
> pointer will be encoded as '0' in the stream. Since the JSON writer
> doesn't define a "pointer" type, that '0' will now be an uint8, which
> is different from the ori
On Thu, Jan 09, 2025 at 03:52:46PM -0300, Fabiano Rosas wrote:
> Rename vmstate_info_nullptr from "uint64_t" to "nullptr". This vmstate
> actually reads and writes just a byte, so the proper name would be
> uint8. However, since this is a marker for a NULL pointer, it's
> convenient to have a more
From: Peter Xu
QEMU plays a trick with null pointers inside an array of pointers in a VMSD
field. See 07d4e69147 ("migration/vmstate: fix array of ptr with
nullptrs") for more details on why. The idea makes sense in general, but
it may overlooked the JSON writer where it could write nothing in
On 1/9/25 09:06, Alex Bennée wrote:
This started as a clean-up to properly pass a Error handler to the
gdbserver_start so we could do the right thing for command line and
HMP invocations.
Now that we have cleaned up foreach_device_config_or_exit() in earlier
patches we can further simplify by it
On 1/9/25 09:05, Alex Bennée wrote:
This usually indicates the semihosting call was expecting to find
something but didn't.
Signed-off-by: Alex Bennée
---
semihosting/syscalls.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/semihosting/syscalls.c b/semihosting/syscalls.c
index c40348
Commit a55ae46683 ("s390: move css_migration_enabled from machine to
css.c") disabled CSS migration globally instead of doing it
per-instance.
CC: Paolo Bonzini
CC: qemu-sta...@nongnu.org #9.1
Fixes: a55ae46683 ("s390: move css_migration_enabled from machine to css.c")
Resolves: https://gitlab.co
Currently, if an array of pointers contains a NULL pointer, that
pointer will be encoded as '0' in the stream. Since the JSON writer
doesn't define a "pointer" type, that '0' will now be an uint8, which
is different from the original type being pointed to, e.g. struct.
(we're further calling uint8
Reviewed-by: Peter Xu
Signed-off-by: Fabiano Rosas
---
migration/vmstate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/migration/vmstate.c b/migration/vmstate.c
index fa002b24e8..aa2821dec6 100644
--- a/migration/vmstate.c
+++ b/migration/vmstate.c
@@ -311,7 +311,7 @@
The parsing for the S390StorageAttributes section is currently leaving
an unconsumed token that is later interpreted by the generic code as
QEMU_VM_EOF, cutting the parsing short.
The migration will issue a STATTR_FLAG_DONE between iterations, which
the script consumes correctly, but there's a fin
The analyze-migration script was seen failing in s390x in misterious
ways. It seems we're reaching the VMSDFieldStruct constructor without
any fields, which would indicate an empty .subsection entry, a
VMSTATE_STRUCT with no fields or a vmsd with no fields. We don't have
any of those, at least not
Rename vmstate_info_nullptr from "uint64_t" to "nullptr". This vmstate
actually reads and writes just a byte, so the proper name would be
uint8. However, since this is a marker for a NULL pointer, it's
convenient to have a more explicit name that can be identified by the
consumers of the JSON part
changes:
- fixed appending again
- changed the VMSDFieldNull class to inherit from VMSDFieldGeneric
v2:
https://lore.kernel.org/r/20250109140959.19464-1-faro...@suse.de
- dropped comments patch
- new patch 4: rename the field to nullptr
- patch 6: add a sample JSON, fix the appending code
v1:
h
On Fri, Dec 20, 2024, 8:13 AM Markus Armbruster wrote:
> John Snow writes:
>
> > This patch adds an explicit section tag to all QAPIDoc
> > sections. Members/Features are now explicitly tagged as such, with the
> > name now being stored in a dedicated "name" field (which qapidoc.py was
> > not a
On 1/9/25 09:06, Alex Bennée wrote:
All of the failures to configure devices will result in QEMU exiting
with an error code. In preparation for passing Error * down the chain
re-name the iterator to foreach_device_config_or_exit and exit using
&error_fatal instead of returning a failure indicatio
On 1/9/25 09:06, Alex Bennée wrote:
While it would be technically correct to allow an IRQ to happen (as
the offending instruction never really completed) it messes up
instrumentation. We already take care to only use memory
instrumentation on the block, we should also suppress IRQs.
Signed-off-b
On Thu, Jan 09, 2025 at 01:56:40PM +0100, Roman Penyaev wrote:
> Hi,
>
> On Tue, Jan 7, 2025 at 3:57 PM Marc-André Lureau
> wrote:
> > Whether we talk about multiplexing front-end or back-end, the issues
> > are similar. In general, mixing input will create issues. Teeing
> > output is less probl
On Thu, Jan 9, 2025, 5:34 AM Markus Armbruster wrote:
> John Snow writes:
>
> > On Fri, Dec 20, 2024 at 9:15 AM Markus Armbruster
> wrote:
> >
> >> John Snow writes:
> >>
> >> > This method adds the options/preamble to each definition block.
> Notably,
> >> > :since: and :ifcond: are added, as
From: Peter Xu
Use machine_get_container() whenever applicable across the tree.
Signed-off-by: Peter Xu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20241121192202.4155849-11-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
hw/core/gpio.c
From: Peter Xu
Use object_get_container() whenever applicable across the tree.
Signed-off-by: Peter Xu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20241121192202.4155849-13-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
backends/cryptodev.c
The following changes since commit 3f8bcbba3b320c610689576fc47595f1076198dd:
Merge tag 'pull-request-2025-01-08' of https://gitlab.com/thuth/qemu into
staging (2025-01-08 11:38:21 -0500)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/qom-qdev-202
From: Peter Xu
Now there's no user of container_get(), remove it.
Signed-off-by: Peter Xu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20241121192202.4155849-14-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/qom/object.h | 11
From: Akihiko Odaki
It is no longer used.
Signed-off-by: Akihiko Odaki
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Message-ID: <20250104-reuse-v18-14-c349eafd8...@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 4
hw/core/qdev.c
From: Peter Xu
Currently, qdev_get_machine() has a slight misuse on container_get(), as
the helper says "get a container" but in reality the goal is to get the
machine object. It is still a "container" but not strictly.
Note that it _may_ get a container (at "/machine") in our current unit test
Only qemu_create_machine_containers() uses the
machine_containers[] array, restrict the scope
to this single user.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Peter Xu
Reviewed-by: Richard Henderson
Message-Id: <20250102211800.79235-9-phi...@linaro.org>
---
system/vl.c | 16 +++
Nabih Estefan writes:
> This patch series modifies the ARM SMMUv3 to be able to work with an
> implementation specific StreamID that does not match exactly the PCIe BDF.
> The way to achieve this is by converting the smmu_get_sid and smmu_iommu_mr
> functions to virtual functions that can be over
From: Paolo Bonzini
The "concrete_class" field of InterfaceClass is only ever written, and as far
as I can tell is not particularly useful when debugging either; remove it.
Signed-off-by: Paolo Bonzini
Reviewed-by: Peter Maydell
Message-ID: <20250107111308.21886-1-pbonz...@redhat.com>
Signed-o
From: Akihiko Odaki
vfio_pci_size_rom() distinguishes whether rombar is explicitly set to 1
by checking dev->opts, bypassing the QOM property infrastructure.
Use -1 as the default value for rombar to tell if the user explicitly
set it to 1. The property is also converted from unsigned to signed.
On 9/1/25 18:06, Alex Bennée wrote:
We don't need to wrap usb_device_add as usb_parse is already gated
with an if (machine_usb(current_machine)) check. Instead just assert
and directly fail if usbdevice_create returns NULL.
Signed-off-by: Alex Bennée
---
system/vl.c | 22 -
On Thu, Jan 9, 2025, 6:48 AM Markus Armbruster wrote:
> John Snow writes:
>
> > On Thu, Dec 19, 2024 at 7:31 AM Markus Armbruster
> wrote:
> >
> >> John Snow writes:
> >>
> >> > based-on:
> >> https://patchew.org/QEMU/20241213011307.2942030-1-js...@redhat.com/
> >> >
> >> > Hi!
> >> >
> >> > T
From: Pierrick Bouvier
Signed-off-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Message-Id: <20241217224306.2900490-7-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/cache.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git
When a QDev instance is realized, qdev_get_machine() ends up called.
In the next commit, qdev_get_machine() will require a "machine"
container to be always present. To satisfy this QOM containers design,
Implement qdev_create_fake_machine() which creates a fake "machine"
container for user emulatio
From: Peter Xu
Add a helper to fetch machine containers. Add some sanity check around.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Xu
Message-ID: <20241121192202.4155849-10-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/hw/q
From: Peter Xu
Add a helper to fetch a root container (under object_get_root()). Sanity
check on the type of the object.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Peter Xu
Message-ID: <20241121192202.4155849-12-pet...@redhat.com>
Signed-off-by: Philip
On Thu, Jan 9, 2025, 3:00 AM Markus Armbruster wrote:
> John Snow writes:
>
> > On Fri, Dec 20, 2024 at 8:22 AM Markus Armbruster
> wrote:
> >
> >> John Snow writes:
> >>
> >> > This is for the sake of the new rST generator (the "transmogrifier")
> so
> >> > we can advance multiple lines on oc
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-5-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/plugins/mem.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/tcg/p
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-10-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/hwprofile.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-9-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/cflow.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-12-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
configure | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/configur
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-11-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/hotpages.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/contrib
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