> #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
> @@ -1885,6 +1886,9 @@ static void ram_block_add(RAMBlock *new_block, Error
> **errp)
> qemu_mutex_unlock_ramlist();
> goto out_free;
> }
> +
> +GuestMemfdManager *gmm =
> GUEST_MEMFD_MANAGER(object_new(TYPE_GUEST_M
On 1/8/2025 7:38 PM, Alexey Kardashevskiy wrote:
>
>
> On 8/1/25 17:28, Chenyi Qiang wrote:
>> Thanks Alexey for your review!
>>
>> On 1/8/2025 12:47 PM, Alexey Kardashevskiy wrote:
>>> On 13/12/24 18:08, Chenyi Qiang wrote:
Commit 852f0048f3 ("RAMBlock: make guest_memfd require uncoordin
John Snow writes:
> On Wed, Dec 18, 2024, 5:58 AM Markus Armbruster wrote:
>
>> John Snow writes:
>>
>> > This patch adds an explicit section tag to all QAPIDoc
>> > sections. Members/Features are now explicitly tagged as such, with the
>> > name now being stored in a dedicated "name" field (wh
At present, the libqos/fw_cfg.c library does not support the modern DMA
interface which is required to write to the fw_cfg files. It only uses the IO
interface. Implement read and write methods based on DMA. This will enable
developers to write tests that writes to the fw_cfg file(s). The structure
John Snow writes:
> On Wed, Dec 18, 2024, 7:27 AM Markus Armbruster wrote:
>
>> John Snow writes:
>>
>> > Since 3c5f6114 we no longer actually generate Example sections, so this
>>
>> Suggest s/generate/support/
>>
>
> I meant to say: because the parser doesn't support them, it no longer
> crea
This patchset enables DMA interface support for writing fw-cfg files in
libqtest. The first patch is just a code refactoring so that fw-cfg
directory parsing can be part of a separate helper function.
The second patch is the actual patch that introduces two new apis for
writing and reading fw-cfg f
fw-cfg file directory iteration code can be used by other functions that may
want to implement fw-cfg file operations. Refactor it into a smaller helper
so that it can be reused.
No functional change.
Signed-off-by: Ani Sinha
---
tests/qtest/libqos/fw_cfg.c | 63
Hi Cedric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Thursday, January 9, 2025 3:02 PM
> To: Jamin Lin ; Andrew Jeffery
> ; Peter Maydell ;
> Steven Lee ; Troy Lee ;
> Joel Stanley ; open list:ASPEED BMCs
> ; open list:All patches CC here
>
> Cc: Troy Lee ; Yunlin Tang
>
> S
On 1/9/25 03:26, Jamin Lin wrote:
Hi Andrew,
From: Andrew Jeffery
Sent: Thursday, January 9, 2025 9:59 AM
To: Jamin Lin ; Cédric Le Goater ;
Peter Maydell ; Steven Lee
; Troy Lee ; Joel Stanley
; open list:ASPEED BMCs ; open
list:All patches CC here
Cc: Troy Lee ; Yunlin Tang
Subject: Re: [P
Since cpu number can be acquired from possible_cpu_arch_ids(),
num-cpu property is not necessary. Here remove num-cpu property
for object TYPE_LOONGARCH_EXTIOI_COMMON object.
Signed-off-by: Bibo Mao
Reviewed-by: Bibo Mao
---
hw/intc/loongarch_extioi_common.c | 1 -
hw/loongarch/virt.c
iFrom LoongArch Reference Manual pte width can be 64bit, 128bit
or more. Instead real hardware only supports 64bit pte width.
For 12bit pte, there is no detail definition for all 128bit
from manual.
Here only 64bit pte width is supported for simplicity, will add
this in later if real hw support it
Supported CPU number can be acquired from function
possible_cpu_arch_ids(), cpu-num property is not necessary.
Signed-off-by: Bibo Mao
Reviewed-by: Bibo Mao
---
hw/intc/loongarch_extioi.c| 6 --
hw/intc/loongarch_extioi_common.c | 17 +++--
include/hw/in
From: Jiaxun Yang
Convert to use sszie_t to represent size internally to avoid
large image overflowing the size.
Suggested-by: Richard Henderson
Signed-off-by: Jiaxun Yang
Signed-off-by: Bibo Mao
Reviewed-by: Bibo Mao
---
hw/arm/boot.c | 2 +-
hw/core/loader.c| 4 ++--
include/hw/
From: Jiaxun Yang
Support booting such image by parsing header as per Linux's
specification [1].
This enabled booting vmlinux.efi/vmlinuz.efi shipped by
distros without supplying BIOS.
[1]: https://docs.kernel.org/arch/loongarch/booting.html
Signed-off-by: Jiaxun Yang
Signed-off-by: Bibo Mao
The simliar with IPI interrupt controller, physical cpu id is used
for irq routing for extioi interrupt controller.
Signed-off-by: Bibo Mao
Reviewed-by: Bibo Mao
---
hw/intc/loongarch_extioi.c | 30 ++
1 file changed, 26 insertions(+), 4 deletions(-)
diff --git a/hw
The following changes since commit 3f8bcbba3b320c610689576fc47595f1076198dd:
Merge tag 'pull-request-2025-01-08' of https://gitlab.com/thuth/qemu into
staging (2025-01-08 11:38:21 -0500)
are available in the Git repository at:
https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-2025010
pcie_sriov doesn't have code to restore its state after migration, but
igb, which uses pcie_sriov, naively claimed its migration capability.
Add code to register VFs after migration and fix igb migration.
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Signed-off-by: Akihiko Odaki
---
in
The SR-IOV PFs set the multifunction bit during device realization so
check them after that. There is no functional change because we
explicitly ignore the multifunction bit for SR-IOV devices.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 28 +---
1 file cha
num_vfs is not migrated so use PCI_SRIOV_CTRL_VFE and PCI_SRIOV_NUM_VF
instead.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pcie_sriov.h | 1 -
hw/pci/pcie_sriov.c | 38 +++---
hw/pci/trace-events | 2 +-
3 files changed, 28 insertions(+), 13
Disable SR-IOV VF devices by reusing code to power down PCI devices
instead of removing them when the guest requests to disable VFs. This
allows to realize devices and report VF realization errors at PF
realization time.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pcie_sriov.h | 1 -
hw/pci
It is no longer used.
Signed-off-by: Akihiko Odaki
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
---
include/hw/qdev-core.h | 4
hw/core/qdev.c | 1 -
system/qdev-monitor.c | 12 +++-
3 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/i
vfio_pci_size_rom() distinguishes whether rombar is explicitly set to 1
by checking dev->opts, bypassing the QOM property infrastructure.
Use -1 as the default value for rombar to tell if the user explicitly
set it to 1. The property is also converted from unsigned to signed.
-1 is signed so it is
Disabled means it is a disabled SR-IOV VF and hidden from the guest.
Do not create DT when starting the system and also keep the disabled PCI
device not linked to DRC, which generates DT in case of hotplug.
Signed-off-by: Akihiko Odaki
Reviewed-by: Shivaprasad G Bhat
Tested-by: Shivaprasad G Bhat
A PF may automatically create VFs and the PF may be function 0.
Signed-off-by: Akihiko Odaki
Reviewed-by: Shivaprasad G Bhat
Tested-by: Shivaprasad G Bhat
---
hw/ppc/spapr_pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index
A device gets automatically unrealized when being unparented.
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index e9b23221d713..499becd5273f 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_
Release VFs failed to realize just as we do in unregister_vfs().
Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization
(SR/IOV)")
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sri
pci_new() aborts when creating a VF with addr >= PCI_DEVFN_MAX.
Signed-off-by: Akihiko Odaki
---
docs/pcie_sriov.txt | 8 +---
include/hw/pci/pcie_sriov.h | 5 +++--
hw/net/igb.c| 10 +++---
hw/nvme/ctrl.c | 22 ++
hw/pci/pcie_sr
The guest cannot use VFs due to the lack of multifunction support but
can use PFs.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 8c5eb69f7d76..c396d55c72
Supersedes: <20240714-rombar-v2-0-af1504ef5...@daynix.com>
("[PATCH v2 0/4] hw/pci: Convert rom_bar into OnOffAuto")
I submitted a RFC series[1] to add support for SR-IOV emulation to
virtio-net-pci. During the development of the series, I fixed some
trivial bugs and made improvements that I think
VFs are automatically created by PF, and creating zpci for them will
result in unexpected usage of fids. Currently QEMU does not support
multifunction for s390x so we don't need zpci for VFs anyway.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 21 +++--
1 file chang
The renamed state will not only represent powering state of PFs, but
also represent SR-IOV VF enablement in the future.
Signed-off-by: Akihiko Odaki
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h| 1 +
include/hw/pci/pci_device.h | 2 +-
hw/pci/pci.c| 17
On 08/01/2025 19:10, Michael S. Tsirkin wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> On Fri, Nov 29, 2024 at 07:44:00AM +, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu
"Michael S. Tsirkin" writes:
> On Sat, Jan 04, 2025 at 04:36:04PM +0900, Akihiko Odaki wrote:
>> This series was spun off from:
>> "[PATCH 0/3] virtio-net: Convert feature properties to OnOffAuto"
>> (https://patchew.org/QEMU/20240714-auto-v3-0-e27401aab...@daynix.com/)
>>
>> Some features are n
I saw various sanitizer errors when running check-qtest-ppc64. While
I could just turn off sanitizers, I decided to tackle them this time.
Unfortunately, GLib versions older than 2.81.0 do not free test data in
some cases so some sanitizer errors remain. All sanitizer errors will be
gone with this
memory_region_update_container_subregions() used to call
memory_region_ref(), which creates a reference to the owner of the
subregion, on behalf of the owner of the container. This results in a
circular reference if the subregion and container have the same owner.
memory_region_ref() creates a ref
Do not refer to "memory region's reference count"
-
Now MemoryRegions do have their own reference counts, but they will not
be used when their owners are not themselves. However, the documentation
of memory_region_ref() says it adds "1 to a memory re
On 1/8/2025 12:47 PM, Alexey Kardashevskiy wrote:
> On 13/12/24 18:08, Chenyi Qiang wrote:
>> Introduce the realize()/unrealize() callbacks to initialize/uninitialize
>> the new guest_memfd_manager object and register/unregister it in the
>> target MemoryRegion.
>>
>> Guest_memfd was initially s
On Mon, Dec 16, 2024 at 10:01:29AM +, Shameerali Kolothum Thodi wrote:
> And patches prior to this commit adds that support:
> 4ccdbe3: ("cover-letter: Add HW accelerated nesting support for arm
> SMMUv3")
>
> Nicolin is soon going to send out those for review. Or I can include
> those in thi
On 1/9/2025 10:55 AM, Alexey Kardashevskiy wrote:
>
>
> On 9/1/25 13:11, Chenyi Qiang wrote:
>>
>>
>> On 1/8/2025 7:20 PM, Alexey Kardashevskiy wrote:
>>>
>>>
>>> On 8/1/25 21:56, Chenyi Qiang wrote:
On 1/8/2025 12:48 PM, Alexey Kardashevskiy wrote:
> On 13/12/24 18:08, Chen
Add some missing fields which may be parsed by userspace
applications.
Signed-off-by: Helge Deller
v2:
- fixed cpu name and type depending on currently active CPU
diff --git a/linux-user/sparc/target_proc.h b/linux-user/sparc/target_proc.h
index 3bb3134a47..744fa10730 100644
--- a/linux-user/sp
When IOPMP is enabled, memory access to system memory from devices and
the CPU will be checked by the IOPMP.
The issue of CPU access to non-CPU address space via IOMMU was previously
mentioned by Jim Shu, who provided a patch[1] to fix it. IOPMP also requires
this patch.
You can use a customized
Signed-off-by: Ethan Chen
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c| 3 +++
target/riscv/cpu_cfg.h| 2 ++
target/riscv/cpu_helper.c | 18 +++---
3 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index b8d5
If the IOMMU granularity is smaller than the TARGET_PAGE size, there may be
multiple entries within the same page. To obtain the correct result, pass
the original address to the IOMMU.
Similar to the RISC-V PMP solution, the TLB_INVALID_MASK will be set when
there are multiple entries in the same
Support IOPMP specification v0.9.2RC3.
The specification url:
https://github.com/riscv-non-isa/iopmp-spec/releases/tag/v0.9.2-RC3
The IOPMP checks whether memory access from a device or CPU is valid.
This implementation uses an IOMMU to modify the address space accessed
by the device.
For device
- Add 'iopmp=on' option to enable IOPMP. It adds iopmp devices virt machine
to protect all regions of system memory.
Signed-off-by: Ethan Chen
---
docs/system/riscv/virt.rst | 7
hw/riscv/Kconfig | 1 +
hw/riscv/virt.c| 75 ++
in
This device determines the target IOPMP device for forwarding information
based on:
* Address: For parallel IOPMP devices
* Stage: For cascading IOPMP devices
Signed-off-by: Ethan Chen
---
hw/misc/meson.build | 1 +
hw/misc/riscv_iopmp_dispatcher.c | 136 ++
The entire valid transaction must fit within a single IOPMP entry.
However, during IOMMU translation, the transaction size is not
available. This structure defines the transaction information required
by the IOPMP.
Signed-off-by: Ethan Chen
---
include/hw/misc/riscv_iopmp_txn_info.h | 38 +++
Allow memory regions to have different behaviors for read and fetch
operations.
For example, the RISC-V IOPMP could raise an interrupt when the CPU
tries to fetch from a non-executable region.
If the fetch operation for a memory region is not implemented, the read
operation will still be used for
Make other device can use /hw/core/stream.c by select this config.
Reviewed-by: Alistair Francis
Signed-off-by: Ethan Chen
---
hw/Kconfig | 1 +
hw/core/Kconfig | 3 +++
hw/core/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/Kconfig b/hw/Kconfi
On Wed, 8 Jan 2025, Rob Landley wrote:
On 1/8/25 08:59, Alex Bennée wrote:
Rob Landley writes:
On 1/7/25 12:05, Alex Bennée wrote:
Stafford Horne writes:
I have not used -hda before, do you have it working with other targets?
According to the qemu docs in qemu-options.hx. I see:
Us
On 9/1/25 13:11, Chenyi Qiang wrote:
On 1/8/2025 7:20 PM, Alexey Kardashevskiy wrote:
On 8/1/25 21:56, Chenyi Qiang wrote:
On 1/8/2025 12:48 PM, Alexey Kardashevskiy wrote:
On 13/12/24 18:08, Chenyi Qiang wrote:
As the commit 852f0048f3 ("RAMBlock: make guest_memfd require
uncoordina
On 1/9/25 01:40, Richard Henderson wrote:
On 1/8/25 15:21, Helge Deller wrote:
My suggestion:
I change my patch to just add:
+ dprintf(fd, "ncpus probed\t: %d\n", num_cpus);
+ dprintf(fd, "ncpus active\t: %d\n", num_cpus);
+ dprintf(fd, "State:\n");
+ for (i = 0; i < num_cpus; i++)
Hi Andrew,
> From: Andrew Jeffery
> Sent: Thursday, January 9, 2025 9:59 AM
> To: Jamin Lin ; Cédric Le Goater ;
> Peter Maydell ; Steven Lee
> ; Troy Lee ; Joel Stanley
> ; open list:ASPEED BMCs ; open
> list:All patches CC here
> Cc: Troy Lee ; Yunlin Tang
>
> Subject: Re: [PATCH v1 1/3] hw/t
Hi Harsh,
Thank you for pointing that out!
I will withdraw my submission.
regards,
--
email:dan...@linux.ibm.com
On 2025-01-08 00:17, Harsh Prateek Bora wrote:
+ Shivaprasad (had posted patches for DAWR1/DAWRX1 earlier)
https://lore.kernel.org/qemu-devel/170679876639.188422.11634974895844092
On 1/8/2025 7:20 PM, Alexey Kardashevskiy wrote:
>
>
> On 8/1/25 21:56, Chenyi Qiang wrote:
>>
>>
>> On 1/8/2025 12:48 PM, Alexey Kardashevskiy wrote:
>>> On 13/12/24 18:08, Chenyi Qiang wrote:
As the commit 852f0048f3 ("RAMBlock: make guest_memfd require
uncoordinated discard") high
On Wed, 8 Jan 2025, Rob Landley wrote:
On 1/8/25 07:01, BALATON Zoltan wrote:
On Tue, 7 Jan 2025, Rob Landley wrote:
What's the alternative to -hda you suggest for that?
Can I do "./run-qemu.sh -drive file=blah.img" without the rest? Perhaps
specify all the details in the script and then opti
On Mon, 2024-12-16 at 15:53 +0800, Jamin Lin wrote:
> It set "aspeed_timer_ops" struct which containing read and write
> callbacks
> to be used when I/O is performed on the TIMER region.
>
> Besides, in the previous design of ASPEED SOCs, the timer registers
> address
> space are contiguous.
>
>
On 1/8/25 15:21, Helge Deller wrote:
My suggestion:
I change my patch to just add:
+ dprintf(fd, "ncpus probed\t: %d\n", num_cpus);
+ dprintf(fd, "ncpus active\t: %d\n", num_cpus);
+ dprintf(fd, "State:\n");
+ for (i = 0; i < num_cpus; i++) {
+ dprintf(fd, "CPU%d:\t\t: online\
On 1/8/25 23:59, Richard Henderson wrote:
On 1/8/25 13:16, Helge Deller wrote:
Add some missing fields which may be parsed by userspace
applications.
Signed-off-by: Helge Deller
diff --git a/linux-user/sparc/target_proc.h b/linux-user/sparc/target_proc.h
index 3bb3134a47..172d089fed 100644
--
On 1/8/25 13:16, Helge Deller wrote:
Add some missing fields which may be parsed by userspace
applications.
Signed-off-by: Helge Deller
diff --git a/linux-user/sparc/target_proc.h b/linux-user/sparc/target_proc.h
index 3bb3134a47..172d089fed 100644
--- a/linux-user/sparc/target_proc.h
+++ b/li
On Fri, Dec 20, 2024 at 9:15 AM Markus Armbruster wrote:
> John Snow writes:
>
> > This method adds the options/preamble to each definition block. Notably,
> > :since: and :ifcond: are added, as are any "special features" such as
> > :deprecated: and :unstable:.
> >
> > Signed-off-by: John Snow
On 1/8/25 07:01, BALATON Zoltan wrote:
On Tue, 7 Jan 2025, Rob Landley wrote:
What's the alternative to -hda you suggest for that?
Can I do "./run-qemu.sh -drive file=blah.img" without the rest?
Perhaps specify all the details in the script and then optionally add
an extra argument at the end
On 1/8/25 07:26, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
This series makes semihosting config.c and console.c
target agnostic, building them once, removing symbol
collision of the following functions in the single
binary:
Queued to semihosting/next, thanks.
- qemu_semihosting_c
On 1/8/25 06:35, Craig Blackmore wrote:
+GEN_VEXT_LDST_ATOMIC_HOST(2, uint16_t)
+GEN_VEXT_LDST_ATOMIC_HOST(4, uint32_t)
+#ifdef CONFIG_ATOMIC64
+GEN_VEXT_LDST_ATOMIC_HOST(8, uint64_t)
+#endif
...
+/*
+ * If !HAVE_ATOMIC128_RO, then atomic16_set may be implemented with a
+ * 16-byte
On Fri, Dec 20, 2024 at 9:21 AM Markus Armbruster wrote:
> John Snow writes:
>
> > The format_type() method is adjusted here to return None for features,
> > because Features don't have documented types. This makes
> > generate_field() safe to use for features.
>
> I'm confused: the patch doesn'
On 1/8/25 10:26, Geert Uytterhoeven wrote:
Hi Rob,
On Wed, Jan 8, 2025 at 5:23 PM Rob Landley wrote:
On 1/8/25 02:24, Geert Uytterhoeven wrote:
On Tue, Jan 7, 2025 at 11:53 PM Rob Landley wrote:
Microblaze has no /dev/?da (as in there's no device I could attach it to
even with the long opti
On 1/8/25 08:59, Alex Bennée wrote:
Rob Landley writes:
On 1/7/25 12:05, Alex Bennée wrote:
Stafford Horne writes:
I have not used -hda before, do you have it working with other targets?
According to the qemu docs in qemu-options.hx. I see:
Use file as hard disk 0, 1, 2 or 3 image o
On 1/8/25 14:14, Philippe Mathieu-Daudé wrote:
static void gen_bsl1n_vec(unsigned vece, TCGv_vec d, TCGv_vec n,
TCGv_vec m, TCGv_vec k)
{
- if (TCG_TARGET_HAS_bitsel_vec) {
- tcg_gen_not_vec(vece, n, n);
- tcg_gen_bitsel_vec(vece, d, k, n, m);
-
On 31/12/24 20:06, Philippe Mathieu-Daudé wrote:
Respin of:
https://lore.kernel.org/qemu-devel/20241229234154.32250-1-del...@kernel.org/
"Add CPU reset function and speed up runtime and translation."
Since v3:
- Added tests, dropped R-b tags
Helge Deller (4):
target/hppa: Convert hppa_cpu_in
On 7/1/25 09:01, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h| 3 +--
tcg/optimize.c | 30 ++
tcg/tcg-op.c | 4 ++--
tcg/tcg.c| 6 ++
tcg/tci.c| 11 +-
From: Helge Deller
Avoid using the same error message for two different code paths
as it complicates determining the one which actually triggered.
Signed-off-by: Helge Deller
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Laurent Vivier
---
linux-user/syscall.c | 4 ++--
1 file changed, 2
On 8/1/25 22:38, Richard Henderson wrote:
On 1/8/25 09:46, Philippe Mathieu-Daudé wrote:
On 7/1/25 08:59, Richard Henderson wrote:
Rely on tcg-op-vec.c to expand the opcode if missing.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-sve.c | 20
1 file cha
On 12/31/24 20:06, Philippe Mathieu-Daudé wrote:
Add quick firmware boot tests (less than 1sec) for the
B160L (32-bit) and C3700 (64-bit) HPPA machines:
$ make check-functional-hppa
1/4 qemu:func-quick+func-hppa / func-hppa-empty_cpu_model OK 0.13s 1
subtests passed
2/4 qemu:func-quick
On 14.12.24 14:45, “William Roche wrote:
From: David Hildenbrand
We want to reuse the functionality when remapping or resizing RAM.
We should drop the "or resizing of RAM." part, as that does no longer apply.
Signed-off-by: David Hildenbrand
Signed-off-by: William Roche
---
--
Cheers,
On 7/1/25 09:00, Richard Henderson wrote:
This flag is no longer used.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-opc.h | 22 +++---
include/tcg/tcg.h | 2 --
2 files changed, 11 insertions(+), 13 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/25 09:00, Richard Henderson wrote:
Pass TCGOp.type to the output function.
For aarch64 and tci, use this instead of testing TCG_OPF_64BIT.
For s390x, use this instead of testing INDEX_op_deposit_i64.
For i386, use this to initialize rexw.
Signed-off-by: Richard Henderson
---
tcg/tcg.c
From: Helge Deller
This fixes the following qemu warnings when building debian gupnp package:
Unknown host QEMU_IFLA type: 61
Unknown host QEMU_IFLA type: 58
Unknown host QEMU_IFLA type: 59
Unknown host QEMU_IFLA type: 60
Unknown host QEMU_IFLA type: 32820
QEMU_IFLA type 32820 is actually N
From: Helge Deller
Share code with IP_ADD_MEMBERSHIP/IP_DROP_MEMBERSHIP.
Signed-off-by: Helge Deller
---
linux-user/syscall.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index bbe2560927..4360543e20 100644
--- a
From: Helge Deller
Fixes various warnings in the testsuite while building gupnp:
gssdp-net-DEBUG: Failed to send netlink message: Operation not supported
gupnp-context-DEBUG: Mismatch between host header and host IP (example.com,
expected: 127.0.0.1)
gupnp-context-DEBUG: Mismatch between host
From: Helge Deller
Fixes those warnings:
Unsupported host ancillary data: 0/8
Signed-off-by: Helge Deller
---
linux-user/syscall.c | 12
1 file changed, 12 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 494323efba..bbe2560927 100644
--- a/linux-user
From: Helge Deller
The following changes since commit 791e3837c1105aec4e328674aad32e34056957e2:
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
(2024-11-25 10:44:11 +)
are available in the Git repository at:
https://github.com/hdeller/qemu-hppa.git
tags/
From: Helge Deller
Fixes this warning:
Unknown host IFA type: 11
Signed-off-by: Helge Deller
---
linux-user/fd-trans.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-user/fd-trans.c b/linux-user/fd-trans.c
index c04a97c73a..a86ed2f4b4 100644
--- a/linux-user/fd-trans.c
+++ b/linux-
On 7/1/25 09:00, Richard Henderson wrote:
The br, mb, goto_tb and exit_tb opcodes do not have
register operands, only constants, flags, or labels.
Remove the special case in opcode_args_ct by including
TCG_OPF_NOT_PRESENT in the flags for these opcodes.
Hmm this might answer my question about u
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/ppc/tcg-target-has.h | 124 +++
tcg/ppc/tcg-target.h | 114 +--
2 files changed, 125 insertions(+), 113 deletions(-)
c
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/i386/tcg-target-has.h | 139 ++
tcg/i386/tcg-target.h | 129 +--
2 files changed, 140 insertions(+), 128 deletions(-)
From: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/aarch64/tcg-target.h | 2 --
tcg/arm/tcg-target.h | 2 --
tcg/i386/tcg-target.h| 2 --
tcg/loongarch64/tcg-target.h | 2 --
tcg/mips/tcg-target.h| 2 --
tcg/ppc/tcg-target.h | 2 --
tcg/ris
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/tci/tcg-target-has.h | 83
tcg/tci/tcg-target.h | 75 +---
2 files changed, 84 insertions(+), 74 deletions(-)
cre
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/arm/tcg-target-has.h | 85
tcg/arm/tcg-target.h | 74 +-
2 files changed, 86 insertions(+), 73 deletions(-)
creat
On 14.12.24 14:45, “William Roche wrote:
From: William Roche
Merging and dump settings are handled by the remap notification
in addition to memory policy and preallocation.
Signed-off-by: William Roche
---
system/physmem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/system/physmem
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/loongarch64/tcg-target-has.h | 113 +++
tcg/loongarch64/tcg-target.h | 102 +---
2 files changed, 114 insertions(+), 101 deletions(-)
From: Richard Henderson
TCG_TARGET_HAS_* definitions don't need to be exposed
by "tcg/tcg.h". Only include 'tcg-has.h' when necessary.
Signed-off-by: Philippe Mathieu-Daudé
---
include/tcg/tcg.h | 2 --
tcg/optimize.c| 1 +
tcg/tcg-common.c | 1 +
tcg/tcg-op-gvec.c | 1 +
tcg/tcg-op-ldst.
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/sparc64/tcg-target-has.h | 86
tcg/sparc64/tcg-target.h | 78 +---
2 files changed, 88 insertions(+), 76 deletions(-)
cre
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/s390x/tcg-target-has.h | 124 +
tcg/s390x/tcg-target.h | 114 +-
2 files changed, 125 insertions(+), 113 deletions(-)
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/mips/tcg-target-has.h | 122 ++
tcg/mips/tcg-target.h | 112 +-
2 files changed, 123 insertions(+), 111 deletions(-)
c
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/riscv/tcg-target-has.h | 112 +
tcg/riscv/tcg-target.h | 102 +
2 files changed, 113 insertions(+), 101 deletions(-)
c
From: Richard Henderson
Left-over from commit 623d7e3551a ("util: Add cpuinfo-ppc.c").
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/ppc/tcg-target.h | 8
1 file changed, 8 deletions(-)
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index 8
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/tcg/tcg.h | 105 +-
tcg/tcg-has.h | 115 ++
2 files changed, 116 insertions(+), 104 deletions(-)
c
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/aarch64/tcg-target-has.h | 119 +++
tcg/aarch64/tcg-target.h | 109 +---
2 files changed, 120 insertions(+), 108 deletions(-)
On 14.12.24 14:45, “William Roche wrote:
From: David Hildenbrand
Let's register a RAM block notifier and react on remap notifications.
Simply re-apply the settings. Exit if something goes wrong.
Note: qemu_ram_remap() will not remap when RAM_PREALLOC is set. Could be
that hostmem is still miss
Split of <20250107080112.1175095-19-richard.hender...@linaro.org>
patch in multiple ones simpler to review (in particular
using git-diff --color-moved=dimmed-zebra option).
Richard Henderson (14):
tcg/ppc: Remove TCGPowerISA enum
tcg: Extract default TCG_TARGET_HAS_foo definitions to 'tcg-has.
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