On 12/6/24 4:08 AM, Peter Xu wrote:
On Fri, Dec 06, 2024 at 02:19:06AM +0300, Daniil Tatianin wrote:
Currently, passing mem-lock=on to QEMU causes memory usage to grow by
huge amounts:
no memlock:
$ qemu-system-x86_64 -overcommit mem-lock=off
$ ps -p $(pidof ./qemu-system-x86_64) -o
On Thu, Dec 05, 2024 at 05:28:45PM +0100, Paolo Bonzini wrote:
> Date: Thu, 5 Dec 2024 17:28:45 +0100
> From: Paolo Bonzini
> Subject: Re: [RFC 00/13] rust: Reinvent the wheel for HPET timer in Rust
>
> On 12/5/24 07:07, Zhao Liu wrote:
> > * Proper bindings for MemoryRegionOps, which needs to wr
On Thu, Dec 05, 2024 at 10:20:47PM +0100, Paolo Bonzini wrote:
> Date: Thu, 5 Dec 2024 22:20:47 +0100
> From: Paolo Bonzini
> Subject: Re: [RFC 11/13] rust/timer/hpet: add basic HPET timer & state
>
> On Thu, Dec 5, 2024 at 9:23 PM Paolo Bonzini wrote:
> > > +/// Instance id (HPET timer bloc
> > +use qemu_api::{
> > +bindings::*,
>
> Let's avoid bindings::*.
Sure.
> > +self.qemu_timer = Box::new(HPETState::timer_new_ns(
>
> Oh! I noticed now that while your API is called timer_new_ns, it is actually
> the same as timer_init_full. Let's call it init_full() then.
Sure,
On Fri, 6 Dec 2024 12:20:29 +0100
Christian Schoenebeck wrote:
> The released fix for this CVE:
>
> f6b0de53fb8 ("9pfs: prevent opening special files (CVE-2023-2861)")
>
> caused a regression with security_model=passthrough. When handling a
> 'Tmknod' request there was a side effect that 'Tmk
On 06/12/2024 20.28, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
docs/devel/submitting-a-patch.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/docs/devel/submitting-a-patch.rst
b/docs/devel/submitting-a-patch.rst
index 69df7682c5e..1ef7d137320 100644
--- a
On 12/6/24 14:48, Thomas Huth wrote:
On 06/12/2024 14.11, Cédric Le Goater wrote:
This simply moves the ast1030 tests to a new test file. No changes.
Signed-off-by: Cédric Le Goater
---
tests/functional/meson.build | 2 +
tests/functional/test_arm_aspeed.py | 64
On 2024/12/09 4:16, Phil Dennis-Jordan wrote:
This change enables the new conditional interrupt mapping support
property on the vmapple machine type's integrated XHCI controller.
The macOS guest driver attempts to use event rings 1 and 2 on the XHCI
controller, despite there being only one (PCI p
On 09/12/2024 07:24, Jason Wang wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> On Mon, Dec 9, 2024 at 2:15 PM CLEMENT MATHIEU--DRIF
> wrote:
>>
>>
>> On 09/12/2024 04:13, Jason Wang
Hi Thomas,
Reviewed-by: Clément Mathieu--Drif
Thanks
cmd
On 06/12/2024 19:17, Thomas Huth wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> Convert the intel_iommu test to the new funct
Remove the period from the subject.
On 2024/12/09 4:16, Phil Dennis-Jordan wrote:
The XHCI specification, section 4.17.1 specifies that "If Interrupter
Mapping is not supported, the Interrupter Target field shall be
ignored by the xHC and all Events targeted at Interrupter 0."
QEMU's XHCI devic
On Mon, Dec 9, 2024 at 2:15 PM CLEMENT MATHIEU--DRIF
wrote:
>
>
>
> On 09/12/2024 04:13, Jason Wang wrote:
> > Caution: External email. Do not open attachments or click links, unless
> > this email comes from a known sender and you know the content is safe.
> >
> >
> > On Wed, Dec 4, 2024 at 2:14
On 2024/12/09 4:16, Phil Dennis-Jordan wrote:
This change addresses an edge case that trips up macOS guest drivers
for PCI based XHCI controllers. The guest driver would attempt to
schedule events to XHCI event rings 1 and 2 even when only one interrupt
line is available; interrupts would therefo
On 09/12/2024 04:13, Jason Wang wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> On Wed, Dec 4, 2024 at 2:14 PM CLEMENT MATHIEU--DRIF
> wrote:
>>
>>
>>
>> On 04/12/2024 04:34, Jason
On 12/6/2024 4:00 AM, Hendrik Wuethrich wrote:
From: Hendrik Wüthrich
Add RDT features to feature word / TCG.
Signed-off-by: Hendrik Wüthrich
---
target/i386/cpu.c | 30 --
target/i386/cpu.h | 2 ++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --gi
On Wed, Dec 4, 2024 at 2:14 PM CLEMENT MATHIEU--DRIF
wrote:
>
>
>
> On 04/12/2024 04:34, Jason Wang wrote:
> > Caution: External email. Do not open attachments or click links, unless
> > this email comes from a known sender and you know the content is safe.
> >
> >
> > On Mon, Nov 11, 2024 at 4:3
On Wed, Dec 4, 2024 at 1:40 AM Peter Xu wrote:
> On Tue, Dec 03, 2024 at 10:15:57AM -0300, Fabiano Rosas wrote:
> > We shouldn't be adding warnings to the build like that. When building
> > static binaries, I'd assume the person at least knows there's a -static
> > in there somewhere. If you're j
> I was curious as to why this helped, when arg_new_temp was supposed to be
> doing exactly
> this. It turns out we were incorrectly reusing an old temp, not allocating a
> new one.
I appreciate your explanation of the issue. I had attempted to update the
z_mask in
init_ts_info when the temp
On Sat, Dec 7, 2024, 6:12 AM Peter Xu wrote:
> On Fri, Dec 06, 2024 at 07:24:58PM +0100, Maciej S. Szmigiero wrote:
> > On 5.12.2024 20:46, Zhang Chen wrote:
> > > On Thu, Dec 5, 2024 at 5:30 AM Peter Xu wrote:
> > > >
> > > > On Sun, Nov 17, 2024 at 08:20:00PM +0100, Maciej S. Szmigiero wrote:
On Fri, 2024-12-06 at 10:28 +0100, Gerd Hoffmann wrote:
> >
> > OPAL (well skiboot) doesn't display anything anyways (or at least
> > it
> > didn't when I wrote it :-). It just boots Linux as a bootloader. So
> > as
> > long as Linux itself sets the register it should be fine.
>
> Oh, mixed up th
Initialize x with accumulated via direct assignment,
rather than multiplying by 1.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/fma_emu.c b/target/hexagon/fma_emu.c
index 6749538c09..bc6e742639 10
This massive macro is now only used once.
Expand it for use only by float64.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.c | 253 +++
1 file changed, 125 insertions(+), 128 deletions(-)
diff --git a/target/hexagon/fma_emu.c b/target/hexagon/fm
This instruction has a special case that 0 * x + c returns c
without the normal sign folding that comes with 0 + -0.
Use the new float_muladd_suppress_add_product_zero to
describe this.
Signed-off-by: Richard Henderson
---
target/hexagon/op_helper.c | 11 +++
1 file changed, 3 insertions
The function is now unused.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.h | 2 -
target/hexagon/fma_emu.c | 171 ---
2 files changed, 173 deletions(-)
diff --git a/target/hexagon/fma_emu.h b/target/hexagon/fma_emu.h
index ad5df5d038..fed054b
No need to open-code 64x64->128-bit multiplication.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.c | 32 +++-
1 file changed, 3 insertions(+), 29 deletions(-)
diff --git a/target/hexagon/fma_emu.c b/target/hexagon/fma_emu.c
index 343c40a686..6749538c09
This rounding mode is used by Hexagon.
Signed-off-by: Richard Henderson
---
include/fpu/softfloat-types.h | 2 ++
fpu/softfloat-parts.c.inc | 3 +++
2 files changed, 5 insertions(+)
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
index 8f39691dfd..c6429665ce 10064
There are no special cases for this instruction.
Signed-off-by: Richard Henderson
---
target/hexagon/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index b8b556f4c6..7d459cc6f3 100644
--- a/target/hexagon/op
Use the scalbn interface instead of float_muladd_halve_result.
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c
index 8f42a28d07..265a065f6f 100644
While looking at some float_status usage, I got distracted by some
odd looking hexagon code. With some minor additions to softfloat,
we can handle all of the special cases.
I have a feeling that dfmpyhh can also be simplified, but I don't
quite grok the accumulator in this case. It appears to be
There are no special cases for this instruction. Since hexagon
always uses default-nan mode, explicitly negating the first
input is unnecessary. Use float_muladd_negate_product instead.
Signed-off-by: Richard Henderson
---
target/hexagon/op_helper.c | 5 ++---
1 file changed, 2 insertions(+),
Certain Hexagon instructions suppress changes to the result
when the product of fma() is a true zero.
Signed-off-by: Richard Henderson
---
include/fpu/softfloat.h | 5 +
fpu/softfloat-parts.c.inc | 4 +++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/fpu/softfloat.
There are no special cases for this instruction.
Remove internal_mpyf as unused.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.h | 1 -
target/hexagon/fma_emu.c | 8
target/hexagon/op_helper.c | 2 +-
3 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/targe
There are multiple special cases for this instruction.
(1) The saturate to normal maximum instead of overflow to infinity is
handled by the new float_round_nearest_even_max rounding mode.
(2) The 0 * n + c special case is handled by the new
float_muladd_suppress_add_product_zero flag.
(3) T
All uses have been convered to float*_muladd_scalbn.
Signed-off-by: Richard Henderson
---
include/fpu/softfloat.h | 3 ---
fpu/softfloat.c | 6 --
fpu/softfloat-parts.c.inc | 4
3 files changed, 13 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
We currently have a flag, float_muladd_halve_result, to scale
the result by 2**-1. Extend this to handle arbitrary scaling.
Signed-off-by: Richard Henderson
---
include/fpu/softfloat.h | 6
fpu/softfloat.c | 58 ++-
fpu/softfloat-parts.c.inc
This structure, with bitfields, is incorrect for big-endian.
Use the existing float32_getexp_raw which uses extract32.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/target/hexagon/fma_emu.c b/ta
Use the scalbn interface instead of float_muladd_halve_result.
Signed-off-by: Richard Henderson
---
target/sparc/helper.h | 4 +-
target/sparc/fop_helper.c | 8 ++--
target/sparc/translate.c | 80 +++
3 files changed, 54 insertions(+), 38 deletions(-)
This structure, with bitfields, is incorrect for big-endian.
Use extract64 and deposit64 instead.
Signed-off-by: Richard Henderson
---
target/hexagon/fma_emu.c | 46 ++--
1 file changed, 16 insertions(+), 30 deletions(-)
diff --git a/target/hexagon/fma_emu.c
On 12/8/24 12:01, Philippe Mathieu-Daudé wrote:
On 7/12/24 22:47, Richard Henderson wrote:
When allocating new temps during tcg_optmize, do not re-use
any EBB temps that were used within the TB. We do not have
any idea what span of the TB in which the temp was live.
Cc: qemu-sta...@nongnu.org
From: Alexander Graf
VMApple contains an "aes" engine device that it uses to encrypt and
decrypt its nvram. It has trivial hard coded keys it uses for that
purpose.
Add device emulation for this device model.
Signed-off-by: Alexander Graf
Signed-off-by: Phil Dennis-Jordan
Reviewed-by: Akihiko
From: Alexander Graf
Apple defines a new "vmapple" machine type as part of its proprietary
macOS Virtualization.Framework vmm. This machine type is similar to the
virt one, but with subtle differences in base devices, a few special
vmapple device additions and a vastly different boot chain.
This
From: Alexander Graf
We will introduce a number of devices that are specific to the vmapple
target machine. To keep them all tidily together, let's put them into
a single target directory.
Signed-off-by: Alexander Graf
Signed-off-by: Phil Dennis-Jordan
Reviewed-by: Akihiko Odaki
Tested-by: Ak
From: Alexander Graf
Some boards such as vmapple don't do real legacy PCI IRQ swizzling.
Instead, they just keep allocating more board IRQ lines for each new
legacy IRQ. Let's support that mode by giving instantiators a new
"nr_irqs" property they can use to support more than 4 legacy IRQ lines.
macOS's Cocoa event handling must be done on the initial (main) thread
of the process. Furthermore, if library or application code uses
libdispatch, the main dispatch queue must be handling events on the main
thread as well.
So far, this has affected Qemu in both the Cocoa and SDL UIs, although
in
From: Alexander Graf
Apple has its own virtio-blk PCI device ID where it deviates from the
official virtio-pci spec slightly: It puts a new "apple type"
field at a static offset in config space and introduces a new barrier
command.
This patch first creates a mechanism for virtio-blk downstream c
MacOS provides a framework (library) that allows any vmm to implement a
paravirtualized 3d graphics passthrough to the host metal stack called
ParavirtualizedGraphics.Framework (PVG). The library abstracts away
almost every aspect of the paravirtualized device model and only provides
and receives c
From: Alexander Graf
The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG
emulation) via virtio-pci as well as a special, simple backdoor platform
device.
This patch implements this backdoor platform device to the best of my
understanding. I left out any USB OTG parts; they
I'm happy to take responsibility for the macOS PV graphics code. As
HVF patches don't seem to get much attention at the moment, I'm also
adding myself as designated reviewer for HVF and x86 HVF to try and
improve that.
I anticipate that the resulting workload should be covered by the
funding I'm r
This patch set introduces a new ARM and macOS HVF specific machine type
called "vmapple", as well as a family of display devices based on the
ParavirtualizedGraphics.framework in macOS. One of the display adapter
variants, apple-gfx-mmio, is required for the new machine type, while
apple-gfx-pci ca
From: Alexander Graf
In addition to the ISA and PCI variants of pvpanic, let's add an MMIO
platform device that we can use in embedded arm environments.
Signed-off-by: Alexander Graf
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Phil Dennis-Jordan
Revie
This change adds a property 'display_modes' on the graphics device
which permits specifying a list of display modes. (screen resolution
and refresh rate)
The property is an array of a custom type to make the syntax slightly
less awkward to use, for example:
-device '{"driver":"apple-gfx-pci", "di
The virtio_blk_free_request() function has been a 1-liner forwarding
to g_free() for a while now. We may as well call g_free on the request
pointer directly.
Signed-off-by: Phil Dennis-Jordan
Reviewed-by: Akihiko Odaki
Tested-by: Akihiko Odaki
---
hw/block/virtio-blk.c | 43 ++
This change wires up the PCI variant of the paravirtualised
graphics device, mainly useful for x86-64 macOS guests, implemented
by macOS's ParavirtualizedGraphics.framework. It builds on code
shared with the vmapple/mmio variant of the PVG device.
Signed-off-by: Phil Dennis-Jordan
Reviewed-by: Ak
From: Alexander Graf
MacOS unconditionally disables interrupts of the physical timer on boot
and then continues to use the virtual one. We don't really want to support
a full physical timer emulation, so let's just ignore those writes.
Signed-off-by: Alexander Graf
Signed-off-by: Phil Dennis-Jo
From: Alexander Graf
Instead of device tree or other more standardized means, VMApple passes
platform configuration to the first stage boot loader in a binary encoded
format that resides at a dedicated RAM region in physical address space.
This patch models this configuration space as a qdev dev
QEMU would crash with a failed assertion if the XHCI controller
attempted to raise the interrupt on a higher vector than the highest
configured for the device by the guest driver.
This change adds a check so the interrupt is dropped instead of crashing
the VM.
Signed-off-by: Phil Dennis-Jordan
-
This change addresses an edge case that trips up macOS guest drivers
for PCI based XHCI controllers. The guest driver would attempt to
schedule events to XHCI event rings 1 and 2 even when only one interrupt
line is available; interrupts would therefore be dropped, and events
only handled on timeou
Fixes number of spaces used for indentation on one line.
Signed-off-by: Phil Dennis-Jordan
---
hw/usb/hcd-xhci-pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c
index 8e293cd5951..6b6f0f91a18 100644
--- a/hw/usb/hcd-xhci-pci.c
For a while now, I've been chasing the problem of macOS's XHCI guest driver not
working properly with QEMU's PCI XHCI controller when MSI-X is unavailable.
I've finally figured out the cause, and I think an acceptable solution. I've
explained the problem and quoted the relevant sections of the XHCI
This change enables the new conditional interrupt mapping support
property on the vmapple machine type's integrated XHCI controller.
The macOS guest driver attempts to use event rings 1 and 2 on the XHCI
controller, despite there being only one (PCI pin) interrupt channel
available. With conditiona
The XHCI specification, section 4.17.1 specifies that "If Interrupter
Mapping is not supported, the Interrupter Target field shall be
ignored by the xHC and all Events targeted at Interrupter 0."
QEMU's XHCI device has so far not specially addressed this case,
so we add a check to xhci_event() to
The NEC XHCI controller exposes the underlying PCI device's msi and
msix properties, but the superclass and thus the qemu-xhci device do
not. There does not seem to be any obvious reason for this limitation.
This change moves these properties to the superclass so they are
exposed by both PCI XHCI d
On 7/12/24 22:47, Richard Henderson wrote:
When allocating new temps during tcg_optmize, do not re-use
any EBB temps that were used within the TB. We do not have
any idea what span of the TB in which the temp was live.
Cc: qemu-sta...@nongnu.org
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND
On 7/12/24 22:56, Richard Henderson wrote:
On 12/5/24 21:12, Richard Henderson wrote:
This allows us to declare that the helper requires
a float_status pointer and not a generic void pointer.
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 4
1 file changed, 4 insertions(+)
On Thu, Dec 05, 2024 at 07:53:42PM +0100, Paolo Bonzini wrote:
> Date: Thu, 5 Dec 2024 19:53:42 +0100
> From: Paolo Bonzini
> Subject: Re: [RFC 04/13] rust: add bindings for gpio_{in|out} initialization
>
> On 12/5/24 07:07, Zhao Liu wrote:
> > The qdev_init_gpio_{in|out} are qdev interfaces, so
On Sun, Dec 08, 2024 at 10:30:34AM +0100, Paolo Bonzini wrote:
> Date: Sun, 8 Dec 2024 10:30:34 +0100
> From: Paolo Bonzini
> Subject: Re: [RFC 06/13] rust: add bindings for memattrs
>
> Il sab 7 dic 2024, 10:21 Philippe Mathieu-Daudé ha
> scritto:
>
> > >> is still decently packed and simplifi
Hello,
I was recently trying to download QEMU and noticed, on the landing page of
https://www.qemu.org/, the button titled "Full list of releases"
redirects to https://download.qemu.org/ which results in a 403 forbidden error.
the same issue is present throughout the whole site with any button or
Il sab 7 dic 2024, 10:21 Philippe Mathieu-Daudé ha
scritto:
> >> is still decently packed and simplifies things a lot.
> >
> > The old struct is 4 bytes, and the new one is 8 bytes. We do
> > a lot of directly passing 'struct MemTxAttrs' arguments around
> > as arguments to functions (i.e. not pa
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