Kevin Wolf writes:
> pci_devfn properties accept both integer and string values, but
> integer 1 and string '1' have different meanings: The integer value
> means device 0, function 1 whereas the string value '1' is short for
> '1.0' and means device 1, function 0.
This is a terrible interface.
On 22/11/24 23:50, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/fby35.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
On 22/11/24 23:50, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/cpu32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
Ping
Regards,
Zuo boqun
On 11/22/24 10:35, Stafford Horne wrote:
I just regression tested linux-6.12 against qemu-9.2.0-rc1 and I'm still
getting no output from or1k, with the current image or the old or1k release
image that worked under old qemu versions.
I tried applying your serial patch to current qemu, and it made
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/xlnx-versal-virt.rst | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/system/arm/xlnx-versal-virt.rst
b/docs/system/arm/xlnx-versal-virt.rst
index 0bafc76469d..c5f35f28e4f 100644
--- a/docs/system/arm/xlnx-versal-virt.rst
+++ b/docs/
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/emulation.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 2956c22a1b7..af613b9c8b8 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emula
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/fby35.rst | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
index bf6da6baa2a..ed9faef363c 100644
--- a/docs/system/arm/fby35.rst
+++ b/docs/system/arm/fby35.rst
@@ -45,3 +45,6 @@ proces
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/cpu32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index 20c2737f17b..4e589b747e4 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -71,7 +71,7 @@ void aa3
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/emulation.rst | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 50d0250b1eb..47f5123a31d 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -94,
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/orangepi.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/system/arm/orangepi.rst b/docs/system/arm/orangepi.rst
index 9afa54213b0..db87e81fec4 100644
--- a/docs/system/arm/orangepi.rst
+++ b/docs/system/arm/orang
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/aspeed.rst | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index 2e9ba12f7ae..d17fe7a4fc8 100644
--- a/docs/system/arm/aspeed.rst
+++ b/docs/system/arm/aspeed.rst
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/fby35.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
index 742b887d44c..bf6da6baa2a 100644
--- a/docs/system/arm/fby35.rst
+++ b/docs/system/arm/fby35.rst
@@ -12,7 +1
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/emulation.rst | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index af613b9c8b8..50d0250b1eb 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -137
Signed-off-by: Pierrick Bouvier
---
docs/bypass-iommu.txt| 2 ++
docs/system/arm/virt.rst | 15 +++
2 files changed, 17 insertions(+)
diff --git a/docs/bypass-iommu.txt b/docs/bypass-iommu.txt
index e6677bddd32..62818e44ed9 100644
--- a/docs/bypass-iommu.txt
+++ b/docs/bypass-io
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/emulation.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index a2a388f0919..2956c22a1b7 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm
Signed-off-by: Pierrick Bouvier
---
docs/system/arm/emulation.rst | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 47f5123a31d..38534dcdd32 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -37,
Reviewed following things:
- system/arm/cpu-features (options)
- system/arm/virt (options)
- boards documented and listed with -machine help (arm and aarch64)
- grep object_class_property_set_description hw/arm: ensure all options are
documented
- reviewed boards description
- reviewed all Arm fe
pci_devfn properties accept both integer and string values, but
integer 1 and string '1' have different meanings: The integer value
means device 0, function 1 whereas the string value '1' is short for
'1.0' and means device 1, function 0.
This test wants the string version so that the device actua
On 11/20/24 09:15, Xiong Nandi wrote:
The actual page size (region size for MPU) of armv7m may
smaller than TARGET_PAGE_SIZE (2^5 vs 2^10). So we should
use the actual virtual address to get the phys page address.
Signed-off-by: Xiong Nandi
---
system/physmem.c | 3 ++-
1 file changed, 2 ins
On 11/20/24 15:26, Ilya Leoshkevich wrote:
print_mmap() assumes that mmap() receives arguments via memory if
mmap2() is present. s390x (as opposed to s390) does not fit this
pattern: it does not have mmap2(), but mmap() still receives arguments
via memory.
Fix by sharing the detection logic betw
On 11/21/24 11:16, Michael Tokarev wrote:
According to Cortex-R5 r1p2 manual, register with opcode2=0 is
BTCM and with opcode2=1 is ATCM, - exactly the opposite from how
qemu labels them. Just swap the labels to avoid confusion, -
both registers are implemented as always-zero.
Signed-off-by: Mi
On 11/21/24 10:58, Alex Bennée wrote:
From: Pierrick Bouvier
Fixes: 4a448b148ca ("plugins: add qemu_plugin_num_vcpus function")
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
Message-Id: <20241112212622.3590693-2-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
--
On 11/22/24 11:26, Philippe Mathieu-Daudé wrote:
On 22/11/24 17:03, Xiaoyao Li wrote:
Currently cpu->nr_cores and cpu->nr_threads are initialized in
qemu_init_vcpu(), which is called a bit late in *cpu_realizefn() for
each ARCHes.
x86 arch would like to use nr_cores and nr_threads earlier in it
On 11/20/24 19:49, Anton Johansson wrote:
Adds a cpu_mapping struct to describe, in a declarative fashion, the
mapping between fields in a struct, and a corresponding TCG global. As
such, tcg_global_mem_new() can be automatically called given an array of
cpu_mappings.
This change is not limited
> >> Also as a heads up, I've added support for auto-inserting PCIe switch
> >> between the PXB and GPUs in libvirt to attach multiple devices to a
> SMMU
> >> node per libvirt's documentation - "If you intend to plug multiple
> >> devices into a pcie-expander-bus, you must connect a
> >> pci
On 11/20/24 19:49, Anton Johansson wrote:
Temporary vectors in helper-to-tcg generated code are allocated from an
array of bytes in CPUArchState, specified with --temp-vector-block.
This commits adds such a block of memory to CPUArchState, if
CONFIG_HELPER_TO_TCG is set.
Signed-off-by: Anton Jo
On 11/20/24 19:49, Anton Johansson wrote:
Adds a functions to return the current mmu index given tb_flags of the
current translation block. Required by helper-to-tcg in order to
retrieve the mmu index for memory operations without changing the
signature of helper functions.
Signed-off-by: Anton
On 11/20/24 19:49, Anton Johansson via wrote:
Adds a struct representing everything a LLVM value might map to in TCG,
this includes:
* TCGv (IrValue);
* TCGv_ptr (IrPtr);
* TCGv_env (IrEnv);
* TCGLabel (IrLabel);
* tcg_constant_*() (IrConst);
* 123123ull (IrImmediate);
* int
On 11/22/24 18:30, Richard Henderson wrote:
On 11/20/24 19:49, Anton Johansson wrote:
Adds a meson option for enabling/disabling helper-to-tcg along with a
CONFIG_* definition.
CONFIG_* will in future commits be used to conditionally include the
helper-to-tcg subproject, and to remove unneeded
On 11/20/24 19:49, Anton Johansson wrote:
Introduces a new python helper script to convert a set of QEMU .c files to
LLVM IR .ll using clang. Compile flags are found by looking at
compile_commands.json, and llvm-link is used to link together all LLVM
modules into a single module.
Signed-off-by:
On 11/20/24 19:49, Anton Johansson wrote:
Wrap __attribute__((annotate(str))) in a macro for convenient
function annotations. Will be used in future commits to tag functions
for translation by helper-to-tcg, and to specify which helper function
arguments correspond to immediate or vector values.
On 11/20/24 19:49, Anton Johansson wrote:
Doubles amount of space allocated for translation blocks. This is
needed, particularly for Hexagon, where a single instruction packet may
consist of up to four vector instructions. If each vector instruction
then gets expanded into gvec operations that
On 11/20/24 19:49, Anton Johansson wrote:
Adds a function pointer to the TCGContext which may be set by targets via
the TARGET_HELPER_DISPATCHER macro. The dispatcher is function
(void *func, TCGTemp *ret, int nargs, TCGTemp **args) -> bool
which allows targets to hook the generation of hel
On 11/20/24 19:49, Anton Johansson wrote:
This commit adds a gvec function for copying data from constant array
given in C to a gvec intptr_t. For each element, a host store of
each constant is performed, this is not ideal and will inflate TBs for
large vectors.
Moreover, data will be copied du
On 11/20/24 19:49, Anton Johansson wrote:
Adds new functions to the gvec API for truncating, sign- or zero
extending vector elements. Currently implemented as helper functions,
these may be mapped onto host vector instructions in the future.
For the time being, allows translation of more compli
> -Original Message-
> From: Nathan Chen
> Sent: Friday, November 22, 2024 1:42 AM
> To: Shameerali Kolothum Thodi
> Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org;
> eric.au...@redhat.com; peter.mayd...@linaro.org; j...@nvidia.com;
> ddut...@redhat.com; Linuxarm ; Wangzhou (B)
> ; jian
On Fri, Nov 22, 2024 at 3:43 AM Aleksei Filippov
wrote:
>
>
>
> > On 21 Nov 2024, at 22:54, Atish Kumar Patra wrote:
> >
> > On Wed, Nov 20, 2024 at 6:25 AM Aleksei Filippov
> > wrote:
> >>
> >>
> >>
> >>> On 22 Oct 2024, at 15:58, Atish Kumar Patra wrote:
> >>>
> >>> On Mon, Oct 21, 2024 at 6:
On 11/20/24 19:49, Anton Johansson wrote:
Adds necessary helper functions for mapping LLVM IR onto TCG.
Specifically, helpers corresponding to the bitreverse and funnel-shift
intrinsics in LLVM.
Note: these may be converted to more efficient implementations in the
future, but for the time being
On 22/11/24 17:03, Xiaoyao Li wrote:
Currently cpu->nr_cores and cpu->nr_threads are initialized in
qemu_init_vcpu(), which is called a bit late in *cpu_realizefn() for
each ARCHes.
x86 arch would like to use nr_cores and nr_threads earlier in its
realizefn(). To serve this purpose, initialize n
On 11/20/24 19:49, Anton Johansson wrote:
Adds a meson option for enabling/disabling helper-to-tcg along with a
CONFIG_* definition.
CONFIG_* will in future commits be used to conditionally include the
helper-to-tcg subproject, and to remove unneeded code/memory when
helper-to-tcg is not in use.
From: Patrick Eads
init
Promising polling initiated and data moving cursor now
Reverted delete of dev handler for wacom tablet
got the y-axis!
getting closer
more progress. it appears to not quite be WACOM II/IV, but x-axis is controlled
by the first 2-3 bytes
really? 12-bits is the key? o
From: Patrick Eads
streamlined efficiency since setting the xy-values to zero is not the correct
way by adding state variables against which the new xy-values can be compared
added other buttons
Signed-off-by: Patrick Eads
---
hw/input/adb-wacom.c | 50 +++---
On Thu, Nov 21, 2024 at 04:32:25PM -0600, Rob Landley wrote:
> On 9/16/24 02:21, Stafford Horne wrote:
> > On Wed, Sep 11, 2024 at 12:42:58AM -0500, Rob Landley wrote:
> > > Grab this tarball, extract it, and ./run-qemu.sh. It's a simple
> > > linux+initramfs image that boots to a shell prompt.
> >
On Fri, 22 Nov 2024 10:11:27 +0100
Mauro Carvalho Chehab wrote:
> Make error handling within ghes_record_cper_errors() consistent,
> i.e. instead abort just print a error in case ghes GED is not found.
>
> Reviewed-by: Jonathan Cameron
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Igor
On Fri, 22 Nov 2024 10:11:21 +0100
Mauro Carvalho Chehab wrote:
> GHES has two fields that are stored on HEST error source
> blocks associated with notifications:
>
> - notification type, which is a number defined at the ACPI spec
> containing several arch-specific synchronous and assynchronou
On Fri, 22 Nov 2024 10:11:25 +0100
Mauro Carvalho Chehab wrote:
> Split the code into separate functions to allow using the
> common CPER filling code by different error sources.
>
> The generic code was moved to ghes_record_cper_errors(),
> and ghes_gen_err_data_uncorrectable_recoverable() now
Currently cpu->nr_cores and cpu->nr_threads are initialized in
qemu_init_vcpu(), which is called a bit late in *cpu_realizefn() for
each ARCHes.
x86 arch would like to use nr_cores and nr_threads earlier in its
realizefn(). To serve this purpose, initialize nr_cores and nr_threads
in cpu_common_in
On Fri, 22 Nov 2024 10:11:24 +0100
Mauro Carvalho Chehab wrote:
> As described at: ACPI 6.5 spec at:
> 18.3.2. ACPI Error Source
>
> In particular at GHES/GHESv2 table:
> Table 18.10 Generic Hardware Error Source Structure
>
> HEST source ID is actually a 16-bit value.
>
> Signed-o
On 11/21/24 18:32, Palmer Dabbelt wrote:
This is still under discussion in the psABI, but it's looking like we're
going to forbid VILL in userspace in order to maintain compatibility
with binaries that don't expect implementations to trap whole register
moves under VILL (as in QEMU before 4eff52c
On 22/11/2024 15.18, Cédric Le Goater wrote:
These were introduced in the avocado tests to workaround read issues
when interacting with console. They are no longer necessary and we can
use the expected login string instead.
Test always passes now. Remove skipUnless test on QEMU_TEST_FLAKY_TESTS.
Am 13.11.2024 um 13:55 hat Richard W.M. Jones geschrieben:
> From: Jakub Jelen
>
> The libssh does not handle non-blocking mode in SFTP correctly. The
> driver code already changes the mode to blocking for the SFTP
> initialization, but for some reason changes to non-blocking mode.
> This used to
Am 18.11.2024 um 18:06 hat Jakub Jelen geschrieben:
> Hi Kevin,
> Sorry for the delay, my gmail filters will need some love to handle this
> high-traffic mailing lists so I can catch replies ...
>
> On Thu, Nov 14, 2024 at 6:49 PM Kevin Wolf wrote:
> > [...]
> > Hm, after looking some more at the
Hi - gentle ping on my last email. Would love to hear any thoughts about
moving
this forward.
Thank you for your thoughts thus far.
On Mon, Oct 28, 2024 at 3:25 PM Andrew Keesler wrote:
> Hi Daniel and Marc-André - please excuse my delay (I was traveling
> last week).
>
> I see 2 primary takeaw
These were introduced in the avocado tests to workaround read issues
when interacting with console. They are no longer necessary and we can
use the expected login string instead.
Test always passes now. Remove skipUnless test on QEMU_TEST_FLAKY_TESTS.
Signed-off-by: Cédric Le Goater
---
tests/f
Peter Xu writes:
> To move towards explicit creations of containers, starting that by
> providing a helper for creating container objects.
>
> Signed-off-by: Peter Xu
Reviewed-by: Markus Armbruster
On Thu, 7 Nov 2024 22:00:17 +0800
Zhao Liu wrote:
> Hi Igor,
>
> > > What's the difference between arch_id and CPU index (CPUState.cpu_index)?
> > >
> >
> > They might be the same but not necessarily.
> > arch_id is unique cpu identifier from architecture point of view
> > (which easily coul
On 22/11/2024 14.52, Cédric Le Goater wrote:
On 11/22/24 14:49, Thomas Huth wrote:
On 22/11/2024 14.08, Cédric Le Goater wrote:
These were introduced in the avocado tests to workaround read issues
when interacting with console. They are no longer necessary and we can
use the expected login stri
On 11/22/24 14:49, Thomas Huth wrote:
On 22/11/2024 14.08, Cédric Le Goater wrote:
These were introduced in the avocado tests to workaround read issues
when interacting with console. They are no longer necessary and we can
use the expected login string instead.
Signed-off-by: Cédric Le Goater
On Tue, 19 Nov 2024 18:18:27 +0800
bibo mao wrote:
> On 2024/11/19 上午1:03, Igor Mammedov wrote:
> > On Tue, 12 Nov 2024 10:17:38 +0800
> > Bibo Mao wrote:
> >
> >> On virt machine, enable CPU hotplug feature has_hotpluggable_cpus. For
> >> hot-added CPUs, there is socket-id/core-id/thread-id
On 22/11/2024 14.08, Cédric Le Goater wrote:
These were introduced in the avocado tests to workaround read issues
when interacting with console. They are no longer necessary and we can
use the expected login string instead.
Signed-off-by: Cédric Le Goater
---
tests/functional/test_sh4_tuxrun.
On Tue, 19 Nov 2024 18:02:54 +0800
bibo mao wrote:
> On 2024/11/19 上午12:43, Igor Mammedov wrote:
> > On Tue, 12 Nov 2024 10:17:35 +0800
> > Bibo Mao wrote:
> >
> >> Here generic function virt_init_cpu_irq() is added to init interrupt
> >> pin of CPU object, IPI and extioi interrupt controller
On Tue, 19 Nov 2024 16:01:37 +0800
bibo mao wrote:
> Hi Ignor,
>
> On 2024/11/19 上午12:10, Igor Mammedov wrote:
> > On Tue, 12 Nov 2024 10:17:33 +0800
> > Bibo Mao wrote:
> >
> >> Add topological relationships for Loongarch VCPU and initialize
> >> topology member variables. Also physical cpu
The GHES migration logic at GED should now support HEST table
location too.
Signed-off-by: Mauro Carvalho Chehab
---
hw/acpi/generic_event_device.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
i
There are two pointers that are needed during error injection:
1. The start address of the CPER block to be stored;
2. The address of the ack, which needs a reset before next error.
It is preferable to calculate them from the HEST table. This allows
checking the source ID, the size of the table
Store HEST table address at GPA, placing its content at
hest_addr_le variable.
Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Jonathan Cameron
---
Change from v8:
- hest_addr_lr is now pointing to the error source size and data.
Signed-off-by: Mauro Carvalho Chehab
---
hw/acpi/ghes.c
The current code is actually dependent on having just one error
structure with a single source.
As the number of sources should be arch-dependent, as it will depend on
what kind of synchronous/assynchronous notifications will exist, change
the logic to dynamically build the table.
Yet, for a prop
This series was part of the previous PR to add generic error injection
support on GHES. It depends on a cleanup patch series sent earlier
today:
https://lore.kernel.org/qemu-devel/cover.1732266152.git.mchehab+hua...@kernel.org/T/#t
It contains the changes of the math used to calculate o
Create a new property (x-has-hest-addr) and use it to detect if
the GHES table offsets can be calculated from the HEST address
(qemu 9.2 and upper) or via the legacy way via an offset obtained
from the hardware_errors firmware file.
Signed-off-by: Mauro Carvalho Chehab
---
hw/acpi/generic_event_
On Fri, 15 Nov 2024 16:50:38 +, Peter Maydell wrote:
> I noticed while reviewing Roque's patchset that adds tests
> for the CMSDK watchdog device that we are gradually accumulating
> tests in tests/qtest which open-code "now reset the QEMU system".
> Moreover, several of those tests get it wron
These were introduced in the avocado tests to workaround read issues
when interacting with console. They are no longer necessary and we can
use the expected login string instead.
Signed-off-by: Cédric Le Goater
---
tests/functional/test_sh4_tuxrun.py | 8 +++-
1 file changed, 3 insertions(+)
On 11/22/24 13:32, Thomas Huth wrote:
On 22/11/2024 12.59, Cédric Le Goater wrote:
On 11/22/24 11:47, Thomas Huth wrote:
On 21/11/2024 22.46, Cédric Le Goater wrote:
On 11/21/24 20:10, Thomas Huth wrote:
On 21/11/2024 20.03, Cédric Le Goater wrote:
Hello Alex,
On 11/21/24 17:57, Alex Bennée
On Tue, Nov 19, 2024 at 08:19:56PM +0530, Sai Pavan Boddu wrote:
> Add a basic board with interrupt controller (intc), timer, serial
> (uartlite), small memory called LMB@0 (128kB) and DDR@0x8000
> (configured via command line eg. -m 2g).
> This is basic configuration which matches HW generated
Peter Maydell writes:
> In the device and drive plug/unplug tests we want to trigger
> a system reset and then see if we get the appropriate
> DEVICE_DELETED event. Use qtest_system_reset_nowait() here.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Fabiano Rosas
On 11/22/24 13:37, Thomas Huth wrote:
On 22/11/2024 12.19, Philippe Mathieu-Daudé wrote:
When a device model requires legacy command line handling,
call scsi_bus_legacy_handle_cmdline() in its realize handler
instead of having each user call it.
This applies to:
- spapr_vscsi
- lsi53c810 /
On 22/11/2024 11.34, Philippe Mathieu-Daudé wrote:
Last use of pci_irq_pulse() was removed 7 years ago in commit
5e9aa92eb1 ("hw/block: Fix pin-based interrupt behaviour of NVMe").
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 10 --
1 file changed, 10 deletions(-)
On 22/11/2024 12.19, Philippe Mathieu-Daudé wrote:
When a device model requires legacy command line handling,
call scsi_bus_legacy_handle_cmdline() in its realize handler
instead of having each user call it.
This applies to:
- spapr_vscsi
- lsi53c810 / lsi53c895a
- sysbus_esp
Note, scsi_b
Am 22.11.2024 um 12:00 hat Daniel P. Berrangé geschrieben:
> On Fri, Nov 22, 2024 at 11:17:39AM +0100, Kevin Wolf wrote:
> > Am 20.11.2024 um 14:19 hat Peter Maydell geschrieben:
> > > On Wed, 20 Nov 2024 at 10:52, Kevin Wolf wrote:
> > > >
> > > > The following changes since commit
> > > > e6459
On 22/11/2024 12.59, Cédric Le Goater wrote:
On 11/22/24 11:47, Thomas Huth wrote:
On 21/11/2024 22.46, Cédric Le Goater wrote:
On 11/21/24 20:10, Thomas Huth wrote:
On 21/11/2024 20.03, Cédric Le Goater wrote:
Hello Alex,
On 11/21/24 17:57, Alex Bennée wrote:
This is a mostly testing focus
Call scsi_bus_legacy_handle_cmdline() once in the DeviceRealize
handler, just after scsi_bus_init().
No need for lsi53c8xx_handle_legacy_cmdline(), remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 2 --
hw/arm/realview.c| 3 +--
hw/arm/versatilepb.c | 3 +--
hw/hpp
On 11/22/24 11:47, Thomas Huth wrote:
On 21/11/2024 22.46, Cédric Le Goater wrote:
On 11/21/24 20:10, Thomas Huth wrote:
On 21/11/2024 20.03, Cédric Le Goater wrote:
Hello Alex,
On 11/21/24 17:57, Alex Bennée wrote:
This is a mostly testing focused set of patches but a few bug fixes as
well.
On 21/11/2024 17.57, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_riscv32_tuxrun.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth
T
> On 21 Nov 2024, at 22:54, Atish Kumar Patra wrote:
>
> On Wed, Nov 20, 2024 at 6:25 AM Aleksei Filippov
> wrote:
>>
>>
>>
>>> On 22 Oct 2024, at 15:58, Atish Kumar Patra wrote:
>>>
>>> On Mon, Oct 21, 2024 at 6:45 AM Aleksei Filippov
>>> wrote:
> On 11 Oct 2024,
On Fri, 22 Nov 2024 08:01:34 +0100
Philippe Mathieu-Daudé wrote:
> Hi Wafer,
>
> On 22/11/24 03:00, Wafer wrote:
> > From: Wafer Xie
> >
> > The virtio-1.2 specification writes:
> >
> > 2.7.6 The Virtqueue Available Ring:
> > "idx field indicates where the driver would put the next descriptor
Call scsi_bus_legacy_handle_cmdline() in the DeviceRealize
handler, just after scsi_bus_init().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/scsi/spapr_vscsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c
index c75a6c8807..
Call scsi_bus_legacy_handle_cmdline() once in the DeviceRealize
handler, just after scsi_bus_init().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/m68k/next-cube.c | 2 --
hw/m68k/q800.c | 2 --
hw/mips/jazz.c | 2 --
hw/scsi/esp.c | 1 +
hw/sparc/sun4m.c| 1 -
5 files changed
When a device model requires legacy command line handling,
call scsi_bus_legacy_handle_cmdline() in its realize handler
instead of having each user call it.
This applies to:
- spapr_vscsi
- lsi53c810 / lsi53c895a
- sysbus_esp
Note, scsi_bus_legacy_handle_cmdline() prototype could be
made priva
On 21/11/2024 17.57, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_i386_tuxrun.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth
Test
On 21/11/2024 17.58, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_x86_64_tuxrun.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth
Te
Last use of pci_irq_pulse() was removed 7 years ago in commit
5e9aa92eb1 ("hw/block: Fix pin-based interrupt behaviour of NVMe").
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pc
On 22/11/24 11:53, Paolo Bonzini wrote:
On 11/22/24 11:30, Philippe Mathieu-Daudé wrote:
On 22/11/24 09:32, Paolo Bonzini wrote:
+/// Interrupt sources are used by devices to pass changes to a
boolean value to
+/// other devices (typically interrupt or GPIO controllers). QEMU
interrupt
+///
On 21/11/2024 17.58, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_sparc64_tuxrun.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth
T
On 21/11/2024 17.57, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Note we re-use the riscv32 kernel and rootfs for test_riscv64_rv32.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_riscv64_tuxrun.py | 16
On 21/11/2024 17.57, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_s390x_tuxrun.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth
Tes
On Fri, Nov 22, 2024 at 11:17:39AM +0100, Kevin Wolf wrote:
> Am 20.11.2024 um 14:19 hat Peter Maydell geschrieben:
> > On Wed, 20 Nov 2024 at 10:52, Kevin Wolf wrote:
> > >
> > > The following changes since commit
> > > e6459afb1ff4d86b361b14f4a2fc43f0d2b4d679:
> > >
> > > Merge tag 'pull-targ
On 11/22/24 11:30, Philippe Mathieu-Daudé wrote:
On 22/11/24 09:32, Paolo Bonzini wrote:
+/// Interrupt sources are used by devices to pass changes to a
boolean value to
+/// other devices (typically interrupt or GPIO controllers). QEMU
interrupt
+/// sources are always active-high.
So 'alw
On 21/11/2024 22.46, Cédric Le Goater wrote:
On 11/21/24 20:10, Thomas Huth wrote:
On 21/11/2024 20.03, Cédric Le Goater wrote:
Hello Alex,
On 11/21/24 17:57, Alex Bennée wrote:
This is a mostly testing focused set of patches but a few bug fixes as
well. I plan to send the PR in on Monday. I
On 21/11/2024 18.31, Alex Bennée wrote:
Peter Maydell writes:
On Thu, 21 Nov 2024 at 16:58, Alex Bennée wrote:
This is a mostly testing focused set of patches but a few bug fixes as
well. I plan to send the PR in on Monday. I can drop any patches that
are objected to but I think its pretty
On 21/11/2024 17.57, Alex Bennée wrote:
Now there are new upto date images available we should update to them.
Signed-off-by: Alex Bennée
Cc: Anders Roxell
---
tests/functional/test_ppc_tuxrun.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth
Teste
Em Wed, 20 Nov 2024 15:01:19 +
Jonathan Cameron escreveu:
> On Wed, 13 Nov 2024 09:37:02 +0100
> Mauro Carvalho Chehab wrote:
>
> > The GHES migration logic at GED should now support HEST table
> > location too.
> >
> > Increase migration version and change needed to check for both
> > ghe
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