Am Wed, 23 Oct 2024 09:58:42 +0100
schrieb Mark Cave-Ayland :
> The rtc phase value of -1 is directly equivalent to using a phase value of 0
> so
> simplify the logic to use an initial rtc phase of 0.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m68k/next-cube.c | 5 +
> 1 file changed,
Am Wed, 23 Oct 2024 09:58:41 +0100
schrieb Mark Cave-Ayland :
> This is in preparation for moving NeXTRTC to its own separate device.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m68k/next-cube.c | 169
> 1 file changed, 92 insertions(+), 77 deleti
Am Wed, 23 Oct 2024 09:58:40 +0100
schrieb Mark Cave-Ayland :
> This is in preparation for moving NeXTRTC to its own separate device.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m68k/next-cube.c | 25 +
> 1 file changed, 21 insertions(+), 4 deletions(-)
Reviewed-by:
09.11.2024 10:38, Paolo Bonzini wrote:
On 11/9/24 07:38, Michael Tokarev wrote:
12 64e0e63ea16a Tom Dohrmann:
accel/kvm: check for KVM_CAP_READONLY_MEM on VM
This only matters for SEV-SNP support, so it's not needed before 9.1. But it's
not harmful either.
Aha. Thank you for letting me
On 11/9/24 07:38, Michael Tokarev wrote:
12 64e0e63ea16a Tom Dohrmann:
accel/kvm: check for KVM_CAP_READONLY_MEM on VM
This only matters for SEV-SNP support, so it's not needed before 9.1.
But it's not harmful either.
13 d9280ea31747 Stefan Berger:
tests: Wait for migration completi
Check for overflow as well as allocation failure. Resolves Coverity CID
1564859.
Reviewed-by: Pierrick Bouvier
Reviewed-by: Dorjoy Chowdhury
Signed-off-by: Paolo Bonzini
---
hw/core/eif.c | 48 +---
1 file changed, 41 insertions(+), 7 deletions(-)
The following changes since commit a1dacb66915eb7d08a0596cc97068a37c39930d3:
Merge tag 'for-upstream-rust' of https://gitlab.com/bonzini/qemu into staging
(2024-11-06 21:27:47 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fe
On 11/8/24 13:49, Corvin Köhne wrote:
From: Corvin Köhne
When copying the calculation of the stolen memory size for Intels integrated
graphics device of gen 9 and later from the Linux kernel [1], we missed
subtracting 0xf0 from the graphics mode select value for values above 0xf0.
This leads to
On 11/8/24 13:48, Corvin Köhne wrote:
From: Corvin Köhne
I've tested and verified that Coffee Lake devices are working properly.
Signed-off-by: Corvin Köhne
Applied to vfio-next.
Thanks,
C.
Accidentally missed this email a week ago. Thanks again for all the reviews!
On 10/31/24 10:32, Akihiko Odaki wrote:
...
>> +# libx11 presents together with SDL or GTK libs on systems that
>> support X11
>> +xlib = dependency('x11', required: false)
>
> There is a line saying:
> x11 = dependenc
From: Marc-André Lureau
Fixes: 280c1e1cd ("audio/hda: create millisecond timers that handle IO")
Signed-off-by: Marc-André Lureau
Reviewed-by: Akihiko Odaki
Message-ID: <20241008125028.1177932-2-marcandre.lur...@redhat.com>
(cherry picked from commit f27206ceedbe2efae37c8d143c5eb2db05251508)
S
The following patches are queued for QEMU stable v7.2.15:
https://gitlab.com/qemu-project/qemu/-/commits/staging-7.2
Patch freeze is 2024-11-18, and the release is planned for 2024-11-20:
https://wiki.qemu.org/Planning/7.2
Please respond here or CC qemu-sta...@nongnu.org on any additional p
From: Tom Dohrmann
KVM_CAP_READONLY_MEM used to be a global capability, but with the
introduction of AMD SEV-SNP confidential VMs, this extension is not
always available on all VM types [1,2].
Query the extension on the VM level instead of on the KVM level.
[1]
https://patchwork.kernel.org/pro
From: Kevin Wolf
s->offset and s->size are only set at the end of the function and still
contain the old values when formatting the error message. Print the
parameters with the new values that we actually checked instead.
Fixes: 500e2434207d ('raw-format: Split raw_read_options()')
Signed-off-by
From: Peter Maydell
Coverity complains (CID 1507880) that the declaration "int error_code;"
in mmu_translate() is unreachable code. Since this is only a declaration,
this isn't actually a bug, but:
* it's a bear-trap for future changes, because if it was changed to
include an initialization '
From: Bernhard Beschow
The patch fixes the following errors generated by GCC 14.2:
../src/net/tap-win32.c:343:19: error: '%s' directive output may be truncated
writing up to 255 bytes into a region of size 176 [-Werror=format-truncation=]
343 | "%s\\%s\\Connection",
|
From: Richard Henderson
This pointer needs to be reset after overflow just like
code_buf and code_ptr.
Cc: qemu-sta...@nongnu.org
Fixes: 57a269469db ("tcg: Infrastructure for managing constant pools")
Acked-by: Alistair Francis
Reviewed-by: Pierrick Bouvier
Reviewed-by: LIU Zhiwei
Signed-off-
From: Alexandra Diupina
The result of 1 << regbit with regbit==31 has a 1 in the 32nd bit.
When cast to uint64_t (for further bitwise OR), the 32 most
significant bits will be filled with 1s. However, the documentation
states that the upper 32 bits of ICH_AP[0/1]R_EL2 are reserved.
Add an explic
From: Fabiano Rosas
The XT check for the lxvx/stxvx instructions is currently
inverted. This was introduced during the move to decodetree.
>From the ISA:
Chapter 7. Vector-Scalar Extension Facility
Load VSX Vector Indexed X-form
lxvx XT,RA,RB
if TX=0 & MSR.VSX=0 then VSX_Unavailable()
From: Christian Schoenebeck
A bad (broken or malicious) 9p client (guest) could cause QEMU host to
crash by sending a 9p 'Treaddir' request with a numeric file ID (FID) that
was previously opened for a file instead of an expected directory:
#0 0x762aff8f4919 in __GI___rewinddir (dirp=0xf)
From: Rob Bradford
The RISC-V unprivileged specification "31.3.11. State of Vector
Extension at Reset" has a note that recommends vtype.vill be set on
reset as part of ensuring that the vector extension have a consistent
state at reset.
This change now makes QEMU consistent with Spike which sets
From: TANG Tiancheng
Ensure that riscv_cpu_sxl returns MXL_RV32 when runningRV32 in an
RV64 QEMU.
Signed-off-by: TANG Tiancheng
Fixes: 05e6ca5e156 ("target/riscv: Ignore reserved bits in PTE for RV64")
Reviewed-by: Liu Zhiwei
Reviewed-by: Alistair Francis
Message-ID: <20240919055048.562-4-zhi
From: Stefano Garzarella
Commit 1880ad4f4e ("virtio-scsi: Batched prepare for cmd reqs") split
calls to scsi_req_new() and scsi_req_enqueue() in the virtio-scsi device.
No ill effects were observed until commit 8cc5583abe ("virtio-scsi: Send
"REPORTED LUNS CHANGED" sense data upon disk hotplug ev
From: Anton Blanchard
vcompress packs vl or less fields into vd, so the tail starts after the
last packed field. This could be more clearly expressed in the ISA,
but for now this thread helps to explain it:
https://github.com/riscv/riscv-v-spec/issues/796
Signed-off-by: Anton Blanchard
Reviewe
From: Alexander Graf
When translating virtual to physical address with a guest CPU that
supports nested paging (NPT), we need to perform every page table walk
access indirectly through the NPT, which we correctly do.
However, we treat real mode (no page table walk) special: In that case,
we curr
From: Peter Maydell
In regime_is_user() we assert if we're passed an ARMMMUIdx_E10_*
mmuidx value. This used to make sense because we only used this
function in ptw.c and would never use it on this kind of stage 1+2
mmuidx, only for an individual stage 1 or stage 2 mmuidx.
However, when we imple
From: Klaus Jensen
If a host chooses to use the SQHD "hint" in the CQE to know if there is
room in the submission queue for additional commands, it may result in a
situation where there are not enough internal resources (struct
NvmeRequest) available to process the command. For a lack of a better
From: Peter Maydell
Our implementation of the indexed version of SVE SDOT/UDOT/USDOT got
the calculation of the inner loop terminator wrong. Although we
correctly account for the element size when we calculate the
terminator for the first iteration:
intptr_t segend = MIN(16 / sizeof(TYPED), o
From: Sergey Makarov
According to PLIC specification (chapter 5), there
is only one case, when interrupt is claimed. Fix
PLIC controller to match this behavior.
Signed-off-by: Sergey Makarov
Reviewed-by: Alistair Francis
Message-ID: <20240918140229.124329-3-s.maka...@syntacore.com>
Signed-off-
From: Alex Bennée
When git fails the rather terse backtrace only indicates it failed
without some useful context. Add some to make the log a little more
useful.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Alex Bennée
Message-Id: <20241023113406.1284676-11-alex.ben...@linaro.org>
(cherry pic
From: Ilya Leoshkevich
divdu (without a dot) sometimes updates cr0, even though it shouldn't.
The reason is that gen_op_arith_divd() checks Rc(ctx->opcode), which is
not initialized. This field is initialized only for instructions that
go through decode_legacy(), and not decodetree.
There alread
From: Yong-Xuan Wang
The section 4.5.2 of the RISC-V AIA specification says that any write
to a sourcecfg register of an APLIC might (or might not) cause the
corresponding interrupt-pending bit to be set to one if the rectified
input value is high (= 1) under the new source mode.
If an interrupt
From: Paolo Bonzini
This is an error in Python 3.12; fix it by using a raw string literal.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
(cherry picked from commit e6d8e5e6e366ab4c9ed7d8ed1572f98c6ad6a38e)
Signed-off-by: Michael Tokarev
diff --git a/scripts/tracetool/__init__.py b/s
From: Stefan Weil
GitHub's CodeQL reports a critical error which is fixed by using the MIN macro:
Unsigned difference expression compared to zero
Signed-off-by: Stefan Weil
Cc: qemu-sta...@nongnu.org
Reviewed-by: Zhang Chen
Signed-off-by: Jason Wang
(cherry picked from commit e29bc931e16
Am Wed, 6 Nov 2024 18:46:11 +
schrieb Philippe Mathieu-Daudé :
> These devices are only used by the OpenRISC target, which is
> only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
> definition expand to DEVICE_BIG_ENDIAN (besides, the
> DEVICE_LITTLE_ENDIAN case isn't tested). Simpli
From: Evgenii Prokopiev
The register VXSAT should be RW only to the first bit.
The remaining bits should be 0.
The RISC-V Instruction Set Manual Volume I: Unprivileged Architecture
The vxsat CSR has a single read-write least-significant bit (vxsat[0])
that indicates if a fixed-point instruction
From: Ilya Leoshkevich
do_setcontext() copies the target sigmask without endianness handling
and then uses target_to_host_sigset_internal(), which expects a
byte-swapped one. Use target_to_host_sigset() instead.
Fixes: bcd4933a23f1 ("linux-user: ppc signal handling")
Signed-off-by: Ilya Leoshkev
From: Anup Patel
The reads to in_clrip[x] registers return rectified input values of the
interrupt sources.
A rectified input value of an interrupt source is defined by the section
"4.5.2 Source configurations (sourcecfg[1]–sourcecfg[1023])" of the RISC-V
AIA specification as:
"rectified input v
Am Wed, 6 Nov 2024 18:46:08 +
schrieb Philippe Mathieu-Daudé :
> These devices are only used by the X86 targets, which are only
> built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
> definition expand to DEVICE_LITTLE_ENDIAN (besides, the
> DEVICE_BIG_ENDIAN case isn't tested). Simpli
From: Philippe Mathieu-Daudé
load_flt_binary() calls load_flat_file() -> page_set_flags().
page_set_flags() must be called with the mmap_lock held,
otherwise it aborts:
$ qemu-arm -L stm32/lib/ stm32/bin/busybox
qemu-arm: ../accel/tcg/user-exec.c:505: page_set_flags: Assertion
`have_mmap_l
From: Peter Xu
Zhiyi reported an infinite loop issue in VFIO use case. The cause of that
was a separate discussion, however during that I found a regression of
dirty sync slowness when profiling.
Each KVMMemoryListerner maintains an array of kvm memslots. Currently it's
statically allocated to
From: Richard Henderson
Comparing a string of 4 bytes only works in little-endian.
Adjust bulk bswap to only apply to the note payload.
Perform swapping of the note header manually; the magic
is defined so that it does not need a runtime swap.
Fixes: 83f990eb5adb ("linux-user/elfload: Parse NT_
From: Stefan Berger
Rather than waiting for the completion of migration on the source side,
wait for it on the destination QEMU side to avoid accessing the TPM TIS
memory mapped registers before QEMU could restore their state. This
error condition could be triggered on busy systems where the dest
From: Alexander Bulekov
When we are building for OSS-Fuzz, we want to ensure that the fuzzer
targets are actually created, regardless of leaks. Leaks will be
detected by the subsequent tests of the individual fuzz-targets.
Signed-off-by: Alexander Bulekov
Reviewed-by: Philippe Mathieu-Daudé
Me
From: "Fea.Wang"
The follow-up transactions may use the data in the attribution, so keep
the value of attribution from the function parameter just as
flatview_translate() above.
Signed-off-by: Fea.Wang
Cc: qemu-sta...@nongnu.org
Fixes: f26404fbee ("Make address_space_map() take a MemTxAttrs arg
From: Fiona Ebner
Allow overlapping request by removing the assert that made it
impossible. There are only two callers:
1. block_copy_task_create()
It already asserts the very same condition before calling
reqlist_init_req().
2. cbw_snapshot_read_lock()
There is no need to have read requests
Am Wed, 6 Nov 2024 18:46:09 +
schrieb Philippe Mathieu-Daudé :
> These devices are only used by the TriCore target, which is
> only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
> definition expand to DEVICE_LITTLE_ENDIAN (besides, the
> DEVICE_BIG_ENDIAN case isn't tested). Simp
When using a VDPA device, it's important to ensure that the MAC
address is correctly set.
Add a new parameter in qemu cmdline to enable this check, default value
is false
The usage is:
-netdev
type=vhost-vdpa,vhostdev=/dev/vhost-vdpa-0,id=vhost-vdpa0,check-mac=true\
-device virtio-net-pci,ne
For VDPA devices, Allow configurations where both the hardware MAC address
and QEMU command line MAC address are zero.
Signed-off-by: Cindy Lu
---
hw/net/virtio-net.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index f74aa4f8db..66
When using a VDPA device, it is important to ensure that the MAC
address is correctly set. The MAC address in the hardware should
match the MAC address from the QEMU command line. This is a recommended
configuration and will allow the system to boot.
Signed-off-by: Cindy Lu
---
hw/net/virtio-net
For VDPA devices, Allow configurations where the hardware MAC address
is non-zero while the MAC address in the QEMU command line is zero.
Signed-off-by: Cindy Lu
---
hw/net/virtio-net.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
When using a VDPA device, it is important to ensure that the MAC address
is correctly set. In this patch series, we add a new parameter to
enable this check.
Only three MAC setup configurations are acceptable; any other will
fail to boot.
The usage is:
-netdev
type=vhost-vdpa,vhostdev=/dev/v
Am Wed, 6 Nov 2024 18:46:10 +
schrieb Philippe Mathieu-Daudé :
> These devices are only used by the M68K target, which is only
> built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
> definition expand to DEVICE_BIG_ENDIAN (besides, the
> DEVICE_LITTLE_ENDIAN case isn't tested). Simplify d
PRECOPY_NOTIFY_AFTER_BITMAP_SYNC was interpreted by free page hinting
optimization as an indication to begin freeing pages. But there's no
assurance that a sync is required when beginning a migration. Therefore,
during PRECOPY_NOTIFY_SETUP, as well as PRECOPY_NOTIFY_AFTER_BITMAP_SYNC,
enable free p
The first iteration's RAMBlock dirty sync can be omitted because QEMU
always initializes the RAMBlock's bmap to all 1s by default.
Signed-off-by: Hyman Huang
---
migration/cpu-throttle.c | 2 +-
migration/ram.c | 11 ---
2 files changed, 9 insertions(+), 4 deletions(-)
diff --
The first iteration's RAMBlock dirty sync can be omitted because QEMU
always initializes the RAMBlock's bmap to all 1s by default.
Prior to that, a pre-requisite patch was offered to maintain the free
page optimizing behavior.
For more details, please refers to:
https://lore.kernel.org/qemu-devel
On Fri, Nov 8, 2024 at 9:50 PM Peter Xu wrote:
> On Fri, Nov 08, 2024 at 02:03:47PM +0800, Yong Huang wrote:
> > On Fri, Nov 8, 2024 at 12:28 AM Peter Xu wrote:
> >
> > > On Thu, Nov 07, 2024 at 05:56:50PM +0800, yong.hu...@smartx.com wrote:
> > > > From: Hyman Huang
> > > >
> > > > The first i
Checking `is_present` first can break x86 migration from new Qemu
version to old Qemu. This is because CPRS Bit is not defined in the
older Qemu register block and will always be 0 resulting in check always
failing. Remove CPU_PRESENT Bit to preserve older ABI.
-If ((\_SB.PCI0.PRES
Update the DSDT golden master files for the x86/pc and x86/q35 platforms
to address recent changes in the architecture-agnostic CPU AML code,
which impacted the backward compatibility of the migration feature on
the x86 platform. Additionally, initialize CPU's presence statically
within the CPU AML
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Suggested-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
tests/qtest/bios-tables-test-allowed-diff.h | 41 +
1 file changed, 41 insertions(
Fixes the the CPUs AML code and its corresponding golden masters ACPI
tables files for backward compatability of live migration on x86 platforms
i.e. when newer Qemu is migrated to older Qemu without `CPRS` Bit present
in the register block. This also reverts the ACPI ABI change introduced for
chec
Hey guys,
I can't remember details about this particular work which has been done
more than decade ago, but I guess that these uint32_t variables reflect the
architectural state of the HW, so if it might overflow over time, there is
high probability that this is what was architecturally going to ha
Add a CPU entry for the Tenstorrent Ascalon CPU, a series of 2 wide to
8 wide RV64 cores.
Signed-off-by: Anton Blanchard
---
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.c | 67 ++
2 files changed, 68 insertions(+)
diff --git a/target/riscv/cpu-qom
From: Sergio Lopez
In x86_load_linux(), we were using a stack-allocated array as data for
fw_cfg_add_bytes(). Since the latter just takes a reference to the
pointer instead of copying the data, it can happen that the contents
have been overridden by the time the guest attempts to access them.
In
Il ven 8 nov 2024, 18:48 Dorjoy Chowdhury ha
scritto:
> I was looking into doing some changes on top of the original patch and
> this check above should be if (!(*cmdline)), right?
>
Oops, yes it should. I will send a new pull request tomorrow morning.
Paolo
Regards,
> Dorjoy
>
>
On Fri, 8 Nov 2024 13:49:04 +0100
Corvin Köhne wrote:
> From: Corvin Köhne
>
> When copying the calculation of the stolen memory size for Intels integrated
* Intel's
> graphics device of gen 9 and later from the Linux kernel [1], we missed
> subtracting 0xf0 from the graphics mode select val
On Fri, 8 Nov 2024 13:48:30 +0100
Corvin Köhne wrote:
> From: Corvin Köhne
>
> I've tested and verified that Coffee Lake devices are working properly.
>
> Signed-off-by: Corvin Köhne
> ---
> hw/vfio/igd.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/vfio/igd.c b/hw/vfio/i
Hi Maxim,
Thanks for looking into this. I will fix the bits I mentioned below in
upcoming Genoa/Turin model update.
I have few comments below.
On 11/8/2024 12:15 PM, Maksim Davydov wrote:
Hi!
I compared EPYC-Genoa CPU model with CPUID output from real EPYC Genoa
host. I found some mismatche
From: Peter Maydell
The 'isapc' machine type has no PCI bus, but pc_nic_init() still
calls pci_init_nic_devices() passing it a NULL bus pointer. This
causes the clang sanitizer to complain:
$ ./build/clang/qemu-system-i386 -M isapc
../../hw/pci/pci.c:1866:39: runtime error: member access within
On Fri, 8 Nov 2024, Philippe Mathieu-Daudé wrote:
On 8/11/24 13:13, BALATON Zoltan wrote:
On Fri, 8 Nov 2024, Thomas Huth wrote:
On 06/11/2024 21.32, BALATON Zoltan wrote:
On Wed, 6 Nov 2024, Philippe Mathieu-Daudé wrote:
On 6/11/24 13:00, BALATON Zoltan wrote:
On Wed, 6 Nov 2024, Mark Cave-
On 230427 1710, Alexander Bulekov wrote:
> These patches aim to solve two types of DMA-reentrancy issues:
>
> 1.) mmio -> dma -> mmio case
> To solve this, we track whether the device is engaged in io by
> checking/setting a reentrancy-guard within APIs used for MMIO access.
>
> 2.) bh -> dma w
From: Jared Rossi
Clear information about cdrom type so that current IPL device isn't tainted
by stale data from previous devices.
Signed-off-by: Jared Rossi
---
pc-bios/s390-ccw/main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/pc-bios/s390-ccw/main.c b/pc-bios/s390-ccw/main.c
index
On Tue, 5 Nov 2024 at 22:49, Philippe Mathieu-Daudé wrote:
>
> From: Zhao Liu
>
> Add cache_supported flags in SMPCompatProps to allow machines to
> configure various caches support.
>
> And check the compatibility of the cache properties with the
> machine support in machine_parse_smp_cache().
Currently the CMSDK APB watchdog tests target an specialized version
of the device (luminaris using the lm3s811evb machine) that prevents
the development of tests for the more generic device documented in:
https://developer.arm.com/documentation/ddi0479/d/apb-components/apb-watchdog/programmers-mo
The following patchset tries to address an issue where the watchdog
counter was running as soon as the device is out of reset. This
created a few problems with the firmware under test. It was pointed
out that the firmware under test was already working on an emulator
using the real RTL. Further rev
On Fri, Nov 8, 2024 at 4:51 PM Daniel P. Berrangé wrote:
>
> On Fri, Nov 08, 2024 at 03:13:58PM +, Peter Maydell wrote:
> > One of the things suggested at the KVM Forum Rust BoF was creating
> > a qemu-rust mailing list. This is going to be one of our usual
> > qemu-foo lists along the lines o
The following tests focus on making sure the counter is not running
out of reset and the proper use of INTEN as the counter enable. As
described in:
https://developer.arm.com/documentation/ddi0479/d/apb-components/apb-watchdog/programmers-model
The new tests have to target an MPS2 machine because
Current watchdog is free running out of reset, this combined with the
fact that current implementation also ensures the counter is running
when programing WDOGLOAD creates issues when the firmware defer the
programing of WDOGCONTROL.INTEN much later after WDOGLOAD. Arm
Programmer's Model documentat
On Tue, 5 Nov 2024 at 22:49, Philippe Mathieu-Daudé wrote:
>
> From: Zhao Liu
>
> The x86 and ARM need to allow user to configure cache properties
> (current only topology):
> * For x86, the default cache topology model (of max/host CPU) does not
>always match the Host's real physical cache
Hi!
I compared EPYC-Genoa CPU model with CPUID output from real EPYC Genoa
host. I found some mismatches that confused me. Could you help me to
understand them?
On 5/4/23 23:53, Babu Moger wrote:
Adds the support for AMD EPYC Genoa generation processors. The model
display for the new processo
On Fri, Nov 08, 2024 at 07:01:39PM +0100, Paolo Bonzini wrote:
> Code checks, as well as documentation generation, are not yet tied
> to "make check" because they need new version of the Rust toolchain
> (even nightly in the case of "rustfmt"). Run them in CI using the
> existing nightly-Rust cont
Only qemu-api needs access to the symbols in config-host.h. Remove
the temptation to use them by limiting the --cfg arguments to the
qemu-api crate.
Signed-off-by: Paolo Bonzini
---
meson.build | 54 +--
rust/qemu-api/meson.build | 4 +++
2 fil
An extra benefit of workspaces is that they allow to place lint level
settings in a single Cargo.toml; the settings are then inherited by
packages in the workspace.
Correspondingly, teach rustc_build_args.py to get the unexpected_cfgs
configuration from the workspace Cargo.toml.
Note that it is s
Hi Maksim,
On 11/8/24 6:07 AM, Maksim Davydov wrote:
>
>
[snip]
+
+ num_pmu_gp_counters = AMD64_NUM_COUNTERS_CORE;
+}
>>>
>>> It seems that AMD implementation has one issue.
>>> KVM has parameter `enable_pmu`. So vPMU can be disabled in another way, not
>>> only
>>> via KVM_
Many lints that default to allow can be helpful in detecting bugs or
keeping the code style homogeneous. Add them liberally, though perhaps
not as liberally as in hw/char/pl011/src/lib.rs. In particular, enabling
entire groups can be problematic because of bitrot when new links are
added in the f
Code checks, as well as documentation generation, are not yet tied
to "make check" because they need new version of the Rust toolchain
(even nightly in the case of "rustfmt"). Run them in CI using the
existing nightly-Rust container.
Signed-off-by: Paolo Bonzini
---
.gitlab-ci.d/buildtest-templ
These are reported as clippy::semicolon_inside_block and
clippy::as_ptr_cast_mut.
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 6 --
rust/hw/char/pl011/src/memory_ops.rs | 4 +++-
rust/qemu-api/tests/tests.rs | 2 +-
3 files changed, 8 insertions(+), 4 del
rust/qemu-api/src/lib.rs is disabling lints that cause problems
with code generated by bindgen. Instead, include the bindgen
code via include!(...) and move the #![allow()] directives
into the bindings module.
Add MESON_BUILD_ROOT to the devenv, so that it's easy for
build.rs to find the include
Cargo.toml makes it possible to describe the desired lint level settings
in a nice format. We can extend this to Meson-built crates, by teaching
rustc_args.py to fetch lint and --check-cfg arguments from Cargo.toml.
Start with qemu-api, since it already has a [lints.rust] table and
an invocation
Make Cargo use unknown_lints = "allow" as well. This is more future
proof as we might add new lints to rust/Cargo.toml that are not supported
by older versions of rustc or clippy.
Signed-off-by: Paolo Bonzini
---
meson.build| 12
rust/Cargo.toml| 6
Abstract common invocations of "cargo", that do not require copying
the generated bindgen file or setting up MESON_BUILD_ROOT.
In the future these could also do completely without cargo and invoke
the underlying programs directly.
Signed-off-by: Paolo Bonzini
---
rust/meson.build | 14 +++
Allow "cargo test --doc" to pass.
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/src/zeroable.rs | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/rust/qemu-api/src/zeroable.rs b/rust/qemu-api/src/zeroable.rs
index 13cdb2ccba5..6125aeed8b4 100644
--- a/rust/qemu-api/src/z
Parse the Cargo.toml file, looking for the unexpected_cfgs
configuration. When generating --cfg options from the
config-host.h file, only use those that are included in the
configuration.
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/meson.build | 2 +-
scripts/rust/rustc_args.py | 61 ++
While we're not sure where we'll be going in the future, for now
using cargo remains an important part of developing QEMU Rust code.
This is because cargo is the easiest way to run clippy, rustfmt,
rustdoc. Cargo also allows working with doc tests, though there are
pretty much none yet, and provid
Zero length data for features doesn't make any sense so exclude that case
early. This fixes the undefined behavior reported by coverity for a zero
length memcpy().
Resolves CID 1564900 and 1564901
Reported-by: Peter Maydell
Signed-off-by: Jonathan Cameron
---
hw/cxl/cxl-mailbox-utils.c | 4 +++
On Fri, Nov 8, 2024 at 11:38 PM Paolo Bonzini wrote:
>
> Check for overflow as well as allocation failure. Resolves Coverity CID
> 1564859.
>
> Reviewed-by: Pierrick Bouvier
> Reviewed-by: Dorjoy Chowdhury
> Signed-off-by: Paolo Bonzini
> ---
> hw/core/eif.c | 48
The following changes since commit a1dacb66915eb7d08a0596cc97068a37c39930d3:
Merge tag 'for-upstream-rust' of https://gitlab.com/bonzini/qemu into staging
(2024-11-06 21:27:47 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fe
From: Phil Dennis-Jordan
The handling for CPUID function 0xD (supported XSAVE features) was
improved in a recent patch. Unfortunately, this appears to have
introduced undefined behaviour for cases where ecx > 30, as the result
of (1 << idx) is undefined if idx > 30.
Per Intel SDM section 13.2, t
Check for overflow as well as allocation failure. Resolves Coverity CID
1564859.
Reviewed-by: Pierrick Bouvier
Reviewed-by: Dorjoy Chowdhury
Signed-off-by: Paolo Bonzini
---
hw/core/eif.c | 48 +---
1 file changed, 41 insertions(+), 7 deletions(-)
Check for overflow to avoid that fseek() receives a sign-extended value.
Cc: Dorjoy Chowdhury
Signed-off-by: Paolo Bonzini
---
include/qemu/osdep.h | 4
hw/core/eif.c| 4
2 files changed, 8 insertions(+)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index fe7c3c5f6
1 - 100 of 271 matches
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