Call virtio_net_set_multiqueue() to add queues before loading their
states. Otherwise the loaded queues will not have handlers and elements
in them will not be processed.
Cc: qemu-sta...@nongnu.org
Fixes: 8c49756825da ("virtio-net: Add only one queue pair when realizing")
Reported-by: Laurent Vivi
On 2024/10/21 17:22, Jason Wang wrote:
On Mon, Oct 21, 2024 at 4:21 PM Jason Wang wrote:
On Sun, Sep 15, 2024 at 9:07 AM Akihiko Odaki wrote:
receive_header() used to cast the const qualifier of the pointer to the
received packet away to modify the header. Avoid this by copying the
received
On Tue, Oct 22, 2024 at 2:34 PM Thomas Huth wrote:
> The linker on OpenBSD complains:
>
> ld: warning: dirtyrate.c:447 (../src/migration/dirtyrate.c:447)(...):
> warning: strcpy() is almost always misused, please use strlcpy()
>
> It's currently not a real problem in this case since both arrays
On 2024/10/11 11:55, Alistair Francis wrote:
On Mon, Oct 7, 2024 at 1:35 PM LIU Zhiwei wrote:
From: TANG Tiancheng
We have implemented UXL32 on QEMU already. It enables us to run RV32
applications on RV64 Linux on QEMU. Similarly, RISCV specification
doesn't limit the SXLEN to be the same with
The linker on OpenBSD complains:
ld: warning: dirtyrate.c:447 (../src/migration/dirtyrate.c:447)(...):
warning: strcpy() is almost always misused, please use strlcpy()
It's currently not a real problem in this case since both arrays
have the same size (256 bytes). But just in case somebody chan
On 2024/10/17 03:31, Richard Henderson wrote:
Use vrsub.vi to subtract from a constant.
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-con-set.h | 1 +
tcg/riscv/tcg-target.c.inc | 8 ++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/tcg/riscv/tcg-targ
On Tue, 22 Oct 2024 at 03:22, Peter Xu wrote:
> To summarize, the major reason of the deprecation is due to no sensible way
> to consume the API properly:
>
> (1) The reported list of threads are incomplete (ignoring destination
> threads and non-multifd threads).
>
> (2) For CPU pinning
From: Thomas Huth
The linker on OpenBSD complains:
ld: warning: console-vc.c:824 (../src/ui/console-vc.c:824)([...]):
warning: sprintf() is often misused, please use snprintf()
Using g_strdup_printf() is certainly better here, so let's switch
to that function instead.
Signed-off-by: Thomas H
From: Tudor Gheorghiu
According to include/qapi/error.h:
* Please don't error_setg(&error_fatal, ...), use error_report() and
* exit(), because that's more obvious.
Patch updates all instances of error_setg(&error_fatal, ...) with
error_report(...), adds the explicit exit(1) and removes redundan
From: Kevin Wolf
The idea here was to leave an empty line before the message, but by
default, echo prints '\n' literally instead of interpreting it. Use a
separate echo without parameter instead like in other places in the
script.
Fixes: 6fdc5bc173188f5e4942616b16d589500b874a15
Signed-off-by: Ke
From: Brad Smith
meson.build: Remove ncurses workaround for OpenBSD
OpenBSD 7.5 has upgraded to ncurses 6.4.
Signed-off-by: Brad Smith
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
---
meson.build | 2 +-
ui/curses.c | 2 +-
2 files changed, 2
From: Gustavo Romero
Clean up unused (already commented-out) header from syscall.c.
Signed-off-by: Gustavo Romero
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
---
linux-user/syscall.c | 1 -
1 file changed, 1
The following changes since commit cc5adbbd50d81555b8eb73602ec16fde40b55be4:
Merge tag 'pull-tpm-2024-10-18-1' of https://github.com/stefanberger/qemu-tpm
into staging (2024-10-18 15:45:02 +0100)
are available in the Git repository at:
https://gitlab.com/mjt0k/qemu.git tags/pull-trivial-pat
On Tue, 22 Oct 2024 at 07:46, wrote:
> Guestperf was designed to test the performance of migration,
> with a loose connection to the fundamental test cases of QEMU.
>
> To improve the repository's structure, move it to the scripts
> directory.
>
> Add myself as a maintainer for the guestperf so th
LFENCE and SFENCE were introduced with the original SSE instruction set;
marking them incorrectly as cpuid(SSE2) causes failures for CPU models
that lack SSE2, for example pentium3.
Reported-by: Guenter Roeck
Tested-by: Guenter Roeck
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
---
On 10/22/24 03:38, Jamin Lin wrote:
Hi Cedric,
Subject: Re: [SPAM] [PATCH v1 09/16] test/qtest/aspeed_smc-test: Introduce a
new TestData to test different BMC SOCs
On 10/18/24 07:31, Jamin Lin wrote:
Currently, these test cases are only used for testing fmc_cs0 for AST2400.
To test others BMC
Hello Jamin,
On 10/18/24 07:30, Jamin Lin wrote:
According to the design of ASPEED SPI controllers user mode, users write the
data to flash, the SPI drivers set the Control Register(0x10) bit 0 and 1
enter user mode. Then, SPI drivers send flash commands for writing data.
Finally, SPI drivers se
On 21/10/2024 19.02, Daniel P. Berrangé wrote:
The AF_ALG crypto integration for Linux is not being tested in
any CI scenario. It always requires an explicit configure time
flag to be passed to turn it on. The Fedora system test is
arbitrarily picked as the place to test it.
Signed-off-by: Danie
On 10/21/24 21:09, Philippe Mathieu-Daudé wrote:
Hi Guenter,
On 21/10/24 11:02, Guenter Roeck wrote:
Unrelated to this, but I found that the sd emulation in 9.1 is also broken
for loongarch and sifive_u, and partially for ast2600-evb (it has two
controllers, with one of them no longer working)
On Tue, Oct 22, 2024 at 6:31 AM Philippe Mathieu-Daudé
wrote:
> > -void qdev_property_add_static(DeviceState *dev, Property *prop)
> > +void qdev_property_add_static(DeviceState *dev, const Property *prop)
> > {
> > Object *obj = OBJECT(dev);
> > ObjectProperty *op;
> > @@ -980,7 +98
On 14/10/2024 17:24, Roman Penyaev wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> With bitset management now it becomes feasible to implement
> the logic of detaching frontends from
Reviewed-by: Clément Mathieu--Drif
On 14/10/2024 17:24, Roman Penyaev wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> Those are boolean variables, not signed integers.
>
> Signed-off-
Reviewed-by: Clément Mathieu--Drif
On 14/10/2024 17:24, Roman Penyaev wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> Clean up forgotten leftovers.
>
> Signed-off-by: Roman Penyaev
>
On Tue, Oct 22, 2024 at 4:12 AM Junjie Mao wrote:
>
>
> Paolo Bonzini writes:
>
> > Remove the duplicate code by using the module_init! macro; at the same time,
> > simplify how module_init! is used, by taking inspiration from the
> > implementation
> > of #[derive(Object)].
> >
> > Signed-off-b
On 2024/10/19 6:31, Dmitry Osipenko wrote:
On 10/18/24 08:28, Akihiko Odaki wrote:
+static void virgl_write_context_fence(void *opaque, uint32_t ctx_id,
+ uint32_t ring_idx, uint64_t fence)
+{
+ VirtIOGPU *g = opaque;
What about taking the BQL here inste
On 2024/10/18 17:10, Jason Wang wrote:
On Sat, Oct 12, 2024 at 5:05 PM Akihiko Odaki wrote:
On 2024/10/09 16:41, Jason Wang wrote:
On Tue, Oct 8, 2024 at 2:52 PM Akihiko Odaki wrote:
ipvtap and macvtap create a file for each interface unlike tuntap, which
creates one file shared by all int
Some features are not always available with vhost. Legacy features are
not available with vp_vdpa in particular. virtio devices used to disable
them when not available even if the corresponding properties were
explicitly set to "on".
QEMU already has OnOffAuto type, which includes the "auto" value
DEFINE_PROP_ON_OFF_AUTO_BIT64() corresponds to DEFINE_PROP_ON_OFF_AUTO()
as DEFINE_PROP_BIT64() corresponds to DEFINE_PROP_BOOL(). The difference
is that DEFINE_PROP_ON_OFF_AUTO_BIT64() exposes OnOffAuto instead of
bool.
Signed-off-by: Akihiko Odaki
---
include/hw/qdev-properties.h | 18
This series was spun off from:
"[PATCH 0/3] virtio-net: Convert feature properties to OnOffAuto"
(https://patchew.org/QEMU/20240714-auto-v3-0-e27401aab...@daynix.com/)
Some features are not always available with vhost. Legacy features are
not available with vp_vdpa in particular. virtio devices us
Accept bool literals for OnOffAuto properties for consistency with bool
properties. This enables users to set the "on" or "off" value in a
uniform syntax without knowing whether the "auto" value is accepted.
This behavior is especially useful when converting an existing bool
property to OnOffAuto o
Hi Aleksandar,
On 18/10/24 10:18, Aleksandar Rakic wrote:
This patch series introduces support for the MIPS64r6 target in QEMU,
QEMU supports the MIPS64r6 since 10 years... See commit a773cc79704
("target-mips: define a new generic CPU supporting MIPS64 Release 6
ISA"). This CPU then became th
Hi,
On 21/10/24 13:35, Paolo Bonzini wrote:
Constify all accesses to qdev properties, except for the
ObjectPropertyAccessor itself. This makes it possible to place them in
read-only memory, and also lets Rust bindings switch from "static mut"
arrays to "static"; which is advantageous, because m
On 21/10/24 14:02, Daniel P. Berrangé wrote:
The AF_ALG crypto integration for Linux is not being tested in
any CI scenario. It always requires an explicit configure time
flag to be passed to turn it on. The Fedora system test is
arbitrarily picked as the place to test it.
Signed-off-by: Daniel
On 21/10/24 16:09, Daniel P. Berrangé wrote:
The docs for submitting a patch describe using your "Real Name" with
the Signed-off-by line. Although somewhat ambiguous, this has often
been interpreted to mean someone's legal name.
In recent times, there's been a general push back[1] against the no
On 21/10/24 16:31, Ilya Leoshkevich wrote:
On Mon, 2024-10-21 at 16:08 -0300, Gustavo Romero wrote:
Hi,
On 10/21/24 12:08, Peter Maydell wrote:
On Mon, 21 Oct 2024 at 16:02, Ilya Leoshkevich
wrote:
GDB 15 does not like exit() anymore:
(gdb) python exit(0)
Python Exception : 0
On 17/10/24 13:32, Peter Maydell wrote:
Add a functional test for the collie board that uses the kernel and
rootfs provided by Guenter Roeck in the linux-test-downloads repo:
https://github.com/groeck/linux-test-downloads/
This just boots Linux with a userspace that immediately reboots
the boa
Hi Guenter,
On 21/10/24 11:02, Guenter Roeck wrote:
Unrelated to this, but I found that the sd emulation in 9.1 is also broken
for loongarch and sifive_u, and partially for ast2600-evb (it has two
controllers, with one of them no longer working). That is too much for me
to track down quickly, s
On 21/10/24 14:24, Richard Henderson wrote:
On 10/21/24 08:02, Philippe Mathieu-Daudé wrote:
On 21/10/24 11:58, Philippe Mathieu-Daudé wrote:
Determine if the MIPS-3D ASE is implemented by checking
the state of the 3D bit in the FIR CP1 control register.
Remove the then unused ASE_MIPS3D defini
Il mar 22 ott 2024, 04:35 Junjie Mao ha scritto:
>
> Paolo Bonzini writes:
>
> > On Mon, Oct 21, 2024 at 8:16 AM Zhao Liu wrote:
> >> unsafe_op_in_unsafe_fn is allowed in
> >> rust/qemu-api/src/lib.rs. So should we wrap the bindings in a separate
> >> lib (similar to the rust/bindings in the Li
On Tue, 27 Aug 2024, Jonathan Cameron wrote:\n
No comments inline and LGTM. I'll queue it on my tree and push
that out on gitlab sometime soonish.
I don't see this picked up, which is a good thing atm. While testing
the kernel side, I noticed the following is needed, will send a v2
with it fold
Peter Maydell writes:
> On Mon, 21 Oct 2024 at 16:25, Zhao Liu wrote:
>> My initial confusion stemmed from seeing the private comment and
>> noticing that there are many direct accesses to parent_obj/parent_class
>> in QEMU (which I could list in my reply to Daniel). Now I understand
>> that t
On 2024/10/17 03:31, Richard Henderson wrote:
The first immediate field is unsigned, whereas operand_vimm
extracts a signed value. There is no need to mask the result
with 'u'; just print the immediate with 'i'.
Fixes: 07f4964d178 ("disas/riscv.c: rvv: Add disas support for vector
instructio
On 10/21/24 07:27, Ilya Leoshkevich wrote:
[1] deprecated -mpower8-vector, resulting in:
powerpc64-linux-gnu-gcc: warning: switch '-mpower8-vector' is no longer
supported
qemu/tests/tcg/ppc64/vsx_f2i_nan.c:4:15: error: expected ';' before 'float'
4 | typedef vector float vsx_
Paolo Bonzini writes:
> Il lun 21 ott 2024, 09:24 Junjie Mao ha scritto:
>
> > Thanks. I still prefer to keep the procedural macro code minimal, and
> have the
> > code generation in a separate macro, but this is a nice start!
> >
>
> I'm not sure if I get your point right.
>
> My under
On 2024/10/17 03:31, Richard Henderson wrote:
This pointer needs to be reset after overflow just like
code_buf and code_ptr.
Cc: qemu-sta...@nongnu.org
Fixes: 57a269469db ("tcg: Infrastructure for managing constant pools")
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 2 +-
1 file chang
Paolo Bonzini writes:
> This not necessary and makes it harder to write code that
This *is* not ...
> is portable between 32- and 64-bit systems: it adds extra casts even
> though size_of, align_of or offset_of already return the right type.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Jun
Paolo Bonzini writes:
> rustc_args is needed to smooth the difference in warnings between the various
> versions of rustc. Always include those arguments.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Junjie Mao
--
Best Regards
Junjie Mao
Paolo Bonzini writes:
> On Mon, Oct 21, 2024 at 8:16 AM Zhao Liu wrote:
>> unsafe_op_in_unsafe_fn is allowed in
>> rust/qemu-api/src/lib.rs. So should we wrap the bindings in a separate
>> lib (similar to the rust/bindings in the Linux kernel)?
>>
>> This way, the special lint settings can be
On 10/21/24 05:17, Ilya Leoshkevich wrote:
Running qemu-i386 on a system running with SELinux in enforcing mode
fails with:
qemu-i386: tests/tcg/i386-linux-user/sigreturn-sigmask: Unable to find a
guest_base to satisfy all guest address mapping requirements
-
The re
From: Hyman Huang
The way to enable multifd migration has been changed by commit,
82137e6c8c (migration: enforce multifd and postcopy preempt to
be set before incoming), and guestperf has not made the
necessary changes. If multifd migration had been enabled in the
previous manner, the following e
X86 architecture has always been a focus of my work. I would like to
help to review more related patches.
Signed-off-by: Zhao Liu
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c21d6a2f9e1e..d103c1149cbb 100644
--- a/MAINTAINERS
+++ b/MAINTAIN
From: Hyman Huang
Guestperf tool does not cover the multifd compression option
currently, it is worth supporting so that developers can
analysis the migration performance with different
compression algorithms.
Multifd support 4 compression algorithms currently:
zlib, zstd, qpl, uadk
To request
From: Hyman Huang
Guestperf was designed to test the performance of migration,
with a loose connection to the fundamental test cases of QEMU.
To improve the repository's structure, move it to the scripts
directory.
Add myself as a maintainer for the guestperf so that I can
help to fix bugs.
Si
From: Hyman Huang
Signed-off-by: Hyman Huang
Reviewed-by: Fabiano Rosas
Reviewed-by: Daniel P. Berrangé
---
scripts/migration/guestperf/comparison.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/migration/guestperf/comparison.py
b/scripts/migration/guestperf/co
From: Hyman Huang
v3:
1. Remove the two redundant assignments in [PATCH v2 2/5] suggested by Daniel
Please review, thanks
Yong
v2:
1. Update the MAINTAINERS section suggested by Fabiano Rosas
2. Ensure the dependencies when build the initrd-stress.img suggested by Daniel
3. Fix some bugs
v1:
From: Hyman Huang
The initrd-stress.img was compiled by specifying the target,
to make it easier for developers to play the guestperf tool,
make it built when dependencies suffices.
Signed-off-by: Hyman Huang
Reviewed-by: Daniel P. Berrangé
---
tests/migration/meson.build | 30 +++
Paolo Bonzini writes:
> Remove the duplicate code by using the module_init! macro; at the same time,
> simplify how module_init! is used, by taking inspiration from the
> implementation
> of #[derive(Object)].
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Junjie Mao
One minor comment below
On 10/17/24 05:54, Ilya Leoshkevich wrote:
Add a small test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/multiarch/sigreturn-sigmask.c | 51 +
1 file changed, 51 insertions(+)
create mode 100644 tests/tcg/multiarch/sigreturn-sigmask.c
Ack
On 10/14/24 13:34, Ilya Leoshkevich wrote:
If one thread modifies the mappings and another thread prints them,
a situation may occur that the printer thread sees a guest mapping
without a corresponding host mapping, leading to a crash in
open_self_maps_2().
Cc: qemu-sta...@nongnu.org
Fixes: 7b7a
Paolo Bonzini writes:
> Adjust the integration test to compile with a subset of QEMU object
> files, and make it actually create an object of the class it defines.
>
> Follow the Rust filesystem conventions, where tests go in tests/ if
> they use the library in the same way any other code would
On 10/13/24 11:47, Richard Henderson wrote:
Changes for v2:
- Improve probe_access_full{,_mmu} documentation
- Remove ra parameter from ptw_translate
r~
Richard Henderson (3):
include/exec: Improve probe_access_full{,_mmu} documentation
target/i386: Use probe_access_full_mmu in pt
Hi Cedric,
> Subject: Re: [SPAM] [PATCH v1 11/16] test/qtest/aspeed_smc-test: Support to
> test all flash models
>
> On 10/18/24 07:31, Jamin Lin wrote:
> > Currently, these test cases used the hardcode offset 0x140
> > (0x14000 * 256) which was beyond the 16MB flash size for flash page
> re
On 10/17/24 02:14, Ilya Leoshkevich wrote:
@@ -3312,10 +3358,26 @@ print_rt_sigprocmask(CPUArchState *cpu_env, const
struct syscallname *name,
case TARGET_SIG_SETMASK: how = "SIG_SETMASK"; break;
}
qemu_log("%s,", how);
-print_pointer(arg1, 0);
-print_pointer(arg2, 0);
On 10/22/24 03:13, Stefan Hajnoczi wrote:
> On Mon, Oct 21, 2024 at 09:32:50PM +0900, Damien Le Moal wrote:
>> On 10/21/24 20:08, Kevin Wolf wrote:
>>> Am 20.10.2024 um 03:03 hat Damien Le Moal geschrieben:
On 10/18/24 23:37, Kevin Wolf wrote:
> Am 04.10.2024 um 12:41 hat Sam Li geschriebe
On 9/21/24 01:57, Alexander Graf wrote:
When translating virtual to physical address with a guest CPU that
supports nested paging (NPT), we need to perform every page table walk
access indirectly through the NPT, which we correctly do.
However, we treat real mode (no page table walk) special: In
Hi Cedric,
> Subject: Re: [SPAM] [PATCH v1 16/16] test/qtest/ast2700-smc-test: Support to
> test AST2700
>
> Hello Jamin,
>
> On 10/18/24 07:31, Jamin Lin wrote:
> > Add test_ast2700_evb function and reused testcases which are from
> > aspeed_smc-test.c for AST2700 testing. The base address, fla
Hi Andrew and Cedric,
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Hi Cedric,
> Subject: Re: [SPAM] [PATCH v1 09/16] test/qtest/aspeed_smc-test: Introduce a
> new TestData to test different BMC SOCs
>
> On 10/18/24 07:31, Jamin Lin wrote:
> > Currently, these test cases are only used for testing fmc_cs0 for AST2400.
> > To test others BMC SOCs, introduces a new
Like 9971cbac2f3, which set CAPSTONE_AARCH64_COMPAT_HEADER,
also set CAPSTONE_SYSTEMZ_COMPAT_HEADER. Fixes the build
against capstone v6-alpha.
Signed-off-by: Richard Henderson
---
include/disas/capstone.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/disas/capstone.h b/include/di
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-8-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.h | 2 +-
tcg/riscv/tcg-target.c.inc | 7 +++
2 files
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-10-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.h | 2 +-
tcg/riscv/tcg-target.c.inc | 33 ++
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-13-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-6-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-con-set.h | 3 ++
tcg/riscv/tcg-target-con-str.h | 1 +
tcg/
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Message-ID: <20241007025700.47259-12-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.h | 6 +++---
tcg/riscv/tcg-target.c.inc | 36
2 fi
Use vrsub.vi to subtract from a constant.
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-con-set.h | 1 +
tcg/riscv/tcg-target.c.inc | 8 ++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/tcg/riscv/tcg-target-con-set.h b/tcg/riscv/tcg-target-con-set.h
index 9
The first immediate field is unsigned, whereas operand_vimm
extracts a signed value. There is no need to mask the result
with 'u'; just print the immediate with 'i'.
Fixes: 07f4964d178 ("disas/riscv.c: rvv: Add disas support for vector
instructions")
Reviewed-by: Alistair Francis
Reviewed-by: P
From: Huang Shiyuan
The RISC-V vector instruction set utilizes the LMUL field to group
multiple registers, enabling variable-length vector registers. This
implementation uses only the first register number of each group while
reserving the other register numbers within the group.
In TCG, each VE
This pointer needs to be reset after overflow just like
code_buf and code_ptr.
Cc: qemu-sta...@nongnu.org
Fixes: 57a269469db ("tcg: Infrastructure for managing constant pools")
Acked-by: Alistair Francis
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 2 +-
1 fil
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-9-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.h | 4 ++--
tcg/riscv/tcg-target.c.inc | 41 +
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-11-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-con-set.h | 1 +
tcg/riscv/tcg-target.h | 6 +--
tc
From: TANG Tiancheng
Extend comparison results from mask registers to SEW-width elements,
following recommendations in The RISC-V SPEC Volume I (Version 20240411).
This aligns with TCG's cmp_vec behavior by expanding compare results to
full element width: all 1s for true, all 0s for false.
Signe
From: TANG Tiancheng
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Richard Henderson
Message-ID: <20241007025700.47259-5-zhiwei_...@linux.alibaba.com>
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.c.inc | 76 +-
1 file chan
Introduce support for the RISC-V vector extension in the TCG backend.
Changes for v7:
- Adjust cpuinfo-riscv.c probing for vector support.
In addition to adjusting @left, assert expected value in vlenb.
I wondered what would happen if a binary built for -march=rv64gv
was run on a host without v
From: TANG Tiancheng
Add support for probing RISC-V vector extension availability in
the backend. This information will be used when deciding whether
to use vector instructions in code generation.
Cache lg2(vlenb) for the backend. The storing of lg2(vlenb) means
we can convert all of the divisio
On Mon, 2024-10-21 at 14:39 +0200, Cédric Le Goater wrote:
> On 10/18/24 07:31, Jamin Lin wrote:
> > Currently, these test cases used the hardcode offset 0x140 (0x14000 *
> > 256)
> > which was beyond the 16MB flash size for flash page read/write command
> > testing.
> > However, the default
Am 21.10.2024 um 15:21 hat Sam Li geschrieben:
> Kevin Wolf 于2024年10月18日周五 16:37写道：
> >
> > Am 04.10.2024 um 12:41 hat Sam Li geschrieben:
> > > When the file-posix driver emulates append write, it holds the lock
> > > whenever accessing wp, which limits the IO queue depth to one.
> > >
> > > The
Peter Xu writes:
> Per previous discussion [1,2], this patch deprecates query-migrationthreads
> command.
>
> To summarize, the major reason of the deprecation is due to no sensible way
> to consume the API properly:
>
> (1) The reported list of threads are incomplete (ignoring destination
>
On 10/21/24 14:02, Julian Ganz wrote:
Hi, Pierrick,
October 21, 2024 at 8:00 PM, "Pierrick Bouvier" wrote:
I agree it would be useful. Beyond the scope of this series, it would be
nice if we could add a control flow related API instead of asking to
plugins to do it themselves.
If we would prov
On 10/21/24 12:09, Daniel P. Berrangé wrote:
The docs for submitting a patch describe using your "Real Name" with
the Signed-off-by line. Although somewhat ambiguous, this has often
been interpreted to mean someone's legal name.
In recent times, there's been a general push back[1] against the no
Per previous discussion [1,2], this patch deprecates query-migrationthreads
command.
To summarize, the major reason of the deprecation is due to no sensible way
to consume the API properly:
(1) The reported list of threads are incomplete (ignoring destination
threads and non-multifd threa
Hi Igor,
Thanks for taking time to review and sorry for not being prompt. I was in
transit
due to some difficult personal situation.
On Fri, Oct 18, 2024 at 3:11 PM Igor Mammedov wrote:
> On Mon, 14 Oct 2024 20:22:02 +0100
> Salil Mehta wrote:
>
> > Certain CPU architecture specifications [1][
Hi Gustavo
On Thu, Oct 17, 2024 at 9:25 PM Gustavo Romero
wrote:
> Hi Salil,
>
> On 10/14/24 16:22, Salil Mehta wrote:
> > Certain CPU architecture specifications [1][2][3] prohibit changes to CPU
> > presence after the kernel has booted. This limitation exists because
> many system
> > initiali
Hi Gavin,
On Thu, Oct 17, 2024 at 6:27 AM Gavin Shan wrote:
> On 10/15/24 5:22 AM, Salil Mehta wrote:
> > Certain CPU architecture specifications [1][2][3] prohibit changes to CPU
> > presence after the kernel has booted. This limitation exists because
> many system
> > initializations rely on t
On Mon, Oct 21, 2024 at 10:05:23PM +0300, Michael Tokarev wrote:
> 21.10.2024 17:37, Peter Xu wrote:
> > Michael,
> >
> > On Fri, Oct 18, 2024 at 06:38:53PM +0300, Michael Tokarev wrote:
> > > Looking at this from qemu-stable PoV, I'm not 100% sure this change is
> > > good
> > > for stable-7.2 s
Steve Sistare writes:
> Initialize the migration object as early as possible so that migration
> configuration commands may be sent during the precreate phase. Also,
> start listening for the incoming migration connection during precreate,
> so that the listen port number is assigned (if dynamic
Hi, Pierrick,
October 21, 2024 at 8:00 PM, "Pierrick Bouvier" wrote:
> I agree it would be useful. Beyond the scope of this series, it would be
> nice if we could add a control flow related API instead of asking to
> plugins to do it themselves.
>
> If we would provide something like this, is t
On 10/16/24 02:28, Jiqian Chen wrote:
> In PVH dom0, when passthrough a device to domU, QEMU code
> xen_pt_realize->xc_physdev_map_pirq wants to use gsi, but in current codes
> the gsi number is got from file /sys/bus/pci/devices//irq, that is
> wrong, because irq is not equal with gsi, they are in
On 10/21/24 11:47, Alex Bennée wrote:
Pierrick Bouvier writes:
Hi Julian,
On 10/19/24 09:39, Julian Ganz wrote:
Some analysis greatly benefits, or depends on, information about
interrupts. For example, we may need to handle the execution of a new
translation block differently if it is not
HI Gustavo,
On Wed, Oct 16, 2024 at 10:01 PM Gustavo Romero
wrote:
> Hi Salil,
>
> On 10/14/24 16:22, Salil Mehta wrote:
> > Certain CPU architecture specifications [1][2][3] prohibit changes to CPU
> > presence after the kernel has booted. This limitation exists because
> many system
> > initia
Hi Miguel,
On Wed, Oct 16, 2024 at 3:09 PM Miguel Luis wrote:
> Hi Salil,
>
> > On 15 Oct 2024, at 09:59, Salil Mehta wrote:
> >
> > PROLOGUE
> >
> >
> > To assist in review and set the right expectations from this RFC, please
> first
> > read the sections *APPENDED AT THE END* of this
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