[PATCH 01/10] linux-user/flatload: Take mmap_lock in load_flt_binary()

2024-10-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé load_flt_binary() calls load_flat_file() -> page_set_flags(). page_set_flags() must be called with the mmap_lock held, otherwise it aborts: $ qemu-arm -L stm32/lib/ stm32/bin/busybox qemu-arm: ../accel/tcg/user-exec.c:505: page_set_flags: Assertion `have_mmap_l

[PATCH 05/10] linux-user: Trace wait4()'s and waitpid()'s wstatus

2024-10-05 Thread Richard Henderson
From: Ilya Leoshkevich Borrow the code for formatting the most frequent WIFEXITED() and WIFSIGNALED() special cases from from the strace's printstatus(). Output examples: 474729 wait4(-1,0x7f00767ff0a0,0,(nil)) = 474733 (wstatus={WIFEXITED(s) && WEXITSTATUS(s) == 1}) 475833 wait4(-1,0x

[PATCH 08/10] linux-user: Factor print_buf_len() out

2024-10-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Message-ID: <20240807124306.52903-4-phi...@linaro.org> Signed-off-by: Richard Henderson --- linux-user/strace.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/li

[PATCH 00/10] linux-user pre-PR

2024-10-05 Thread Richard Henderson
This collects some patches that I've edited prior to queueing, and I thought I'd post them before doing the actual PR. r~ Ilya Leoshkevich (1): linux-user: Trace wait4()'s and waitpid()'s wstatus Michael Vogt (2): linux-user: add openat2 support in linux-user linux-user: add strace suppo

[PATCH 03/10] linux-user: add openat2 support in linux-user

2024-10-05 Thread Richard Henderson
From: Michael Vogt This commit adds support for the `openat2()` syscall in the `linux-user` userspace emulator. It is implemented by extracting a new helper `maybe_do_fake_open()` out of the exiting `do_guest_openat()` and share that with the new `do_guest_openat2()`. Unfortunately we cannot jus

[PATCH 07/10] linux-user: Display sockaddr buffer as pointer

2024-10-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé Rather than 'raw param', display as pointer to get "NULL" instead of "0x". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Message-ID: <20240807124306.52903-3-phi...@linaro.org> Signed-off-by: Richard Hend

[PATCH 02/10] linux-user: Fix parse_elf_properties GNU0_MAGIC check

2024-10-05 Thread Richard Henderson
Comparing a string of 4 bytes only works in little-endian. Adjust bulk bswap to only apply to the note payload. Perform swapping of the note header manually; the magic is defined so that it does not need a runtime swap. Fixes: 83f990eb5adb ("linux-user/elfload: Parse NT_GNU_PROPERTY_TYPE_0 notes"

[PATCH 06/10] linux-user: Correct print_sockaddr() format

2024-10-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé When the %addr argument can not be accessed, a double comma is logged (the final qemu_log call prepend a comma). Move the comma from the final qemu_log to the preceeding switch cases that had omitted it. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <2024080712

[PATCH 10/10] linux-user: Add strace for recvfrom()

2024-10-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-ID: <20240807124306.52903-6-phi...@linaro.org> [rth: Do not dump output buffers.] Signed-off-by: Richard Henderson --- linux-user/strace.c| 17 + linux-user/strace.list | 2 +- 2 files changed, 18 i

[PATCH 04/10] linux-user: add strace support for openat2

2024-10-05 Thread Richard Henderson
From: Michael Vogt This commit adds support for the `openat2()` to `QEMU_STRACE`. It will use the `openat2.h` header if available to create user readable flags for the `resolve` argument but does not require the header otherwise. It also makes `copy_struct_from_user()` available via `qemu.h` and

[PATCH 09/10] linux-user: Add strace for sendto()

2024-10-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Message-ID: <20240807124306.52903-5-phi...@linaro.org> Signed-off-by: Richard Henderson --- linux-user/strace.c| 15 +++ linux-user/strace.list | 2 +- 2 files changed, 16 inserti

Re: [PATCH v2 0/4] linux-user/flatload: Take mmap_lock in load_flt_binary()

2024-10-05 Thread Richard Henderson
On 8/22/24 02:50, Philippe Mathieu-Daudé wrote: Fix for https://gitlab.com/qemu-project/qemu/-/issues/2525 Supersedes: <20240821153836.67987-1-phi...@linaro.org> Philippe Mathieu-Daudé (4): accel/tcg: Make page_set_flags() documentation public linux-user/flatload: Take mmap_lock in load_f

[PATCH] tcg/ppc: Use TCG_REG_TMP2 for scratch index in prepare_host_addr

2024-10-05 Thread Richard Henderson
In tcg_out_qemu_ldst_i128, we need a non-zero index register, which we then use as a base register in several address modes. Since we always have TCG_REG_TMP2 available, use that. In tcg_out_qemu_st, in the fallback when STDBRX is not available, avoid clobbering TCG_REG_TMP1, which might be h.base

[PATCH 2/4] hw/net/lan9118_phy: Reuse in imx_fec and consolidate implementations

2024-10-05 Thread Bernhard Beschow
imx_fec models the same PHY as lan9118_phy. The code is almost the same with imx_fec having more logging and tracing. Merge these improvements into lan9118_phy and reuse in imx_fec to fix the code duplication. Signed-off-by: Bernhard Beschow --- include/hw/net/imx_fec.h | 7 +- hw/net/imx_fec.

[PATCH 3/4] hw/net/lan9118_phy: Reuse MII constants

2024-10-05 Thread Bernhard Beschow
Prefer named constants over magic values for better readability. Signed-off-by: Bernhard Beschow --- include/hw/net/mii.h | 6 + hw/net/lan9118_phy.c | 59 +++- 2 files changed, 43 insertions(+), 22 deletions(-) diff --git a/include/hw/net/mii.h b/in

[PATCH 4/4] hw/net/lan9118_phy: Add missing 100 mbps full duplex advertisement

2024-10-05 Thread Bernhard Beschow
The real device advertises this mode and the device model already advertises 100 mbps half duplex and 10 mbps full+half duplex. So advertise this mode to make the model more realistic. Signed-off-by: Bernhard Beschow --- hw/net/lan9118_phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions

[PATCH 0/4] Consolidate lan9118 phy implementations

2024-10-05 Thread Bernhard Beschow
hw/net/imx_fec and hw/net/lan9118 implement the same Ethernet PHY with similar but not quite the same code. This series consolidates the implementations into one to fix code duplication. It then continues to make the code more readable by reusing some existing constants. Having a dedicated module

[PATCH 1/4] hw/net/lan9118: Extract lan9118_phy

2024-10-05 Thread Bernhard Beschow
A very similar implementation of the same device exists in imx_fec. Prepare for a common implementation by extracting the code into its own files. Signed-off-by: Bernhard Beschow --- include/hw/net/lan9118_phy.h | 31 hw/net/lan9118.c | 133 ++---

Re: [PATCH 00/18] Stop all qemu-cpu threads on a breakpoint

2024-10-05 Thread Ilya Leoshkevich
On Sat, 2024-10-05 at 22:26 +0200, Ilya Leoshkevich wrote: > On Sat, 2024-10-05 at 12:51 -0700, Richard Henderson wrote: > > On 9/25/24 00:43, Ilya Leoshkevich wrote: > > > On Tue, 2024-09-24 at 13:46 +0200, Richard Henderson wrote: > > > > On 9/23/24 18:12, Ilya Leoshkevich wrote: > > > > > Hi, >

Re: [PATCH 00/18] Stop all qemu-cpu threads on a breakpoint

2024-10-05 Thread Ilya Leoshkevich
On Sat, 2024-10-05 at 12:51 -0700, Richard Henderson wrote: > On 9/25/24 00:43, Ilya Leoshkevich wrote: > > On Tue, 2024-09-24 at 13:46 +0200, Richard Henderson wrote: > > > On 9/23/24 18:12, Ilya Leoshkevich wrote: > > > > Hi, > > > > > > > > On reporting a breakpoint in a non-non-stop mode, GDB

[PATCH v2 15/21] target/arm: Pass MemOp to get_phys_addr_gpc

2024-10-05 Thread Richard Henderson
Zero is the safe do-nothing value for callers to use. Pass the value through from get_phys_addr. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 9af86da597..e92537d8f2

[PATCH v2 11/21] target/hppa: Handle alignment faults in hppa_get_physical_address

2024-10-05 Thread Richard Henderson
In Chapter 5, Interruptions, the group 3 exceptions lists "Unaligned data reference trap" has higher priority than "Data memory break trap". Signed-off-by: Richard Henderson --- target/hppa/mem_helper.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/hppa/mem_hel

[PATCH v2 17/21] target/arm: Pass MemOp through get_phys_addr_twostage

2024-10-05 Thread Richard Henderson
Pass memop through get_phys_addr_twostage with its recursion with get_phys_addr_nogpc. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 0445c3ccf3..f1fca086a4 100644 ---

[PATCH v2 07/21] accel/tcg: Use the tlb_fill_align hook

2024-10-05 Thread Richard Henderson
When we have a tlb miss, defer the alignment check to the new tlb_fill_align hook. Move the existing alignment check so that we only perform it with a tlb hit. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 89 +- 1 file changed, 49 inserti

[PATCH v2 06/21] hw/core/tcg-cpu-ops: Introduce tlb_fill_align hook

2024-10-05 Thread Richard Henderson
Add the hook to struct TCGCPUOps. Add a default implementation that recognizes alignment faults before page faults. Populate all TCGCPUOps structures with the default implementation. Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 25 + accel/tcg/cp

[PATCH v2 01/21] accel/tcg: Assert noreturn from write-only page for atomics

2024-10-05 Thread Richard Henderson
There should be no "just in case"; the page is already in the tlb, and known to be not readable. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 117b516739..fd6459b695 1

[PATCH v2 20/21] target/arm: Add arm_cpu_tlb_fill_align

2024-10-05 Thread Richard Henderson
Fill in the tlb_fill_align hook. So far this is the same as tlb_fill_align_first, except that we can pass memop to get_phys_addr as well. Signed-off-by: Richard Henderson --- target/arm/internals.h | 3 +++ target/arm/cpu.c| 2 +- target/arm/tcg/cpu-v7m.c| 2 +- target/a

[PATCH v2 21/21] target/arm: Fix alignment fault priority in get_phys_addr_lpae

2024-10-05 Thread Richard Henderson
Now that we have the MemOp for the access, we can order the alignment fault caused by memory type before the permission fault for the page. For subsequent page hits, permission and stage 2 checks are known to pass, and so the TLB_CHECK_ALIGNED fault raised in generic code is not mis-ordered. Sign

[PATCH v2 05/21] include/exec/memop: Introduce memop_atomicity_bits

2024-10-05 Thread Richard Henderson
Split out of mmu_lookup. Signed-off-by: Richard Henderson --- include/exec/memop.h | 24 accel/tcg/cputlb.c | 16 ++-- 2 files changed, 26 insertions(+), 14 deletions(-) diff --git a/include/exec/memop.h b/include/exec/memop.h index f53bf618c6..b699bf7688

[PATCH v2 03/21] include/exec/memop: Move get_alignment_bits from tcg.h

2024-10-05 Thread Richard Henderson
This function is specific to MemOp, not TCG in general. Signed-off-by: Richard Henderson --- include/exec/memop.h | 23 +++ include/tcg/tcg.h| 23 --- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/include/exec/memop.h b/include/exec/

[PATCH v2 02/21] accel/tcg: Expand tlb_fill for 3 callers

2024-10-05 Thread Richard Henderson
Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 33 ++--- 1 file changed, 10 insertions(+), 23 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index fd6459b695..58960969f4 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1220,25

[PATCH v2 10/21] target/hppa: Fix priority of T, D, and B page faults

2024-10-05 Thread Richard Henderson
Drop the 'else' so that ret is overridden with the highest priority fault. Signed-off-by: Richard Henderson --- target/hppa/mem_helper.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index f027c494e2..f71cedd7a9 10

[PATCH v2 13/21] target/arm: Pass MemOp to get_phys_addr

2024-10-05 Thread Richard Henderson
Zero is the safe do-nothing value for callers to use. Signed-off-by: Richard Henderson --- target/arm/internals.h | 3 ++- target/arm/ptw.c| 2 +- target/arm/tcg/m_helper.c | 8 target/arm/tcg/tlb_helper.c | 2 +- 4 files changed, 8 insertions(+), 7 deletions(-) diff

[PATCH v2 18/21] target/arm: Pass MemOp to get_phys_addr_lpae

2024-10-05 Thread Richard Henderson
Pass the value through from get_phys_addr_nogpc. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index f1fca086a4..238b2c92a9 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @

[PATCH v2 19/21] target/arm: Move device detection earlier in get_phys_addr_lpae

2024-10-05 Thread Richard Henderson
Determine cache attributes, and thence Device vs Normal memory, earlier in the function. We have an existing regime_is_stage2 if block into which this can be slotted. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 49 1 file changed, 25

[PATCH v2 12/21] target/hppa: Add hppa_cpu_tlb_fill_align

2024-10-05 Thread Richard Henderson
Fill in the tlb_fill_align hook, so that we can recognize alignment exceptions in the correct priority order. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 3 +++ target/hppa/cpu.c| 2 +- target/hppa/mem_helper.c | 16 3 files changed, 16 insertions(+

[PATCH v2 00/21] accel/tcg: Introduce tlb_fill_align hook

2024-10-05 Thread Richard Henderson
This new hook will allow targets to recognize an alignment fault with the correct priority with respect to other faults that can be raised by paging. This should fix several hppa fault priority issues, most importantly that access permissions come before alignment. [ Helge, I find that my old hpp

[PATCH v2 14/21] target/arm: Pass MemOp to get_phys_addr_with_space_nogpc

2024-10-05 Thread Richard Henderson
Zero is the safe do-nothing value for callers to use. Signed-off-by: Richard Henderson --- target/arm/internals.h | 3 ++- target/arm/helper.c| 4 ++-- target/arm/ptw.c | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.

[PATCH v2 04/21] include/exec/memop: Rename get_alignment_bits

2024-10-05 Thread Richard Henderson
Rename to use "memop_" prefix, like other functions that operate on MemOp. Signed-off-by: Richard Henderson --- include/exec/memop.h | 4 ++-- accel/tcg/cputlb.c | 4 ++-- accel/tcg/user-exec.c | 4 ++-- target/arm/tcg/translate-a64.c | 4 ++-- target/xtensa/transl

[PATCH v2 09/21] target/hppa: Perform access rights before protection id check

2024-10-05 Thread Richard Henderson
In Chapter 5, Interruptions, the group 3 exceptions lists "Data memory access rights trap" in priority order ahead of "Data memory protection ID trap". Swap these checks in hppa_get_physical_address. Signed-off-by: Richard Henderson --- target/hppa/mem_helper.c | 12 ++-- 1 file changed

[PATCH v2 16/21] target/arm: Pass MemOp to get_phys_addr_nogpc

2024-10-05 Thread Richard Henderson
Zero is the safe do-nothing value for callers to use. Pass the value through from get_phys_addr_gpc and get_phys_addr_with_space_nogpc. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/arm/ptw.c b/targ

[PATCH v2 08/21] target/hppa: Add MemOp argument to hppa_get_physical_address

2024-10-05 Thread Richard Henderson
Just add the argument, unused at this point. Zero is the safe do-nothing value for all callers. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 2 +- target/hppa/int_helper.c | 2 +- target/hppa/mem_helper.c | 9 + target/hppa/op_helper.c | 2 +- 4 files changed, 8 inser

Re: [PATCH 00/18] Stop all qemu-cpu threads on a breakpoint

2024-10-05 Thread Richard Henderson
On 9/25/24 00:43, Ilya Leoshkevich wrote: On Tue, 2024-09-24 at 13:46 +0200, Richard Henderson wrote: On 9/23/24 18:12, Ilya Leoshkevich wrote: Hi, On reporting a breakpoint in a non-non-stop mode, GDB remotes must stop all threads. Currently qemu-user doesn't do that, breaking the debugging s

[PATCH v2 11/23] hw/i2c/mpc_i2c: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/i2c/mpc_i2c.c | 20 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c index 3d79c15653..16f4309ea9 100644 --- a/hw/i2c/mpc_i2c.c +++ b/hw/i2c/mpc_i2c.c @@ -2

[PATCH v2 17/23] hw/intc: Guard openpic_kvm.c by dedicated OPENPIC_KVM Kconfig switch

2024-10-05 Thread Bernhard Beschow
Allows to clearly mark code sections relying on this device type. Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/ppc/e500.c | 2 +- hw/intc/Kconfig | 4 hw/intc/meson.build | 3 +-- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/ppc/e500.c

[PATCH v2 19/23] hw/block/pflash_cfi01: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/block/pflash_cfi01.c | 21 - 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 7b6ec64442..cf11dada29 100644 --- a/hw/block/pflash_cfi01.c

[PATCH v2 12/23] hw/pci-host/ppce500: Reuse TYPE_PPC_E500_PCI_BRIDGE define

2024-10-05 Thread Bernhard Beschow
Prefer a macro rather than a string literal when instantiaging device models. Reviewed-by: BALATON Zoltan Signed-off-by: Bernhard Beschow --- hw/pci-host/ppce500.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 97e5d47cec.

[PATCH v2 14/23] hw/gpio/mpc8xxx: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/gpio/mpc8xxx.c | 22 +- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/hw/gpio/mpc8xxx.c b/hw/gpio/mpc8xxx.c index 63b7a5c881..de183c3be5 100644 --- a/hw/gpio/mpc8xxx.c +++ b/hw/gpio/mpc8xxx.

[PATCH v2 18/23] hw/sd/sdhci: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/sd/sdhci.c | 62 +-- 1 file changed, 26 insertions(+), 36 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index ed01499391..aa89513796 100644 --- a/hw/sd/sdhci.c +++ b/hw

[PATCH v2 15/23] hw/ppc/mpc8544_guts: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/ppc/mpc8544_guts.c | 20 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c index c02b34ccde..cf2317b3ab 100644 --- a/hw/ppc/mpc8544_guts.c +++ b/hw

[PATCH v2 09/23] hw/ppc/mpc8544_guts: Populate POR PLL ratio status register

2024-10-05 Thread Bernhard Beschow
Populate this read-only register with some arbitrary values which avoids U-Boot's get_clocks() to hang(). Signed-off-by: Bernhard Beschow --- hw/ppc/mpc8544_guts.c | 12 1 file changed, 12 insertions(+) diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c index e3540b0281..c0

[PATCH v2 21/23] hw/rtc/ds1338: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Signed-off-by: Bernhard Beschow --- hw/rtc/ds1338.c | 20 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/hw/rtc/ds1338.c b/hw/rtc/ds1338.c index a5fe221418..6de13caf99 100644 --- a/hw/rtc/ds1338.c +++ b/hw/rtc/ds1338.c @@ -14,7 +14,6 @@ #include "hw/i2c/i2c.h

[PATCH v2 22/23] hw/usb/hcd-ehci-sysbus: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/usb/hcd-ehci-sysbus.c | 118 +-- 1 file changed, 50 insertions(+), 68 deletions(-) diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index 2b1652f7a8..87a3bebe3e 100644 --- a/

[PATCH v2 13/23] hw/pci-host/ppce500: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/pci-host/ppce500.c | 42 ++ 1 file changed, 18 insertions(+), 24 deletions(-) diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index d7ff2ba778..1ce79ea20c 100644 --- a/hw/pci-

[PATCH v2 04/23] hw/ppc/e500: Remove unused "irqs" parameter

2024-10-05 Thread Bernhard Beschow
Reviewed-by: BALATON Zoltan Signed-off-by: Bernhard Beschow --- hw/ppc/e500.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 32996c188e..228287b457 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -825,7 +825,7 @@ static DeviceState

[PATCH v2 02/23] hw/ppc/e500: Remove firstenv variable

2024-10-05 Thread Bernhard Beschow
The firstenv variable is never read, so remove it. The env variable is then only used inside the loop, so move it there to restrict its scope. Signed-off-by: Bernhard Beschow --- hw/ppc/e500.c | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500

[PATCH v2 00/23] E500 Cleanup

2024-10-05 Thread Bernhard Beschow
This series is part of a bigger series exploring data-driven machine creation using device tree blobs on top of the e500 machines [1]. It contains patches to make this exploration easier which are also expected to provide value in themselves. The cleanup starts with the e500 machine class itself,

[PATCH v2 20/23] hw/i2c/smbus_eeprom: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/i2c/smbus_eeprom.c | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index 9e62c27a1a..1d4d9704bf 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/

[PATCH v2 23/23] hw/vfio/platform: Let vfio_start_eventfd_injection() take VFIOPlatformDevice pointer

2024-10-05 Thread Bernhard Beschow
Avoids one downcast, making the code more type-safe. Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/vfio/platform.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index a85c199c76..77bbfbf62c 100644 --- a/

[PATCH v2 01/23] hw/ppc/e500: Do not leak struct boot_info

2024-10-05 Thread Bernhard Beschow
The struct is allocated once with g_new0() but never free()'d. Fix the leakage by adding an attribute to struct PPCE500MachineState which avoids the allocation. While at it remove the obsolete /*< private >*/ markers. Signed-off-by: Bernhard Beschow --- hw/ppc/e500.h | 9 +++-- hw/ppc/e500

[PATCH v2 06/23] hw/ppc/e500: Use SysBusDevice API to access TYPE_CCSR's internal resources

2024-10-05 Thread Bernhard Beschow
Rather than accessing the attributes of TYPE_CCSR directly, use the SysBusDevice API which exists exactly for that purpose. Furthermore, registering the memory region with the SysBusDevice API makes it show up in QMP's `info qom-tree` command. Reviewed-by: BALATON Zoltan Signed-off-by: Bernhard B

[PATCH v2 08/23] hw/ppc/ppce500_ccsr: Log access to unimplemented registers

2024-10-05 Thread Bernhard Beschow
The CCSR space is just a container which is meant to be covered by platform device memory regions. However, QEMU only implements a subset of these devices. Add some logging to see which devices a guest attempts to access. Signed-off-by: Bernhard Beschow --- hw/ppc/ppce500_ccsr.c | 32 +++

[PATCH v2 16/23] hw/net/fsl_etsec/etsec: Prefer DEFINE_TYPES() macro

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/net/fsl_etsec/etsec.c | 22 +- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index 3fdd16ef2e..9bd886b996 100644 --- a/hw/net/fsl_etsec/et

[PATCH v2 03/23] hw/ppc/e500: Prefer QOM cast

2024-10-05 Thread Bernhard Beschow
Reviewed-by: BALATON Zoltan Signed-off-by: Bernhard Beschow --- hw/ppc/e500.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index f68779a1ea..32996c188e 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1008,7 +1008,7 @@ void ppce500_init(

[PATCH v2 05/23] hw/ppc/e500: Add missing device tree properties to i2c controller node

2024-10-05 Thread Bernhard Beschow
When compiling a decompiled device tree blob created with dumpdtb, dtc complains with: /soc@e000/i2c@3000: incorrect #address-cells for I2C bus /soc@e000/i2c@3000: incorrect #size-cells for I2C bus Fix this by adding the missing device tree properties. Reviewed-by: Cédric Le Goater

[PATCH v2 07/23] hw/ppc/e500: Extract ppce500_ccsr.c

2024-10-05 Thread Bernhard Beschow
The device model already has a header file, so extract its implementation into an accompanying source file like other e500 devices. While at it rename the header file to reflect the name of the structure defined there. This commit is also a preparation for the next commit. Signed-off-by: Bernhard

[PATCH v2 10/23] hw/i2c/mpc_i2c: Convert DPRINTF to trace events for register access

2024-10-05 Thread Bernhard Beschow
Reviewed-by: Cédric Le Goater Signed-off-by: Bernhard Beschow --- hw/i2c/mpc_i2c.c| 9 + hw/i2c/trace-events | 5 + 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c index 2467d1a9aa..3d79c15653 100644 --- a/hw/i2c/mpc_i2c.c +++ b

Re: [PATCH 11/18] accel/tcg: Unify user implementations of qemu_cpu_kick()

2024-10-05 Thread Richard Henderson
On 9/23/24 09:13, Ilya Leoshkevich wrote: linux-user and bsd-user have the same implementation. Move it to user-exec.c. Signed-off-by: Ilya Leoshkevich --- accel/tcg/user-exec.c | 5 + bsd-user/main.c | 5 - linux-user/main.c | 5 - 3 files changed, 5 insertions(+), 10

Re: [PATCH 06/18] qemu-thread: Introduce QEMU_MUTEX_INITIALIZER

2024-10-05 Thread Richard Henderson
On 9/23/24 09:13, Ilya Leoshkevich wrote: Allow static initialization of mutexes. Signed-off-by: Ilya Leoshkevich --- include/qemu/thread-posix.h | 6 ++ include/qemu/thread-win32.h | 6 ++ 2 files changed, 12 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH 07/18] qemu-thread: Introduce QEMU_COND_INITIALIZER

2024-10-05 Thread Richard Henderson
On 9/23/24 09:13, Ilya Leoshkevich wrote: Allow static initialization of condition variables. Signed-off-by: Ilya Leoshkevich --- include/qemu/thread-posix.h | 2 ++ include/qemu/thread-win32.h | 2 ++ 2 files changed, 4 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH 05/18] accel/tcg: Factor out cpu_exec_user()

2024-10-05 Thread Richard Henderson
On 9/23/24 09:13, Ilya Leoshkevich wrote: All linux-user cpu_loop() implementations contain the same sequence of function calls. Factor them out so that they can be changed in one place. Signed-off-by: Ilya Leoshkevich --- accel/tcg/user-exec.c | 12 bsd-user/aarch64

Re: [PATCH 04/18] gdbstub: Factor out gdb_try_stop()

2024-10-05 Thread Richard Henderson
On 9/23/24 09:12, Ilya Leoshkevich wrote: Move checking and setting allow_stop_reply into a function. Signed-off-by: Ilya Leoshkevich --- gdbstub/gdbstub.c | 15 +++ gdbstub/internals.h | 2 ++ gdbstub/system.c| 6 ++ gdbstub/user.c | 11 --- 4 files ch

Re: [PATCH 03/18] gdbstub: Move gdb_syscall_mode to GDBSyscallState

2024-10-05 Thread Richard Henderson
On 9/23/24 09:12, Ilya Leoshkevich wrote: Follow the convention that all the pieces of the global stub state must be inside a single struct. Signed-off-by: Ilya Leoshkevich --- gdbstub/syscalls.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) Reviewed-by: Richa

Re: [PATCH 02/18] gdbstub: Move phy_memory_mode to GDBSystemState

2024-10-05 Thread Richard Henderson
On 9/23/24 09:12, Ilya Leoshkevich wrote: Follow the convention that all the pieces of the global stub state must be inside a single struct. Signed-off-by: Ilya Leoshkevich --- gdbstub/system.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/gdbstub/system.c

Re: [PATCH 01/18] gdbstub: Make gdb_get_char() static

2024-10-05 Thread Richard Henderson
On 9/23/24 09:12, Ilya Leoshkevich wrote: It's user-only since commit a7e0f9bd2ace ("gdbstub: abstract target specific details from gdb_put_packet_binary"). Signed-off-by: Ilya Leoshkevich --- gdbstub/internals.h | 2 -- gdbstub/user.c | 2 +- 2 files changed, 1 insertion(+), 3 deletion

Re: [PATCH v3 5/5] linux-user: Add strace for recvfrom()

2024-10-05 Thread Richard Henderson
On 10/1/24 23:55, Ilya Leoshkevich wrote: On Wed, 2024-08-07 at 14:43 +0200, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé ---  linux-user/strace.c    | 19 +++  linux-user/strace.list |  2 +-  2 files changed, 20 insertions(+), 1 deletion(-) diff --git

Re: [PATCH v3 1/5] linux-user: Correct print_sockaddr() format

2024-10-05 Thread Richard Henderson
On 10/2/24 00:54, Ilya Leoshkevich wrote: On Wed, 2024-08-07 at 14:43 +0200, Philippe Mathieu-Daudé wrote: When the %addr argument can not be accessed, a double comma is logged (the final qemu_log call prepend a comma). Call print_raw_param with last=1 to avoid the extra comma. Remove spurious s

Re: [PATCH] linux-user: Trace wait4()'s and waitpid()'s wstatus

2024-10-05 Thread Richard Henderson
On 10/5/24 10:57, Richard Henderson wrote: On 10/1/24 12:32, Ilya Leoshkevich wrote: Borrow the code for formatting the most frequent WIFEXITED() and WIFSIGNALED() special cases from from the strace's printstatus(). Output examples: 474729 wait4(-1,0x7f00767ff0a0,0,(nil)) = 474733 (wstatu

Re: [PATCH] linux-user: Trace wait4()'s and waitpid()'s wstatus

2024-10-05 Thread Richard Henderson
On 10/1/24 12:32, Ilya Leoshkevich wrote: Borrow the code for formatting the most frequent WIFEXITED() and WIFSIGNALED() special cases from from the strace's printstatus(). Output examples: 474729 wait4(-1,0x7f00767ff0a0,0,(nil)) = 474733 (wstatus={WIFEXITED(s) && WEXITSTATUS(s) == 1})

Re: [PATCH v9 0/2] linux-user: add openat2 support in linux-user

2024-10-05 Thread Richard Henderson
On 10/1/24 08:14, Michael Vogt wrote: This is v9 of the openat2 support in linux-user. Thanks to Laurent for spotting another missing tswap64() in v8 (and my appologies that I overlooked this). Looking forward to your feedback/ideas! Thanks, Michael v8 -> v9 - use "tswap64()" in strace.c fo

Re: [PATCH] meson: ensure we enable CMPXCHG128 on x86_64

2024-10-05 Thread Pierrick Bouvier
On 10/5/24 10:34, Pierrick Bouvier wrote: On 10/5/24 09:16, Michael Tokarev wrote: 05.10.2024 01:01, Pierrick Bouvier wrote: Alex discovered that CMPXCHG128 was not enabled when building for x86_64, resulting in slow execution for wide atomic instructions, creating a huge contention when combin

Re: [PATCH] meson: ensure we enable CMPXCHG128 on x86_64

2024-10-05 Thread Pierrick Bouvier
On 10/5/24 09:16, Michael Tokarev wrote: 05.10.2024 01:01, Pierrick Bouvier wrote: Alex discovered that CMPXCHG128 was not enabled when building for x86_64, resulting in slow execution for wide atomic instructions, creating a huge contention when combined with a high number of cpus (found while

Re: [PATCH] linux-user: Fix parse_elf_properties GNU0_MAGIC check

2024-10-05 Thread Michael Tokarev
05.10.2024 19:48, Richard Henderson wrote: Comparing a string of 4 bytes only works in little-endian. Adjust bulk bswap to only apply to the note payload. Perform swapping of the note header manually; the magic is defined so that it does not need a runtime swap. I think this is more confusing

Re: {PATCH] accel/tcg: Fix CPU specific unaligned behaviour

2024-10-05 Thread Richard Henderson
On 10/4/24 07:24, Richard Henderson wrote: I was hoping for a reorg of the target hooks that could allow the target to see misalignment and permission check simultaneously, then the target chooses the order in which the two faults are presented.  Given how complicated tlb_fill is though, I don't

[PATCH] linux-user: Fix parse_elf_properties GNU0_MAGIC check

2024-10-05 Thread Richard Henderson
Comparing a string of 4 bytes only works in little-endian. Adjust bulk bswap to only apply to the note payload. Perform swapping of the note header manually; the magic is defined so that it does not need a runtime swap. Fixes: 83f990eb5adb ("linux-user/elfload: Parse NT_GNU_PROPERTY_TYPE_0 notes"

Re: [PATCH] meson: ensure we enable CMPXCHG128 on x86_64

2024-10-05 Thread Michael Tokarev
05.10.2024 19:22, Michael Tokarev wrote: 05.10.2024 19:20, Richard Henderson wrote: No, it doesn't fail to link.  That's why it took so long to notice. It does here quite often during bisection between 9.0 and 9.1. Lemme see.. So, it is just 2 steps: $ git bisect start v9.0.0 v9.1.0 # at

Re: [PATCH] meson: ensure we enable CMPXCHG128 on x86_64

2024-10-05 Thread Michael Tokarev
05.10.2024 19:20, Richard Henderson wrote: On 10/5/24 09:16, Michael Tokarev wrote: Besides, in the current situation where CONFIG_CMPXCHG128 is not defined due to this bug, the final link fails due to generated calls to -latomic, - which might mean we have something else wrong. No, it doesn't

Re: [PATCH] meson: ensure we enable CMPXCHG128 on x86_64

2024-10-05 Thread Richard Henderson
On 10/5/24 09:16, Michael Tokarev wrote: Besides, in the current situation where CONFIG_CMPXCHG128 is not defined due to this bug, the final link fails due to generated calls to -latomic, - which might mean we have something else wrong. No, it doesn't fail to link. That's why it took so long t

Re: [PATCH] meson: fix machine option for x86_version

2024-10-05 Thread Michael Tokarev
05.10.2024 19:08, Michael Tokarev wrote: 05.10.2024 01:37, Pierrick Bouvier wrote: s/mbmi1/mbmi/ When configuring with -Dx86_version >= 3, meson step works, but compilation fails because option -mbmi1 is unknown. Fixes: v9.0.0-1771-gef7d1adfa8 "meson: allow configuring the x86-64 baseline" Re

Re: [PATCH] meson: ensure we enable CMPXCHG128 on x86_64

2024-10-05 Thread Michael Tokarev
05.10.2024 01:01, Pierrick Bouvier wrote: Alex discovered that CMPXCHG128 was not enabled when building for x86_64, resulting in slow execution for wide atomic instructions, creating a huge contention when combined with a high number of cpus (found while booting android aarch64 guest on x86_64 ho

Re: [PATCH] meson: fix machine option for x86_version

2024-10-05 Thread Michael Tokarev
05.10.2024 01:37, Pierrick Bouvier пишет: s/mbmi1/mbmi/ When configuring with -Dx86_version >= 3, meson step works, but compilation fails because option -mbmi1 is unknown. Fixes: v9.0.0-1771-gef7d1adfa8 "meson: allow configuring the x86-64 baseline" Revieved-by: Michael Tokarev Thanks, /mjt

[PATCH v3 0/2] Drop ignore_memory_transaction_failures for xilink_zynq

2024-10-05 Thread Chao Liu
Hi all, Following the Zynq-7000 SoC Data Sheet's "Memory Map" section (referenced at [1]), We have identified the need to create placeholders for unimplemented devices across the entire range of Zynq-7000 series boards. This effort aims at ensuring maximum compatibility with different models wi

[PATCH v3 2/2] xilink-zynq-devcfg: Fix up for memory address range size not set correctly

2024-10-05 Thread Chao Liu
diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c index b8544d0731..7170353a62 100644 --- a/hw/dma/xlnx-zynq-devcfg.c +++ b/hw/dma/xlnx-zynq-devcfg.c @@ -372,7 +372,7 @@ static void xlnx_zynq_devcfg_init(Object *obj) s->regs_info, s->regs,

[PATCH v3 1/2] xilink_zynq: Add various missing unimplemented devices

2024-10-05 Thread Chao Liu
Add xilinx zynq board memory mapping is implemented in the device. Remove a ignore_memory_transaction_failures concurrently. Source: Zynq-7000 SoC Data Sheet: Overview, Chapter: Memory Map See: https://www.mouser.com/datasheet/2/903/ds190_Zynq_7000_Overview-1595492.pdf Signed-off-by: Chao Liu -

[PATCH 01/20] accel/tcg: Assert noreturn from write-only page for atomics

2024-10-05 Thread Richard Henderson
There should be no "just in case"; the page is already in the tlb, and known to be not readable. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 117b516739..fd6459b695 1

[PATCH 08/20] target/hppa: Add MemOp argument to hppa_get_physical_address

2024-10-05 Thread Richard Henderson
Just add the argument, unused at this point. Zero is the safe do-nothing value for all callers. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 2 +- target/hppa/int_helper.c | 2 +- target/hppa/mem_helper.c | 9 + target/hppa/op_helper.c | 2 +- 4 files changed, 8 inser

[PATCH 17/20] target/arm: Pass MemOp through get_phys_addr_twostage

2024-10-05 Thread Richard Henderson
Pass memop through get_phys_addr_twostage with its recursion with get_phys_addr_nogpc. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 0445c3ccf3..f1fca086a4 100644 ---

[PATCH 12/20] target/hppa: Add hppa_cpu_tlb_fill_align

2024-10-05 Thread Richard Henderson
Fill in the tlb_fill_align hook, so that we can recognize alignment exceptions in the correct priority order. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 3 +++ target/hppa/cpu.c| 2 +- target/hppa/mem_helper.c | 16 3 files changed, 16 insertions(+

[PATCH 00/20] accel/tcg: Introduce tlb_fill_align hook

2024-10-05 Thread Richard Henderson
This new hook will allow targets to recognize an alignment fault with the correct priority with respect to other faults that can be raised by paging. This should fix several hppa fault priority issues, most importantly that access permissions come before alignment. This should fix the documented

[PATCH 16/20] target/arm: Pass MemOp to get_phys_addr_nogpc

2024-10-05 Thread Richard Henderson
Zero is the safe do-nothing value for callers to use. Pass the value through from get_phys_addr_gpc and get_phys_addr_with_space_nogpc. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/arm/ptw.c b/targ

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