Re: [PATCH v3 08/14] hvf: arm: Ignore writes to CNTP_CTL_EL0

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf MacOS unconditionally disables interrupts of the physical timer on boot and then continues to use the virtual one. We don't really want to support a full physical timer emulation, so let's just ignore those writes. Signed-off-

Re: [PATCH v3 07/14] hw/misc/pvpanic: Add MMIO interface

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf In addition to the ISA and PCI variants of pvpanic, let's add an MMIO platform device that we can use in embedded arm environments. Signed-off-by: Alexander Graf Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathie

Re: [PATCH v3 06/14] hw: Add vmapple subdir

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf We will introduce a number of devices that are specific to the vmapple target machine. To keep them all tidily together, let's put them into a single target directory. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-

Re: [PATCH v3 14/14] hw/vmapple/vmapple: Add vmapple machine type

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf Apple defines a new "vmapple" machine type as part of its proprietary macOS Virtualization.Framework vmm. This machine type is similar to the virt one, but with subtle differences in base devices, a few special vmapple device a

Re: [PATCH v3 13/14] hw/vmapple/virtio-blk: Add support for apple virtio-blk

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf Apple has its own virtio-blk PCI device ID where it deviates from the official virtio-pci spec slightly: It puts a new "apple type" field at a static offset in config space and introduces a new barrier command. This patch firs

Re: [PATCH] virtio-gpu: Add definition for resource_uuid feature

Hello Dorinda, On Fri, 04 Oct 2024 19:41, Dorinda Bassey wrote: Add the VIRTIO_GPU_F_RESOURCE_UUID feature to enable the assignment of resources UUIDs for export to other virtio devices. Signed-off-by: Dorinda Bassey --- hw/display/vhost-user-gpu.c| 4 hw/display/virtio-gpu-base.c |

Re: [PATCH v3 12/14] hw/vmapple/cfg: Introduce vmapple cfg region

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf Instead of device tree or other more standardized means, VMApple passes platform configuration to the first stage boot loader in a binary encoded format that resides at a dedicated RAM region in physical address space. This pa

Re: [PATCH v3 11/14] hw/vmapple/bdif: Introduce vmapple backdoor interface

On 2024/09/28 17:57, Phil Dennis-Jordan wrote: From: Alexander Graf The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG emulation) via virtio-pci as well as a special, simple backdoor platform device. This patch implements this backdoor platform device to the best of my

Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: Philippe Mathieu-Daudé (25): gdbstub/helpers: Have ldtul_p() definition use ldn_p() target/hexagon: Replace ldtul_p() -> ldl_p() target/alpha: Replace ldtul_p() -> ldq_p() target/s390x: Replace ldtul_p() -> ldq_p() gdbstub/helpers: In

Re: [PATCH v2 17/25] hw/m68k: Use explicit big-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The M68K architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st$

Re: [PATCH v2 14/25] target/tricore: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The TriCore architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${ac

Re: [PATCH v2 12/25] target/loongarch: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The LoongArch architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${

Re: [PATCH v2 11/25] linux-user/i386: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The x86 architecture uses little endianness. Directly use the little-endian LD/ST API. Signed-off-by: Philippe Mathieu-Daudé --- linux-user/i386/signal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson

Re: [PATCH v2 10/25] target/avr: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The AVR architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p

Re: [PATCH v2 09/25] target/i386: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The x86 architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p

Re: [PATCH v2 08/25] hw/i386: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The x86 architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p

Re: [PATCH v2 07/25] target/hexagon: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The Hexagon architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${ac

Re: [PATCH v2 06/25] target/alpha: Use explicit little-endian LD/ST API

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The Alpha architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}

Re: [PATCH v2 05/25] gdbstub/helpers: Introduce ldtul_$endian_p() helpers

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: Introduce ldtul_le_p() and ldtul_be_p() to use directly in place of ldtul_p() when a target endianness is fixed. Signed-off-by: Philippe Mathieu-Daudé --- include/gdbstub/helpers.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/g

Re: [PATCH v2 04/25] target/s390x: Replace ldtul_p() -> ldq_p()

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The S390X target is only built for 64-bit. Using ldtul_p() is pointless, replace by ldq_p(). Mechanical change doing: $ sed -i -e 's/ldtul_p/ldq_p/' $(git grep -wl ldtul_p target/s390x/) Signed-off-by: Philippe Mathieu-Daudé --- target/s390

Re: [PATCH v2 03/25] target/alpha: Replace ldtul_p() -> ldq_p()

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The Alpha target is only built for 64-bit. Using ldtul_p() is pointless, replace by ldq_p(). Mechanical change doing: $ sed -i -e 's/ldtul_p/ldq_p/' $(git grep -wl ldtul_p target/alpha/) Signed-off-by: Philippe Mathieu-Daudé --- target/alpha

Re: [PATCH v2 01/25] gdbstub/helpers: Have ldtul_p() definition use ldn_p()

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: Use ldn_p(TARGET_LONG_SIZE) instead of ldl_p() / ldq_p(). Signed-off-by: Philippe Mathieu-Daudé --- include/gdbstub/helpers.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/he

Re: [PATCH v2 02/25] target/hexagon: Replace ldtul_p() -> ldl_p()

On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: The Hexagon target is only built for 64-bit. 32-bit, which confuses the reading of the patch. :-) Otherwise, Reviewed-by: Richard Henderson r~

Re: [RFC PATCH] accel/tcg: add tracepoints for cpu_loop_exit_atomic

On 10/4/24 06:52, Alex Bennée wrote: We try to avoid using cpu_loop_exit_atomic as it brings in an all-core sync point. However on some cpu/kernel/benchmark combinations it is starting to show up in the performance profile. To make it easier to see whats going on add tracepoints for the slow path

[PATCH v2] Add plugin bbvgen: basic block icounts for topblocks + simpoints

Tally icounts for basic blocks. The data is useful for producing human-readable topblocks reports, and for creating simpoints to guide accurate & efficient machine simulation runs. QEMU's The Tiny Code Generator creates TCG blocks in a way that is expedient for JIT translation but does not conform

Re: [PULL 01/24] configure: move -mcx16 flag out of CPU_CFLAGS

On 10/4/24 09:08, Alex Bennée wrote: Paolo Bonzini writes: From: Artyom Kunakovsky The point of CPU_CFLAGS is really just to select the appropriate multilib, for example for library linking tests, and -mcx16 is not needed for that purpose. Furthermore, if -mcx16 is part of QEMU's choice of

[PATCH] meson: fix machine option for x86_version

s/mbmi1/mbmi/ When configuring with -Dx86_version >= 3, meson step works, but compilation fails because option -mbmi1 is unknown. Signed-off-by: Pierrick Bouvier --- meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meson.build b/meson.build index af2ce595dcc..ebd9

[PATCH] meson: ensure we enable CMPXCHG128 on x86_64

Alex discovered that CMPXCHG128 was not enabled when building for x86_64, resulting in slow execution for wide atomic instructions, creating a huge contention when combined with a high number of cpus (found while booting android aarch64 guest on x86_64 host). The problem is that even though we ena

Re: [PATCH 3/3] target/ppc: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

On 10/4/24 13:26, Philippe Mathieu-Daudé wrote: Directly use tcg_constant_tl() for constant integer, this save a call to tcg_gen_movi_tl() and a temp register. Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/translate.c | 13 + 1 file changed, 5

Re: [PATCH 2/3] target/tricore: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

On 10/4/24 13:26, Philippe Mathieu-Daudé wrote: Directly use tcg_constant_tl() for constant integer, this save a call to tcg_gen_movi_tl(). Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(

Re: [PATCH 1/3] target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

On 10/4/24 13:26, Philippe Mathieu-Daudé wrote: @@ -11428,17 +11415,12 @@ static void gen_compute_compact_branch(DisasContext *ctx, uint32_t opc, void gen_addiupc(DisasContext *ctx, int rx, int imm, int is_64_bit, int extended) { -TCGv t0; - if (extended && (ctx-

Re: [PATCH 1/2] gdbstub: Fix wrong CPUState pointer in breakpoint functions

Roque Arcudia Hernandez writes: > In the context of using the remote gdb with multiple > processes/inferiors (multiple cluster machine) a given breakpoint > will target an specific inferior. If needed the remote protocol will > use the packet 'H op thread-id' with op = 'g' to change focus to the

[PATCH 3/3] target/ppc: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

Directly use tcg_constant_tl() for constant integer, this save a call to tcg_gen_movi_tl() and a temp register. Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/translate.c | 13 + 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/targe

[PATCH 1/3] target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

Directly use tcg_constant_tl() for constant integer, this save a call to tcg_gen_movi_tl(), often saving a temp register. Most of the places found using the following Coccinelle spatch script: @@ identifier tmp; constant val; @@ *TCGv tmp = tcg_temp_new(); ... *tcg_gen_

[PATCH 0/3] target: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

Directly use tcg_constant_tl() for constant integer, this save a call to tcg_gen_movi_tl(), often saving a temp register. (Only build-tested) Philippe Mathieu-Daudé (3): target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl() target/tricore: Use tcg_constant_tl() instead of tcg_gen_mo

[PATCH 2/3] target/tricore: Use tcg_constant_tl() instead of tcg_gen_movi_tl()

Directly use tcg_constant_tl() for constant integer, this save a call to tcg_gen_movi_tl(). Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/tricore/translate.c b/targ

Re: [RFC v2 1/2] vhost-vdpa: Implement IOVA->GPA tree

On 10/4/24 11:17 AM, Eugenio Perez Martin wrote: On Fri, Oct 4, 2024 at 2:45 PM Jonah Palmer wrote: Implements the IOVA->GPA tree for handling mapping, unmapping, and translations for guest memory regions. When the guest has overlapping memory regions, an HVA to IOVA translation may return

Re: [PULL 00/23] Trivial patches for 2024-10-04

On Fri, 4 Oct 2024 at 17:07, Michael Tokarev wrote: > > The following changes since commit 423be09ab9492735924e73a2d36069784441ebc6: > > Merge tag 'warn-pull-request' of https://gitlab.com/marcandre.lureau/qemu > into staging (2024-10-03 10:32:54 +0100) > > are available in the Git repository a

Re: [PING PATCH v5 0/3] Check clock connection between STM32L4x5 RCC and peripherals

On Thu, 3 Oct 2024 at 09:11, Inès Varhol wrote: > > Among implemented STM32L4x5 devices, USART, GPIO and SYSCFG > have a clock source, but none has a corresponding test in QEMU. > > This patch makes sure that all 3 devices create a clock correctly, > adds a QOM property to access clocks' periods f

Re: [PATCH 3/4] STM32: new GPIO device

On Fri, 27 Sept 2024 at 16:08, Román Cárdenas Rodríguez wrote: > > Generic GPIO class for STM32 devices. It can be used for most of STM32 chips. > Note that it does not implement configuration locking mechanisms. > > Signed-off-by: Roman Cardenas Rodriguez > --- > hw/gpio/Kconfig |

Re: [PATCH 1/3] hw/intc/arm_gicv3: Add cast to match the documentation

On Tue, 1 Oct 2024 at 10:51, Alexandra Diupina wrote: > > The result of 1 << regbit with regbit==31 has a 1 in the 32nd bit. > When cast to uint64_t (for further bitwise OR), the 32 most > significant bits will be filled with 1s. However, the documentation > states that the upper 32 bits of ICH_AP

Re: [PATCH 1/4] STM32F4: new RCC device

On Fri, 27 Sept 2024 at 16:08, Román Cárdenas Rodríguez wrote: > > Generic RCC class for STM32 devices. It can be used for most of STM32 chips. > Note that it only implements enable and reset capabilities. > > Signed-off-by: Roman Cardenas Rodriguez Patches 1 and 2 looked OK to me, so I've appli

Re: [PATCH 3/4] STM32: new GPIO device

On Fri, 27 Sept 2024 at 16:08, Román Cárdenas Rodríguez wrote: > > Generic GPIO class for STM32 devices. It can be used for most of STM32 chips. > Note that it does not implement configuration locking mechanisms. So we already have an stm32l4x5 GPIO device. How different is that one from these on

Re: [PATCH] tests/functional: Fix hash validation

On Fri, 04 Oct 2024 16:02, Thomas Huth wrote: The _check() function is supposed to check whether the hash of the downloaded file matches the expected one. Unfortunately, during the last rework of this function, the check was accidentally turned into returning the hash value itself instead of a T

[PATCH v3] tests/qtest: Add XIVE tests for the powernv10 machine

From: Frederic Barrat These XIVE tests include: - General interrupt IRQ tests that: - enable and trigger an interrupt - acknowledge the interrupt - end of interrupt processing - Test the Pull Thread Context to Odd Thread Reporting Line - Test the different cache flush inject and queue sync

Re: [PATCH 12/16] target/sparc: Use explicit big-endian LD/ST API

On 04/10/2024 00:42, Philippe Mathieu-Daudé wrote: The SPARC architecture uses big endianness. Directly use the big-endian LD/ST API. Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/gdbstub.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/sparc/gdbstub

Re: [PATCH 11/16] hw/sparc: Use explicit big-endian LD/ST API

On 04/10/2024 00:42, Philippe Mathieu-Daudé wrote: The SPARC architecture uses big endianness. Directly use the big-endian LD/ST API. Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 42 +- hw/sparc/sun4m.c | 6 +++--- hw/sparc64/sun

Re: [PATCH] hw/arm/omap1: Remove unused omap_uwire_attach() method

On Tue, 3 Sept 2024 at 22:53, Philippe Mathieu-Daudé wrote: > > The recently removed 'cheetah' machine was the single user > of the omap_uwire_attach() method. Remove it altogether with > the uWireSlave structure. Replace the send/receive callbacks > by Unimplemented logging. > > Signed-off-by: Ph

Re: [PATCH 2/8] hw/core/cpu: Introduce CPUClass::is_big_endian() handler

On Fri, 4 Oct 2024 at 17:54, Philippe Mathieu-Daudé wrote: > > On 4/10/24 18:41, Peter Maydell wrote: > > On Fri, 4 Oct 2024 at 17:22, Philippe Mathieu-Daudé > > wrote: > >> > >> Introduce the CPUClass::is_big_endian() handler and its > >> common default. > >> > >> Signed-off-by: Philippe Mathie

Re: [PATCH v9 4/7] qapi: add blockdev-replace command

On 02.10.24 17:41, Vladimir Sementsov-Ogievskiy wrote: On 26.06.24 14:53, Vladimir Sementsov-Ogievskiy wrote: diff --git a/qapi/block-core.json b/qapi/block-core.json index df5e07debd..0a6f08a6e0 100644 --- a/qapi/block-core.json +++ b/qapi/block-core.json @@ -6148,3 +6148,91 @@   ##   { 'struct

Re: [PATCH 2/8] hw/core/cpu: Introduce CPUClass::is_big_endian() handler

On 4/10/24 18:41, Peter Maydell wrote: On Fri, 4 Oct 2024 at 17:22, Philippe Mathieu-Daudé wrote: Introduce the CPUClass::is_big_endian() handler and its common default. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 3 ++- hw/core/cpu-common.c | 7 +++ 2 files ch

[PATCH] virtio-gpu: Add definition for resource_uuid feature

Add the VIRTIO_GPU_F_RESOURCE_UUID feature to enable the assignment of resources UUIDs for export to other virtio devices. Signed-off-by: Dorinda Bassey --- hw/display/vhost-user-gpu.c| 4 hw/display/virtio-gpu-base.c | 3 +++ include/hw/virtio/virtio-gpu.h | 3 +++ 3 files changed, 1

Re: [PATCH 2/8] hw/core/cpu: Introduce CPUClass::is_big_endian() handler

On Fri, 4 Oct 2024 at 17:22, Philippe Mathieu-Daudé wrote: > > Introduce the CPUClass::is_big_endian() handler and its > common default. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/core/cpu.h | 3 ++- > hw/core/cpu-common.c | 7 +++ > 2 files changed, 9 insertions(+), 1 del

Re: [PATCH v2 18/25] target/m68k: Use explicit big-endian LD/ST API

On 4/10/24 18:30, Philippe Mathieu-Daudé wrote: The M68K architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st$

[PATCH v2 16/25] target/riscv: Use explicit little-endian LD/ST API

The Risc-V architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(

Re: [PATCH 06/16] hw/m68k: Use explicit big-endian LD/ST API

Am Fri, 4 Oct 2024 01:42:01 +0200 schrieb Philippe Mathieu-Daudé : > The M68K architecture uses big endianness. Directly use > the big-endian LD/ST API. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/m68k/bootinfo.h | 28 ++-- > hw/m68k/mcf5208.c | 2 +- > hw/

[PATCH v2 25/25] hw/ppc/e500: Use explicit big-endian LD/ST API

The 32-bit PPC architecture uses big endianness. Directly use the big-endian LD/ST API for the E500 hardware. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \

Re: [PATCH v2 17/25] hw/m68k: Use explicit big-endian LD/ST API

On 4/10/24 18:30, Philippe Mathieu-Daudé wrote: The M68K architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st$

[PATCH v2 18/25] target/m68k: Use explicit big-endian LD/ST API

The M68K architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t?

Re: [PATCH 07/16] target/m68k: Use explicit big-endian LD/ST API

Am Fri, 4 Oct 2024 01:42:02 +0200 schrieb Philippe Mathieu-Daudé : > The M68K architecture uses big endianness. Directly use > the big-endian LD/ST API. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/m68k/gdbstub.c | 2 +- > target/m68k/helper.c | 10 +- > 2 files changed,

[PULL 16/23] 9p: remove 'proxy' filesystem backend driver

It has been deprecated since 8.1; remove it and suggest using the 'local' file system backend driver instead or virtiofsd. Acked-by: Greg Kurz Signed-off-by: Paolo Bonzini --- MAINTAINERS|8 - docs/about/deprecated.rst | 22 - docs/about/removed-features.r

[PATCH v2 19/25] hw/sparc: Use explicit big-endian LD/ST API

The SPARC architecture uses big endianness. Directly use the big-endian LD/ST API. for a in uw w l q;do sed -i -e "s/ld${a}_p(/ld${a}_be_p(/" $(git grep -wlE '(ld|st)u?[wlq]_p' hw/sparc/);done Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 42 +--

[PULL 23/23] qom: update object_resolve_path*() documentation

From: Marc-André Lureau - update doc to reflect that @ambiguous is now set true or false on failure - specify that @ambiguous is nullable - use some gtk-doc annotations Signed-off-by: Marc-André Lureau Link: https://lore.kernel.org/r/20241002080806.2868406-4-marcandre.lur...@redhat.com Signed-

[PULL 20/23] target/i386/kvm: Report which action failed in kvm_arch_put/get_registers

From: Julia Suvorova To help debug and triage future failure reports (akin to [1,2]) that may occur during kvm_arch_put/get_registers, the error path of each action is accompanied by unique error message. [1] https://issues.redhat.com/browse/RHEL-7558 [2] https://issues.redhat.com/browse/RHEL-21

[PATCH v2 20/25] target/sparc: Use explicit big-endian LD/ST API

The SPARC architectures use big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t

[PULL 22/23] qom: set *ambiguous on all paths

From: Marc-André Lureau So the caller contract is simpler. Signed-off-by: Marc-André Lureau Link: https://lore.kernel.org/r/20241002080806.2868406-3-marcandre.lur...@redhat.com Signed-off-by: Paolo Bonzini --- qom/object.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/qom/object.c b

[PULL 13/23] hw: Remove unused inclusion of hw/char/serial.h

From: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Signed-off-by: Bernhard Beschow Link: https://lore.kernel.org/r/20240905073832.16222-2-shen...@gmail.com Signed-off-by: Paolo Bonzini --- hw/char/riscv_htif.c | 1 - hw/ppc/prep.c| 1 - hw/riscv/sifive_e.c | 1 - hw/riscv/sifive_u.

[PULL 19/23] kvm: Allow kvm_arch_get/put_registers to accept Error**

From: Julia Suvorova This is necessary to provide discernible error messages to the caller. Signed-off-by: Julia Suvorova Reviewed-by: Peter Xu Link: https://lore.kernel.org/r/20240927104743.218468-2-jus...@redhat.com Signed-off-by: Paolo Bonzini --- include/sysemu/kvm.h | 4 ++-- acc

[PATCH v2 23/25] target/s390x: Use explicit big-endian LD/ST API

The S390X architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t

[PULL 17/23] minikconf: print error entirely on stderr

While debugging an invalid configuration, I noticed that the clauses debug ends up on stderr but the header ("The following clauses were found..." ends up on stdout. This makes the contents of meson-logs/meson-log.txt a bit confusing. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonz

[PATCH v2 22/25] hw/s390x: Use explicit big-endian LD/ST API

The S390X architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t

Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API

On 4/10/24 18:30, Philippe Mathieu-Daudé wrote: For targets (or HW) which are only built for a particular endianness, the generic LD/ST helpers are defined as the target endianness variant. For example, on big-endian targets, stl_p() is equivalent of stl_be_p(). This series replaces in bulk thes

[PATCH v2 24/25] target/openrisc: Use explicit big-endian LD/ST API

The OpenRISC architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|s

[PULL 21/23] qom: rename object_resolve_path_type() "ambiguousp"

From: Marc-André Lureau Make it match the function declaration & documentation. Signed-off-by: Marc-André Lureau Link: https://lore.kernel.org/r/20241002080806.2868406-2-marcandre.lur...@redhat.com Signed-off-by: Paolo Bonzini --- qom/object.c | 10 +- 1 file changed, 5 insertions(+)

[PULL 11/23] kvm: refactor core virtual machine creation into its own function

From: Ani Sinha Refactoring the core logic around KVM_CREATE_VM into its own separate function so that it can be called from other functions in subsequent patches. There is no functional change in this patch. CC: pbonz...@redhat.com CC: zhao1@intel.com Signed-off-by: Ani Sinha Link: https:/

[PATCH v2 21/25] target/hppa: Use explicit big-endian LD/ST API

The HPPA architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t?

[PATCH v2 17/25] hw/m68k: Use explicit big-endian LD/ST API

The M68K architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t?

[PULL 12/23] target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guest

From: Fabiano Rosas According to AMD's Speculative Return Stack Overflow whitepaper (link below), the hypervisor should synthesize the value of IBPB_BRTYPE and SBPB CPUID bits to the guest. Support for this is already present in the kernel with commit e47d86083c66 ("KVM: x86: Add SBPB support")

[PULL 14/23] hw/char/serial.h: Extract serial-isa.h

From: Bernhard Beschow The includes where updated based on compile errors. Now, the inclusion of the header roughly matches Kconfig dependencies: # grep -r -e "select SERIAL_ISA" hw/ppc/Kconfig:select SERIAL_ISA hw/isa/Kconfig:select SERIAL_ISA hw/sparc64/Kconfig:select SERIA

[PULL 09/23] kvm/i386: refactor kvm_arch_init and split it into smaller functions

From: Ani Sinha kvm_arch_init() enables a lot of vm capabilities. Refactor them into separate smaller functions. Energy MSR related operations also moved to its own function. There should be no functional impact. Signed-off-by: Ani Sinha Link: https://lore.kernel.org/r/20240903124143.39345-2-an

[PULL 15/23] hw/char: Extract serial-mm

From: Bernhard Beschow hw/char/serial currently contains the implementation of both TYPE_SERIAL and TYPE_SERIAL_MM. According to serial_class_init(), TYPE_SERIAL is an internal class while TYPE_SERIAL_MM is used by numerous machine types directly. Let's move the latter into its own module which m

[PULL 18/23] accel/kvm: refactor dirty ring setup

From: Ani Sinha Refactor setting up of dirty ring code in kvm_init() so that is can be reused in the future patchsets. Signed-off-by: Ani Sinha Link: https://lore.kernel.org/r/20240912061838.4501-1-anisi...@redhat.com Signed-off-by: Paolo Bonzini --- accel/kvm/kvm-all.c | 88 +

[PULL 10/23] kvm/i386: replace identity_base variable with a constant

identity_base variable is first initialzied to address 0xfffbc000 and then kvm_vm_set_identity_map_addr() overrides this value to address 0xfeffc000. The initial address to which the variable was initialized was never used. Clean everything up, placing 0xfeffc000 in a preprocessor constant. Report

[PULL 06/23] kvm/i386: make kvm_filter_msr() and related definitions private to kvm module

From: Ani Sinha kvm_filer_msr() is only used from i386 kvm module. Make it static so that its easy for developers to understand that its not used anywhere else. Same for QEMURDMSRHandler, QEMUWRMSRHandler and KVMMSRHandlers definitions. CC: phi...@linaro.org Reviewed-by: Philippe Mathieu-Daudé

[PULL 07/23] kvm/i386: fix return values of is_host_cpu_intel()

From: Ani Sinha is_host_cpu_intel() should return TRUE if the host cpu in Intel based, otherwise it should return FALSE. Currently, it returns zero (FALSE) when the host CPU is INTEL and non-zero otherwise. Fix the function so that it agrees more with the semantics. Adjust the calling logic accor

[PULL 04/23] tests/unit: remove block layer code from test-nested-aio-poll

GCC is reporting a NULL pointer dereference when compiling aio_wait_kick() with LTO. The issue is that test-nested-aio-poll.c does not call qemu_init_main_loop(). It doesn't _need_ to because it never calls AIO_WAIT_WHILE(), but it seems that LTO does not do enough dead-code elimination to catch t

[PATCH v2 15/25] target/rx: Use explicit little-endian LD/ST API

The RX architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|s

[PULL 08/23] kvm: replace fprintf with error_report()/printf() in kvm_init()

From: Ani Sinha error_report() is more appropriate for error situations. Replace fprintf with error_report() and error_printf() as appropriate. Some improvement in error reporting also happens as a part of this change. For example: From: $ ./qemu-system-x86_64 --accel kvm Could not access KVM ke

[PULL 03/23] target/i386: Raise the highest index value used for any VMCS encoding

From: Lei Wang Because the index value of the VMCS field encoding of FRED injected-event data (one of the newly added VMCS fields for FRED transitions), 0x52, is larger than any existing index value, raise the highest index value used for any VMCS encoding to 0x52. Because the index value of the

[PULL 00/23] Misc patches for 2024-10-04

The following changes since commit 718780d20470c66a3a36d036b29148d5809dc855: Merge tag 'pull-nvme-20241001' of https://gitlab.com/birkelund/qemu into staging (2024-10-01 11:34:07 +0100) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/for-upstream for you to

[PULL 01/23] target/i386: Delete duplicated macro definition CR4_FRED_MASK

From: "Xin Li (Intel)" Macro CR4_FRED_MASK is defined twice, delete one. Signed-off-by: Xin Li (Intel) Link: https://lore.kernel.org/r/20240807081813.735158-2-...@zytor.com Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/i386/

[PATCH v2 14/25] target/tricore: Use explicit little-endian LD/ST API

The TriCore architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '

[PULL 02/23] target/i386: Add VMX control bits for nested FRED support

From: "Xin Li (Intel)" Add definitions of 1) VM-exit activate secondary controls bit 2) VM-entry load FRED bit which are required to enable nested FRED. Reviewed-by: Zhao Liu Signed-off-by: Xin Li (Intel) Link: https://lore.kernel.org/r/20240807081813.735158-3-...@zytor.com Signed-off-by:

[PATCH v2 06/25] target/alpha: Use explicit little-endian LD/ST API

The Alpha architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(l

[PATCH v2 13/25] target/sh4: Use explicit little-endian LD/ST API

Since commit 73ceb12960e ("Remove the unused sh4eb target") we only build the SH4 architecture for little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \

[PATCH v2 09/25] target/i386: Use explicit little-endian LD/ST API

The x86 architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|

[PATCH v2 11/25] linux-user/i386: Use explicit little-endian LD/ST API

The x86 architecture uses little endianness. Directly use the little-endian LD/ST API. Signed-off-by: Philippe Mathieu-Daudé --- linux-user/i386/signal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index cb90711834f.

[PATCH v2 12/25] target/loongarch: Use explicit little-endian LD/ST API

The LoongArch architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE

[PATCH v2 08/25] hw/i386: Use explicit little-endian LD/ST API

The x86 architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|

[PATCH v2 10/25] target/avr: Use explicit little-endian LD/ST API

The AVR architecture uses little endianness. Directly use the little-endian LD/ST API. Mechanical change using: $ end=le; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|

  1   2   >