Hi Andrew,
> Subject: RE: [PATCH 4/5] hw/gpio/aspeed: Add AST2700 support
>
> Hi Andrew,
>
> > Subject: Re: [PATCH 4/5] hw/gpio/aspeed: Add AST2700 support
> >
> > Hi Jamin,
> >
> > On Mon, 2024-09-23 at 17:42 +0800, Jamin Lin wrote:
> > > AST2700 integrates two set of Parallel GPIO Controller w
From: Klaus Jensen
Add a boolean prop (ctratt.mem) for setting CTRATT.MEM and default it to
unset (false) to keep existing behavior of the device intact.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 7 ++-
hw/nvme/nvme.h | 4
2 files changed, 10 insertions(+), 1 deletion(-)
diff
On Sep 12 10:51, Klaus Jensen wrote:
> On Jul 16 13:23, Arun Kumar wrote:
> > Updated mdts field to only include interleaved metadata if metadata is
> > interleaved and MEM bit is cleared to 0
> >
> > Signed-off-by: Arun Kumar
>
> Thanks!
>
> Reviewed-by: Klaus Jensen
>
Picked up for nvme-ne
On Sep 23 09:56, Klaus Jensen wrote:
> On Sep 6 05:28, Arun Kumar wrote:
> > clear masked events from the aer queue when get log page is issued with
> > rae=0 without checking for the presence of outstanding aer requests
> >
> > Signed-off-by: Arun Kumar
> > ---
>
> Hi Arun,
>
> Thanks, LGTM.
On Sep 20 05:51, Arun Kumar wrote:
> add support for i/o command set independent namespace data
> structure(cns=8h and cns=1fh)
>
> Signed-off-by: Klaus Jensen
> Signed-off-by: Arun Kumar
> ---
> hw/nvme/ctrl.c | 37 +
> hw/nvme/trace-events | 1 +
> i
On Sep 23 11:56, Ayush Mishra wrote:
> Adding support for new 32 bit NPDGL and NPDAL fields to address the
> needs of larger granularities.
>
> Signed-off-by: Ayush Mishra
> ---
> hw/nvme/ns.c | 5 -
> include/block/nvme.h | 7 ++-
> 2 files changed, 10 insertions(+), 2 deletions
Hi,
I have a small update.
On Monday, September 16, 2024 10:04:28 AM GMT+5:30 Sahil wrote:
> On Thursday, September 12, 2024 3:24:27 PM GMT+5:30 Eugenio Perez Martin
> wrote:
> [...]
> > The function that gets the features from vhost-vdpa in QEMU is
> > hw/virtio/vhost-vdpa.c:vhost_vdpa_get_feat
Adding support for new 32 bit NPDGL and NPDAL fields to address the
needs of larger granularities.
Signed-off-by: Ayush Mishra
---
hw/nvme/ns.c | 5 -
include/block/nvme.h | 7 ++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c
index e
Hi Andrew,
> Subject: Re: [PATCH 4/5] hw/gpio/aspeed: Add AST2700 support
>
> Hi Jamin,
>
> On Mon, 2024-09-23 at 17:42 +0800, Jamin Lin wrote:
> > AST2700 integrates two set of Parallel GPIO Controller with maximum
> > 212 control pins, which are 27 groups.
> > (H, exclude pin: H7 H6 H5 H4)
> >
ping
于2024年9月15日周日 22:53写道:
>
> From: Jinliang Zheng
>
> Currently, object_initialize_with_type() calls
> object_class_property_init_all()
> before initializing Object->properties. This may cause Object->properties to
> still be NULL when we call object_property_add() on Object.
>
> For exmaple
On Tue, Sep 17, 2024 at 1:54 AM Ajeet Singh wrote:
>
> Key Changes Compared to Version 6:
> Included "signal-common.h" in target_arch_cpu.h
>
> Mark Corbin (15):
> bsd-user: Implement RISC-V CPU initialization and main loop
> bsd-user: Add RISC-V CPU execution loop and syscall handling
> bsd
Hi Tiezhu,
Does mainline gdb support to dump LBT register now?
Regards
Bibo Mao
On 2024/9/23 下午9:02, gaosong wrote:
在 2024/9/10 上午10:24, maobibo 写道:
On 2024/9/9 下午9:13, gaosong wrote:
在 2024/9/9 下午7:52, gaosong 写道:
在 2024/9/4 下午2:18, Bibo Mao 写道:
Six registers scr0 - scr3, eflags and ft
As shown below, if a virtio PCI device is attached under a pci-bridge, the MR
of VirtIOPCIRegion does not belong to any address space. So memory_region_find
cannot be used to search for this MR.
Introduce the virtio-pci and pci_bridge_pci address spaces to solve this
problem.
Before:
memory-regi
Hi Jamin,
On Mon, 2024-09-23 at 17:42 +0800, Jamin Lin wrote:
> AST2700 integrates two set of Parallel GPIO Controller
> with maximum 212 control pins, which are 27 groups.
> (H, exclude pin: H7 H6 H5 H4)
>
> In the previous design of ASPEED SOCs,
> one register is used for setting one function f
Am 23. September 2024 10:49:53 UTC schrieb BALATON Zoltan :
>On Mon, 23 Sep 2024, Bernhard Beschow wrote:
>> Signed-off-by: Bernhard Beschow
>> ---
>> hw/i2c/mpc_i2c.c | 20
>> 1 file changed, 8 insertions(+), 12 deletions(-)
>>
>> diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc
Am 23. September 2024 10:43:19 UTC schrieb BALATON Zoltan :
>On Mon, 23 Sep 2024, Bernhard Beschow wrote:
>> Populate this read-only register with some arbitrary values which avoids
>> U-Boot's get_clocks() to hang().
>
>Maybe this should be a property settable by the machine as each board may h
Am 23. September 2024 20:23:54 UTC schrieb "Cédric Le Goater" :
>Hello Bernhard,
Hi Cédric,
>
>On 9/23/24 11:29, Bernhard Beschow wrote:
>> This series is part of a bigger series exploring data-driven machine creation
>> using device tree blobs on top of the e500 machines [1]. It contains pat
Hello Bernhard,
On 9/23/24 11:29, Bernhard Beschow wrote:
This series is part of a bigger series exploring data-driven machine creation
using device tree blobs on top of the e500 machines [1]. It contains patches to
make this exploration easier which are also expected to provide value in
themsel
This commit adds support for the `openat2()` to `QEMU_STRACE`. It
will use the `openat2.h` header if available to create user
readable flags for the `resolve` argument but does not require
the header otherwise.
It also makes `copy_struct_from_user()` available via `qemu.h`
and `open_how_ver0` via
This commit adds support for the `openat2()` syscall in the
`linux-user` userspace emulator.
It is implemented by extracting a new helper `maybe_do_fake_open()`
out of the exiting `do_guest_openat()` and share that with the
new `do_guest_openat2()`. Unfortunately we cannot just make
do_guest_opena
This is v7 of the openat2 support in linux-user. Thanks for the
excellent feedback from Richard on v6, really appreciated.
This version addresses the feedback for v6. The fix for the LTP
failure requires to pass the "resolve" flags to maybe_do_fake_open()
and check for RESOLVE_NO_{MAGIC,SYM}LINKS
nd and documentation in -h output.
- Link to v1:
https://lore.kernel.org/r/20240923-feature-build-info-cli-v1-1-e8c42d845...@linaro.org
---
Notes:
Sample output:
$ ./qemu-system-aarch64 -build-info
./qemu-system-aarch64 version 9.1.50 (v9.0.0-3444-g8d988656d8) bu
On Mon, 2024-09-23 at 22:36 +0800, jie ren wrote:
> Hi, I have a question for help
> I recently Using ubuntu24.4 system qemu-system-aarch64 +gdb-
> multiarch to debug the kernel, setting breakpoints cannot be stopped.
> system information:
> ubuntu version: 22.04
> Debug ker
On Mon, Sep 23, 2024 at 06:38:27PM +0200, Daniel P. Berrangé wrote:
> On Mon, Sep 23, 2024 at 11:03:08AM -0500, Eric Blake wrote:
> > On Sun, Sep 22, 2024 at 08:51:22PM GMT, Richard W.M. Jones wrote:
> > > On Thu, Mar 28, 2024 at 02:13:42PM +, Richard W.M. Jones wrote:
> > > > On Thu, Mar 28, 2
On Mon, Sep 23, 2024 at 01:33:13AM +, Yuchen wrote:
>
>
> > -邮件原件-
> > 发件人: Peter Xu
> > 发送时间: 2024年9月20日 23:53
> > 收件人: yuchen (CCSPL)
> > 抄送: faro...@suse.de; qemu-devel@nongnu.org
> > 主题: Re: [PATCH] migration/multifd: receive channel socket needs to be set to
> > non-blocking
>
ff-by: Manos Pitsidianakis
---
Changes in v2:
- Fixed alignment of command and documentation in -h output.
- Link to v1:
https://lore.kernel.org/r/20240923-feature-build-info-cli-v1-1-e8c42d845...@linaro.org
---
Notes:
Sample output:
$ ./qemu-system-aarch64 -build-info
./qemu-system-aarch64 ve
should
aim to close those gaps.
IOW, I don't think we should expose this build info info in either
human readable or machine readable format.
>
> Signed-off-by: Manos Pitsidianakis
> ---
> Changes in v2:
> - Fixed alignment of command and documentation in -h output
On Mon, Sep 23, 2024 at 11:03:08AM -0500, Eric Blake wrote:
> On Sun, Sep 22, 2024 at 08:51:22PM GMT, Richard W.M. Jones wrote:
> > On Thu, Mar 28, 2024 at 02:13:42PM +, Richard W.M. Jones wrote:
> > > On Thu, Mar 28, 2024 at 03:06:03PM +0100, Thomas Huth wrote:
> > > > Since version 2.66, glib
On Mon, 2024-09-23 at 18:12 +0200, Ilya Leoshkevich wrote:
> Hi,
>
> On reporting a breakpoint in a non-non-stop mode, GDB remotes must
> stop
> all threads. Currently qemu-user doesn't do that, breaking the
> debugging session for at least two reasons: concurrent access to the
> GDB socket, and a
Stopped CPUs are parked until cpu_thread_is_idle() is true, so
implement it for qemu-user. Share a part of the qemu-system's
implementation.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec.c | 12
cpu-common.c | 19 +++
include/exec/cpu-commo
linux-user and bsd-user have the same implementation.
Move it to user-exec.c.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec.c | 5 +
bsd-user/main.c | 5 -
linux-user/main.c | 5 -
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/accel/tcg/user-exec
Move checking and setting allow_stop_reply into a function.
Signed-off-by: Ilya Leoshkevich
---
gdbstub/gdbstub.c | 15 +++
gdbstub/internals.h | 2 ++
gdbstub/system.c| 6 ++
gdbstub/user.c | 11 ---
4 files changed, 19 insertions(+), 15 deletions(-)
diff -
Move the respective functions from sysemu to cpu-common.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec-stub.c | 4 --
accel/tcg/user-exec.c | 11 +++-
cpu-common.c | 115 +
include/exec/cpu-common.h | 7 +++
include/sysemu/cp
Currently BQL is stubbed out in qemu-user. However, enabling the
ability to pause and resume CPUs requires BQL, so introduce it.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec.c | 2 ++
bsd-user/freebsd/os-syscall.c | 6
bsd-user/main.c | 2 ++
cpu-common.c
This is required by the GDB remote protocol.
Signed-off-by: Ilya Leoshkevich
---
gdbstub/gdbstub.c | 2 ++
gdbstub/user.c| 10 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index a096104b07a..be632f8b214 100644
--- a/gdbstub/
Add a test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/multiarch/Makefile.target | 13 ++-
.../gdbstub/test-thread-breakpoint-stress.py | 28 ++
.../tcg/multiarch/thread-breakpoint-stress.c | 92 +++
3 files changed, 132 insertions(+), 1
Follow the convention that all the pieces of the global stub state must
be inside a single struct.
Signed-off-by: Ilya Leoshkevich
---
gdbstub/syscalls.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/gdbstub/syscalls.c b/gdbstub/syscalls.c
index 4e129
Hi,
On reporting a breakpoint in a non-non-stop mode, GDB remotes must stop
all threads. Currently qemu-user doesn't do that, breaking the
debugging session for at least two reasons: concurrent access to the
GDB socket, and an assertion within GDB [1].
This series fixes this by importing pause_al
Allow static initialization of condition variables.
Signed-off-by: Ilya Leoshkevich
---
include/qemu/thread-posix.h | 2 ++
include/qemu/thread-win32.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/qemu/thread-posix.h b/include/qemu/thread-posix.h
index fc0846bfa7c..ed08181a9c6
All linux-user cpu_loop() implementations contain the same sequence
of function calls. Factor them out so that they can be changed in one
place.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec.c | 12
bsd-user/aarch64/target_arch_cpu.h | 6 +-
bsd-user/arm/
qemu_plugin_get_registers() may be called before cpu_exec(), and it
requires current_cpu.
Signed-off-by: Ilya Leoshkevich
---
bsd-user/main.c | 1 +
linux-user/main.c| 1 +
linux-user/syscall.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index
Allow static initialization of mutexes.
Signed-off-by: Ilya Leoshkevich
---
include/qemu/thread-posix.h | 6 ++
include/qemu/thread-win32.h | 6 ++
2 files changed, 12 insertions(+)
diff --git a/include/qemu/thread-posix.h b/include/qemu/thread-posix.h
index 5f2f3d1386b..fc0846bfa7c 100
Sharing pause_all_vcpus() with qemu-user requires providing no-op
definitions of replay mutex functions. Make these functions available
via replay-core.h and move the existing stubs to a separate file.
Signed-off-by: Ilya Leoshkevich
---
include/exec/replay-core.h | 13 +
include/sys
Sharing pause_all_vcpus() with qemu-user requires a no-op
implementation of qemu_clock_enable().
Signed-off-by: Ilya Leoshkevich
---
stubs/meson.build | 4
stubs/qemu-timer.c | 6 ++
2 files changed, 10 insertions(+)
create mode 100644 stubs/qemu-timer.c
diff --git a/stubs/meson.buil
A qemu-system CPU is considered paused as a result of an external
request. A qemu-user CPU, in addition to that, should be considered
paused when it's executing a syscall.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec.c | 5 +
include/exec/cpu-common.h | 1 +
system/cpus.c
It's user-only since commit a7e0f9bd2ace ("gdbstub: abstract target
specific details from gdb_put_packet_binary").
Signed-off-by: Ilya Leoshkevich
---
gdbstub/internals.h | 2 --
gdbstub/user.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/gdbstub/internals.h b/gdbst
Follow the convention that all the pieces of the global stub state must
be inside a single struct.
Signed-off-by: Ilya Leoshkevich
---
gdbstub/system.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/gdbstub/system.c b/gdbstub/system.c
index 1ad87fe7fdf..5ce357c6
CPUs that execute syscalls should be considered paused by
all_vcpus_paused(). Lay the groundwork by introducing a bool field in
CPUState to track this. The field is not used by sysemu, but it's only
one byte, so it should not be a problem.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/user-exec.
Ping!
On Wed, Aug 14, 2024 at 01:15:55PM -0500, Eric Blake wrote:
> On Mon, Aug 12, 2024 at 04:43:23PM GMT, Edgar E. Iglesias wrote:
> > From: "Edgar E. Iglesias"
> >
> > Avoid a maybe-uninitialized warning in raw_refresh_zoned_limits()
> > by initializing zoned.
> >
> > With GCC 14.1.0:
> > In
On Sun, Sep 22, 2024 at 08:51:22PM GMT, Richard W.M. Jones wrote:
> On Thu, Mar 28, 2024 at 02:13:42PM +, Richard W.M. Jones wrote:
> > On Thu, Mar 28, 2024 at 03:06:03PM +0100, Thomas Huth wrote:
> > > Since version 2.66, glib has useful URI parsing functions, too.
> > > Use those instead of t
On Tue, Sep 17, 2024 at 09:03:09AM +, Anthony PERARD wrote:
> On Tue, Sep 17, 2024 at 01:22:12AM +0100, d...@treblig.org wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > xen_be_copy_grant_refs is unused since 2019's
> > 19f87870ba ("xen: remove the legacy 'xen_disk' backend")
> >
> > xen_
On 23/09/2024 11.19, David Hildenbrand wrote:
On 10.09.24 19:57, David Hildenbrand wrote:
KVM is not happy when starting a VM with weird RAM sizes:
# qemu-system-s390x --enable-kvm --nographic -m 1234K
qemu-system-s390x: kvm_set_user_memory_region: KVM_SET_USER_MEMORY_REGION
failed,
On 23.09.24 17:36, Thomas Huth wrote:
On 23/09/2024 11.19, David Hildenbrand wrote:
On 10.09.24 19:57, David Hildenbrand wrote:
KVM is not happy when starting a VM with weird RAM sizes:
# qemu-system-s390x --enable-kvm --nographic -m 1234K
qemu-system-s390x: kvm_set_user_memory_region:
Hi, I have a question for help
I recently Using ubuntu24.4 system qemu-system-aarch64 +gdb-multiarch
to debug the kernel, setting breakpoints cannot be stopped.
system information:
ubuntu version: 22.04
Debug kernel version: 5.0.0
qemu version:
· qemu-system-a
From: "Edgar E. Iglesias"
Acked-by: Stefano Stabellini
Signed-off-by: Edgar E. Iglesias
---
hw/xen/xen-pvh-common.c | 36
1 file changed, 36 insertions(+)
diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c
index 76a9b2b945..218ac851cf 100644
--
From: "Edgar E. Iglesias"
Add a way to enable/disable buffered IOREQs for PVH machines
and disable them for ARM. ARM does not support buffered
IOREQ's nor the legacy way to map IOREQ info pages.
See the following for more details:
https://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=2fbd7e60
From: "Edgar E. Iglesias"
Enable PCI support for the ARM Xen PVH machine.
Reviewed-by: Stefano Stabellini
Signed-off-by: Edgar E. Iglesias
---
hw/arm/xen-pvh.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c
index 28af3910ea..33f0dd5982
From: "Edgar E. Iglesias"
Enable PCI on the ARM PVH machine. First we add a way to control the use
of buffered IOREQ's since those are not supported on Xen/ARM.
Finally we enable the PCI support.
I've published some instructions on how to try this including the work in
progress Xen side of the P
From: "Edgar E. Iglesias"
Expose handle_bufioreq in xen_register_ioreq().
This is to allow machines to enable or disable buffered ioreqs.
No functional change since all callers still set it to
HVM_IOREQSRV_BUFIOREQ_ATOMIC.
Signed-off-by: Edgar E. Iglesias
---
hw/i386/xen/xen-hvm.c |
在2024年9月23日九月 下午1:34,gaosong写道:
> 在 2024/9/14 下午8:10, Jiaxun Yang 写道:
>> Hi all,
>>
>> This series refactored booting protocol generation code
>> to better accommodate different host ABI / Alignment and
>> endianess.
>>
>> It also enhanced LoongArch32 support.
> Hi,
>
> I tested LoongArch64 and
On Mon, Sep 23, 2024 at 15:48 Damien Le Moal wrote:
> On 2024/09/23 15:40, Sam Li wrote:
> > Hi Damien,
> >
> > Damien Le Moal 于2024年9月23日周一 15:22写道:
> >>
> >> On 2024/09/23 13:06, Sam Li wrote:
> >>
> >> [...]
> >>
> > @@ -2837,6 +3180,19 @@ qcow2_co_pwritev_part(BlockDriverState *bs,
> int
On 2024/09/23 15:40, Sam Li wrote:
> Hi Damien,
>
> Damien Le Moal 于2024年9月23日周一 15:22写道:
>>
>> On 2024/09/23 13:06, Sam Li wrote:
>>
>> [...]
>>
> @@ -2837,6 +3180,19 @@ qcow2_co_pwritev_part(BlockDriverState *bs,
> int64_t offset, int64_t bytes,
> qiov_offset += cur_bytes;
Hi Damien,
Damien Le Moal 于2024年9月23日周一 15:22写道:
>
> On 2024/09/23 13:06, Sam Li wrote:
>
> [...]
>
> >>> @@ -2837,6 +3180,19 @@ qcow2_co_pwritev_part(BlockDriverState *bs,
> >>> int64_t offset, int64_t bytes,
> >>> qiov_offset += cur_bytes;
> >>> trace_qcow2_writev_done_part(q
On 2024/09/23 13:06, Sam Li wrote:
[...]
>>> @@ -2837,6 +3180,19 @@ qcow2_co_pwritev_part(BlockDriverState *bs, int64_t
>>> offset, int64_t bytes,
>>> qiov_offset += cur_bytes;
>>> trace_qcow2_writev_done_part(qemu_coroutine_self(), cur_bytes);
>>> }
>>> +
>>> +if (bs-
在 2024/9/10 上午10:24, maobibo 写道:
On 2024/9/9 下午9:13, gaosong wrote:
在 2024/9/9 下午7:52, gaosong 写道:
在 2024/9/4 下午2:18, Bibo Mao 写道:
Six registers scr0 - scr3, eflags and ftop are added in percpu
vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are
added
to save/resto
在 2024/9/18 下午4:23, Bibo Mao 写道:
Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type
variable pmu to check the PMU feature. If the PMU Feature is not supported
with KVM host, it reports error if there is pmu=on command line.
If there is no any command line about pmu parameter, it
在 2024/9/14 下午8:10, Jiaxun Yang 写道:
Hi all,
This series refactored booting protocol generation code
to better accommodate different host ABI / Alignment and
endianess.
It also enhanced LoongArch32 support.
Hi,
I tested LoongArch64 and it works well.
But how to test LoongArch32? Could you pro
On 9/21/2024 1:56 AM, Alejandro Jimenez wrote:
> In subject:
> s/invaldate/invalidate/
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> From: Suravee Suthikulpanit
>>
>> In order to support AMD IOMMU interrupt remapping emulation with PCI
>> pass-through devices, QEMU needs to notify VFIO when g
Hi Alejandro,
On 9/21/2024 2:09 AM, Alejandro Jimenez wrote:
> Hi Santosh,
>
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> Series adds following feature support for emulated amd vIOMMU
>> 1) Pass Through(PT) mode
>> 2) Interrupt Remapping(IR) mode
>>
>> 1) PT mode
>> Introducing the shared 'nod
On 9/21/2024 1:56 AM, Alejandro Jimenez wrote:
>
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> From: Suravee Suthikulpanit
>>
>> The XTSup mode enables x2APIC support for AMD IOMMU, which is needed
>> to support vcpu w/ APIC ID > 255.
>>
>> Signed-off-by: Suravee Suthikulpanit
>> Signed-off
On Mon, Sep 23, 2024, at 09:22, Ard Biesheuvel wrote:
> From: Ard Biesheuvel
>
> target_ulong is typedef'ed as a 32-bit integer when building the
> qemu-system-arm target, and this is smaller than the size of an
> intermediate physical address when LPAE is being used.
>
> Given that Linux may plac
On Sat, Sep 21, 2024 at 6:43 PM Nikita Shushura wrote:
>
> Signed-off-by: Nikita Shushura
Mostly OK just a few comments.
> ---
> hw/sparc/leon3.c | 63 +++-
> 1 file changed, 46 insertions(+), 17 deletions(-)
>
> diff --git a/hw/sparc/leon3.c b/hw/sp
On Sat, Sep 21, 2024 at 6:43 PM Nikita Shushura wrote:
>
> Signed-off-by: Nikita Shushura
Additionally to inlined comments:
- there are a few "extended (not supported)" you can now remove.
- I think the extended part in "grlib_irqmp_write" is still wrong,
the extended register being read-only.
在2024年9月19日九月 下午12:31,Jiaxun Yang写道:
> 在2024年9月14日九月 下午1:10,Jiaxun Yang写道:
>> Hi all,
>>
>> This series refactored booting protocol generation code
>> to better accommodate different host ABI / Alignment and
>> endianess.
>
> + Bibo,
>
> Ping for review.
Ping?
Thanks
--
- Jiaxun
Hi Stefan,
I apologized for the late reply.
Stefan Hajnoczi 于2024年3月12日周二 20:02写道:
>
> On Mon, Jan 22, 2024 at 07:48:29PM +0100, Sam Li wrote:
> > By adding zone operations and zoned metadata, the zoned emulation
> > capability enables full emulation support of zoned device using
> > a qcow2 fil
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
---
hw/i2c/mpc_i2c.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c
index 3d79c15653..16f4309ea9 100644
--- a/hw/i2c/mpc_i2c.c
+++ b/hw/i2c/m
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
Prefer a macro rather than a string literal when instantiaging device models.
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
---
hw/pci-host/ppce500.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/pp
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
Populate this read-only register with some arbitrary values which avoids
U-Boot's get_clocks() to hang().
Maybe this should be a property settable by the machine as each board may
have different values and it may need to use the correct value for th
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
The device model already has a header file. Also extract its implementation into
an accompanying source file like other e500 devices.
This commit is also a preparation for the next commit.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS |
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
Rather than accessing the attributes of TYPE_CCSR directly, use the SysBusDevice
API which exists exactly for that purpose. Furthermore, registering the memory
region with the SysBusDevice API makes it show up in QMP's `info qom-tree`
command.
Signed-
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
---
hw/ppc/e500.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 32996c188e..228287b457 100644
--- a/hw/ppc/e500.c
+++ b/hw/pp
The ppce500 machine provides a device tree node whose compatible property is
"gpio-poweroff". This matches TYPE_GPIO_POWEROFF like used in the ARM virt
machine, so reuse it.
Signed-off-by: Bernhard Beschow
---
hw/ppc/e500.c | 15 +++
hw/ppc/Kconfig | 1 +
2 files changed, 4 inserti
The device is only used in the ARM virt machine and designed to be used on top
of pl061 for use cases such as ARM Trusted Firmware. Add it to the same section
as hw/gpio/pl061.c.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAI
This series is part of a bigger series exploring data-driven machine creation
using device tree blobs on top of the e500 machines [1]. The idea is to
instantiate a QEMU device model for each device tree node containing a
compatible property. [1] achieves feature-parity with the hardcoded machines
w
Take inspiration from Linux which has separate device tree bindings for the two
GPIO lines. The naming of the two device models matches Linux' compatible
properties.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS | 3 +-
hw/arm/virt.c | 32 +--
hw/gpio/gpi
On 9/23/24 06:46, LIU Zhiwei wrote:
On 2024/9/22 12:46, Richard Henderson wrote:
On 9/11/24 15:26, LIU Zhiwei wrote:
@@ -2129,6 +2389,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
static void tcg_out_tb_start(TCGContext *s)
{
+ s->riscv_cur_type = TCG_TYPE_COUNT;
/* n
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
---
hw/ppc/e500.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index f68779a1ea..32996c188e 100644
--- a/hw/ppc/e500.c
+++ b/hw/pp
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
The env pointer isn't used outside the for loop, so move it inside. After that,
the firstenv pointer is never read, so remove it.
It's probably the other way arouns, you remove firstenv (which is the
bigger part of this patch) then it's clear env is
On 9/23/24 11:22, Ard Biesheuvel wrote:
From: Ard Biesheuvel
target_ulong is typedef'ed as a 32-bit integer when building the
qemu-system-arm target, and this is smaller than the size of an
intermediate physical address when LPAE is being used.
Given that Linux may place leaf level user page ta
On Mon, 23 Sep 2024, Bernhard Beschow wrote:
The struct is allocated once with g_new0() but never free()'d. Fix the leakage
by adding an attribute to struct PPCE500MachineState which avoids the
allocation.
Signed-off-by: Bernhard Beschow
---
hw/ppc/e500.h | 8
hw/ppc/e500.c | 17 --
Hi Cedric,
> Subject: RE: [SPAM] [PATCH v3 00/11] support I2C for AST2700
>
> Hi Cedric,
>
> > Subject: Re: [SPAM] [PATCH v3 00/11] support I2C for AST2700
> >
> > Hello Jamin,
> >
> > > Just want you to know that I and Troy are working on the following
> > > tasks for
> > AST2700.
> > > 1. Supp
Add GPIO model for AST2700 GPIO support.
The GPIO controller registers base address is start at
0x14C0_B000 and its address space is 0x1000.
The AST2700 GPIO controller interrupt is connected to
GICINT130_INTC at bit 18.
Signed-off-by: Jamin Lin
---
hw/arm/aspeed_ast27x0.c | 18 +++-
Fix coding style issues from checkpatch.pl
Signed-off-by: Jamin Lin
---
hw/gpio/aspeed_gpio.c | 3 ++-
include/hw/gpio/aspeed_gpio.h | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index 71756664dd..901b576144 100644
--
v1: support GPIO for AST2700
Jamin Lin (5):
hw/gpio/aspeed: Fix coding style
hw/gpio/aspeed: Support to set the different memory size
hw/gpio/aspeed: Support different memory region ops
hw/gpio/aspeed: Add AST2700 support
aspeed/soc: Support GPIO for AST2700
hw/arm/aspeed_ast27x0.c
It set "aspeed_gpio_ops" struct which containing
read and write callbacks to be used when I/O is performed
on the GPIO region.
Besides, in the previous design of ASPEED SOCs,
one register is used for setting one function for 32 GPIO pins.
ex: GPIO000 is used for setting data value for GPIO A, B, C
AST2700 integrates two set of Parallel GPIO Controller
with maximum 212 control pins, which are 27 groups.
(H, exclude pin: H7 H6 H5 H4)
In the previous design of ASPEED SOCs,
one register is used for setting one function for one set which are 32 pins
and 4 groups.
ex: GPIO000 is used for setting
According to the datasheet of ASPEED SOCs,
a GPIO controller owns 4KB of register space for AST2700,
AST2500, AST2400 and AST1030; owns 2KB of register space
for AST2600 1.8v and owns 2KB of register space for AST2600 3.3v.
It set the memory region size 2KB by default and it does not compatible
re
Populate this read-only register with some arbitrary values which avoids
U-Boot's get_clocks() to hang().
Signed-off-by: Bernhard Beschow
---
hw/ppc/mpc8544_guts.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
index e3540b0281..66
Signed-off-by: Bernhard Beschow
---
hw/i2c/mpc_i2c.c| 9 +
hw/i2c/trace-events | 5 +
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c
index 2467d1a9aa..3d79c15653 100644
--- a/hw/i2c/mpc_i2c.c
+++ b/hw/i2c/mpc_i2c.c
@@ -24,6 +24,
Signed-off-by: Bernhard Beschow
---
hw/gpio/mpc8xxx.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/hw/gpio/mpc8xxx.c b/hw/gpio/mpc8xxx.c
index 63b7a5c881..de183c3be5 100644
--- a/hw/gpio/mpc8xxx.c
+++ b/hw/gpio/mpc8xxx.c
@@ -23,7 +23,6 @@
#include "
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