//gitlab.com/npiggin/qemu.git tags/pull-ppc-for-9.1-2-20240726-1
for you to fetch changes up to d741ecffd2ca260ce7875a4596f17736b5ccb7c3:
target/ppc: Remove includes from mmu-book3s-v3.h (2024-07-26 09:51:34 +1000)
* Fixes for ps
> From: Manos Pitsidianakis
>
> When setting the parameters of a PCM stream, we compute the bit flag
> with the format and rate values as shift operand to check if they are
> set in supported_formats and supported_rates.
>
> If the guest provides a format/rate value which when shifting 1 results
>
Collin Walling writes:
> The @deprecated-props array did not make any sense to be a member of the
> CpuModelInfo struct, since this field would only be populated by a
> query-cpu-model-expansion response and ignored otherwise.
Doesn't query-cpu-model-baseline also return it in its response? It
On 2024/7/25 20:50, Dr. David Alan Gilbert wrote:
* Daniel P. Berrang� (berra...@redhat.com) wrote:
On Thu, Jul 25, 2024 at 01:35:21PM +0200, Markus Armbruster wrote:
Guoyi Tu writes:
In the test environment, we conducted IO stress tests on all storage disks
within a virtual machine that h
On 2024/7/25 19:57, Daniel P. Berrangé wrote:
On Thu, Jul 25, 2024 at 01:35:21PM +0200, Markus Armbruster wrote:
Guoyi Tu writes:
In the test environment, we conducted IO stress tests on all storage disks
within a virtual machine that had five storage devices mounted.During
testing,
we found
The function of riscv_cpu_claim_interrupts() was introduced in commit
e3e7039 ("RISC-V: Allow interrupt controllers to claim interrupts") to
enforce hardware controlled of SEIP signal when there is an attached
external interrupt controller.
In later RISC-V privileged specification version 1.10, SE
On 2024/7/25 19:35, Markus Armbruster wrote:
Guoyi Tu writes:
In the test environment, we conducted IO stress tests on all storage disks
within a virtual machine that had five storage devices mounted.During
testing,
we found that the qemu process allocated a large amount of memory (~800MB)
to
On Thu, Jul 25, 2024 at 10:12 PM Alistair Francis wrote:
>
> On Wed, Jul 24, 2024 at 6:33 PM Atish Patra wrote:
> >
> > Coverity complained about the possible out-of-bounds access with
> > counter_virt/counter_virt_prev because these two arrays are
> > accessed with privilege mode. However, these
On Fri, Jul 26, 2024 at 12:42 AM Alistair Francis wrote:
>
> On Wed, Jul 24, 2024 at 9:31 AM Atish Patra wrote:
> >
> > From: Kaiwen Xue
> >
> > This adds the properties for sxcsrind. Definitions of new registers and
> > implementations will come with future patches.
> >
> > Signed-off-by: Atish
On Thu, Jul 25, 2024 at 10:12 PM Alistair Francis wrote:
>
> On Wed, Jul 24, 2024 at 6:33 PM Atish Patra wrote:
> >
> > Coverity complained about the possible out-of-bounds access with
> > counter_virt/counter_virt_prev because these two arrays are
> > accessed with privilege mode. However, these
On 7/26/24 5:16 PM, David Hildenbrand wrote:
> On 26.07.24 22:36, Collin Walling wrote:
>> The @deprecated-props array did not make any sense to be a member of the
>> CpuModelInfo struct, since this field would only be populated by a
>> query-cpu-model-expansion response and ignored otherwise. Move
Hi guys,
My name is Sergey. My company uses QEMU for CPU
performance simulation/evaluaton.
Sorry, I found your emails in QEMU relatively recent commits into ram.c
. Why ram.c . Because I see some weirdness in the behavior.
Our goal is :
a) To boot Linux , to launch some TEST/SPEC,
On 26.07.24 22:36, Collin Walling wrote:
The @deprecated-props array did not make any sense to be a member of the
CpuModelInfo struct, since this field would only be populated by a
query-cpu-model-expansion response and ignored otherwise. Move this
field to the CpuModelExpansionInfo struct where
On Fri, Jul 26, 2024 at 07:39:46PM +0200, Thomas Huth wrote:
> On 26/07/2024 09.25, Michael S. Tsirkin wrote:
> > On Fri, Jul 26, 2024 at 09:03:24AM +0200, Thomas Huth wrote:
> > > On 26/07/2024 08.08, Michael S. Tsirkin wrote:
> > > > On Thu, Jul 25, 2024 at 06:18:20PM -0400, Peter Xu wrote:
> > >
On Fri, Jul 26, 2024 at 04:17:12PM +0100, Daniel P. Berrangé wrote:
> On Fri, Jul 26, 2024 at 10:43:42AM -0400, Peter Xu wrote:
> > On Fri, Jul 26, 2024 at 09:48:02AM +0100, Daniel P. Berrangé wrote:
> > > On Fri, Jul 26, 2024 at 09:03:24AM +0200, Thomas Huth wrote:
> > > > On 26/07/2024 08.08, Mic
The @deprecated-props array did not make any sense to be a member of the
CpuModelInfo struct, since this field would only be populated by a
query-cpu-model-expansion response and ignored otherwise. Move this
field to the CpuModelExpansionInfo struct where is makes more sense.
References:
- https:
On 7/26/24 4:03 PM, David Hildenbrand wrote:
> On 26.07.24 22:00, Collin Walling wrote:
>> On 7/26/24 3:57 PM, David Hildenbrand wrote:
>>> On 25.07.24 20:39, Collin Walling wrote:
Currently, there is no way to execute the query-cpu-model-expansion
command to retrieve a comprehenisve list
Hi Richard,
Thank you for the feedback.
On 7/23/24 11:33 PM, Richard Henderson wrote:
On 7/23/24 11:05, Don Porter wrote:
+ if (env->hflags & HF_GUEST_MASK) {
+
+ /* Extract the EPTP value from vmcs12 structure, store in
arch state */
+ if (env->nested_state->format == KVM
On 26.07.24 22:00, Collin Walling wrote:
On 7/26/24 3:57 PM, David Hildenbrand wrote:
On 25.07.24 20:39, Collin Walling wrote:
Currently, there is no way to execute the query-cpu-model-expansion
command to retrieve a comprehenisve list of deprecated properties, as
the result is dependent per-mo
On 7/26/24 3:57 PM, David Hildenbrand wrote:
> On 25.07.24 20:39, Collin Walling wrote:
>> Currently, there is no way to execute the query-cpu-model-expansion
>> command to retrieve a comprehenisve list of deprecated properties, as
>> the result is dependent per-model. To enable this, the expansion
On 25.07.24 20:39, Collin Walling wrote:
Currently, there is no way to execute the query-cpu-model-expansion
command to retrieve a comprehenisve list of deprecated properties, as
the result is dependent per-model. To enable this, the expansion output
is modified as such:
When reporting a "static
On 26.07.24 21:11, Collin Walling wrote:
On 7/26/24 3:15 AM, Markus Armbruster wrote:
Collin Walling writes:
On 7/25/24 3:39 AM, David Hildenbrand wrote:
On 25.07.24 09:35, Markus Armbruster wrote:
Markus Armbruster writes:
[...]
Arguments that are silently ignored is bad interface des
On 7/26/24 3:15 AM, Markus Armbruster wrote:
> Collin Walling writes:
>
>> On 7/25/24 3:39 AM, David Hildenbrand wrote:
>>> On 25.07.24 09:35, Markus Armbruster wrote:
Markus Armbruster writes:
>
> [...]
>
> Arguments that are silently ignored is bad interface design.
>
> Obse
OpenSBI has support for domains, which are partitions of CPUs and memory into
isolated compartments. Domains can be specified in the device tree according to
a standardized format [1], which OpenSBI parses at boot time to initialize all
system domains. This patch enables simply specifying domains (
v2:
- Addressed review comments from v1. Specifically, renamed domain.{c,h} ->
opensbi_domain.{c,h} to increase clarity of what these files do. Also, more
consistently use g_autofree for dynamically allocated variables
- Added an "assign" flag to OpenSBIDomainState, which indicates whether to
Hi Daniel,
Oops! Sorry about the build failure - slightly embarrassing on my part!
> +RISC-V OpenSBI domain support
> > +M: Gregor Haas
> > +L: qemu-ri...@nongnu.org
> > +S: Maintained
> > +F: hw/riscv/domain.c
> > +F: include/hw/riscv/domain.h
>
> I suggest 'opensbi_domain.c' and 'opensbi_domai
On 26 July 2024 17:49:58 BST, Jonathan Cameron
wrote:
>On Thu, 25 Jul 2024 14:50:50 +0100
>David Woodhouse wrote:
>
>> On Thu, 2024-07-25 at 08:33 -0400, Michael S. Tsirkin wrote:
>> > On Thu, Jul 25, 2024 at 01:31:19PM +0100, David Woodhouse wrote:
>> > > On Thu, 2024-07-25 at 08:29 -0400, Mi
On Fri, Jul 26, 2024 at 7:11 PM Sahil wrote:
>
> Hi,
>
> On Friday, July 26, 2024 7:10:24 PM GMT+5:30 Eugenio Perez Martin wrote:
> > On Fri, Jul 26, 2024 at 11:58 AM Sahil Siddiq wrote:
> > > [...]
> > > Q1.
> > > In virtio_ring.h [2], new aliases with memory alignment enforcement
> > > such as
Hi Gregor,
This patch doesn't build in my env. Here's the error:
./hw/riscv/virt.c
../hw/riscv/virt.c: In function ‘finalize_fdt’:
../hw/riscv/virt.c:1056:32: error: ‘ms’ undeclared (first use in this
function); did you mean ‘s’?
1056 | create_fdt_opensbi_domains(ms);
|
On 26/07/2024 09.25, Michael S. Tsirkin wrote:
On Fri, Jul 26, 2024 at 09:03:24AM +0200, Thomas Huth wrote:
On 26/07/2024 08.08, Michael S. Tsirkin wrote:
On Thu, Jul 25, 2024 at 06:18:20PM -0400, Peter Xu wrote:
On Tue, Aug 01, 2023 at 01:31:48AM +0300, Yuri Benditovich wrote:
USO features o
On Fri, Jul 26, 2024 at 3:12 AM Li, Xin3 wrote:
> > Hi, can you put together a complete series that includes all that's needed
> > for
> > nested FRED support?
>
> We can do it.
>
> Just to be clear, this patch is not needed to enable nested FRED, but to
> fix the following vmx test in kvm-unit-t
Hi,
On Friday, July 26, 2024 7:10:24 PM GMT+5:30 Eugenio Perez Martin wrote:
> On Fri, Jul 26, 2024 at 11:58 AM Sahil Siddiq wrote:
> > [...]
> > Q1.
> > In virtio_ring.h [2], new aliases with memory alignment enforcement
> > such as "vring_desc_t" have been created. I am not sure if this
> > is
On Fri, Jul 26, 2024 at 11:18:43AM +0200, Thomas Huth wrote:
>
> Looks like the reduction of this patch was not enough, we've run out of
> Cirrus-CI compute time again ... does anybody have additional ideas how we
> could avoid that in the future?
QEMU keeps getting bigger, so our attempts to cut
On Thu, 25 Jul 2024 14:50:50 +0100
David Woodhouse wrote:
> On Thu, 2024-07-25 at 08:33 -0400, Michael S. Tsirkin wrote:
> > On Thu, Jul 25, 2024 at 01:31:19PM +0100, David Woodhouse wrote:
> > > On Thu, 2024-07-25 at 08:29 -0400, Michael S. Tsirkin wrote:
> > > > On Thu, Jul 25, 2024 at 01:2
CC: Markus since he's had opinions on stuff related to -global in
the past.
On Wed, Jul 03, 2024 at 05:41:48PM -0300, Daniel Henrique Barboza wrote:
> Next patch will add Accel globals support. This means that globals won't be
> qdev exclusive logic since it'll have to deal with TYPE_ACCEL object
On 26 July 2024 15:57:34 BST, Jakub Kicinski wrote:
>On Fri, 26 Jul 2024 13:28:17 +0100 David Woodhouse wrote:
>> +` status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS,
>
> ^ watch out for ticks!
Oops, that last minute space->tab fix after I'd already left home for the
weekend w
On Fri Jul 26, 2024 at 7:11 PM AEST, Thomas Huth wrote:
> On 25/07/2024 17.40, Nicholas Piggin wrote:
> > In Gitlab CI, some ppc64 multi-threaded tcg tests crash when run in the
> > clang-user job with an assertion failure in glibc that seems to
> > indicate corruption:
> >
> >signals: allocat
On Fri, Jul 26, 2024 at 04:16:41PM GMT, Fiona Ebner wrote:
> Hi,
>
> sorry if I'm missing the obvious, but is there a way to get the dirty
> areas according to a dirty bitmap via QMP? I mean as something like
> offset + size + dirty-flag triples. In my case, the bitmap is also
> exported via NBD,
On Fri, Jul 26, 2024 at 10:43:42AM -0400, Peter Xu wrote:
> On Fri, Jul 26, 2024 at 09:48:02AM +0100, Daniel P. Berrangé wrote:
> > On Fri, Jul 26, 2024 at 09:03:24AM +0200, Thomas Huth wrote:
> > > On 26/07/2024 08.08, Michael S. Tsirkin wrote:
> > > > On Thu, Jul 25, 2024 at 06:18:20PM -0400, Pet
On 26/7/24 12:12, Michael Tokarev wrote:
24.07.2024 04:58, Song Gao wrote:
When the lddir level is 4 and the base is a HugePage, we may try to
put value 4
into a field in the TLBENTRY that is only 2 bits wide.
Fixes: Coverity CID 1547717
Fixes: 9c70db9a43388 ("target/loongarch: Fix tlb huge pa
On Fri, Jul 26, 2024 at 10:12:31AM +0800, Jason Wang wrote:
> On Fri, Jul 26, 2024 at 6:19 AM Peter Xu wrote:
> >
> > On Tue, Aug 01, 2023 at 01:31:48AM +0300, Yuri Benditovich wrote:
> > > USO features of virtio-net device depend on kernel ability
> > > to support them, for backward compatibility
On Fri, 26 Jul 2024 13:28:17 +0100 David Woodhouse wrote:
> +` status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS,
^ watch out for ticks!
On Fri, Jul 26, 2024 at 09:48:02AM +0100, Daniel P. Berrangé wrote:
> On Fri, Jul 26, 2024 at 09:03:24AM +0200, Thomas Huth wrote:
> > On 26/07/2024 08.08, Michael S. Tsirkin wrote:
> > > On Thu, Jul 25, 2024 at 06:18:20PM -0400, Peter Xu wrote:
> > > > On Tue, Aug 01, 2023 at 01:31:48AM +0300, Yur
On Fri, Jul 26, 2024 at 11:59 AM Sahil Siddiq wrote:
>
> Allocate memory for the packed vq format and support
> packed vq in the SVQ "start" operation.
>
> Signed-off-by: Sahil Siddiq
> ---
> Changes v1 -> v2:
> * vhost-shadow-virtqueue.h
> (struct VhostShadowVirtqueue): New member "is_packed"
Hello,
So, even if SRSO is fully mitigated on the host, we still see as not
completely patched inside of the VMs running on Zen 3 and 4 hosts
(e.g., AMD EPYC 7713)
We can see an example of that here:
https://bugzilla.suse.com/show_bug.cgi?id=1228079
This specific bug is about SLE15SP5, where we
Hi,
sorry if I'm missing the obvious, but is there a way to get the dirty
areas according to a dirty bitmap via QMP? I mean as something like
offset + size + dirty-flag triples. In my case, the bitmap is also
exported via NBD, so same question for qemu-nbd being the client.
I can get the info wit
On Fri, Jul 26, 2024 at 6:07 AM Thomas Huth wrote:
>
> On 25/07/2024 16.21, Cleber Rosa wrote:
> > On Tue, Jul 16, 2024 at 7:28 AM Thomas Huth wrote:
> ...
> >> There have been several attempts to update the test suite in QEMU
> >> to a newer version of Avocado, but so far no attempt has successf
On Fri, Jul 26, 2024 at 9:04 AM Thomas Huth wrote:
>
> On 25/07/2024 13.07, Daniel P. Berrangé wrote:
> > On Thu, Jul 25, 2024 at 08:42:31PM +1000, Richard Henderson wrote:
> >> On 7/25/24 19:55, Daniel P. Berrangé wrote:
> >>> On Thu, Jul 25, 2024 at 09:35:22AM +1000, Richard Henderson wrote:
> .
On Fri, Jul 26, 2024 at 11:58 AM Sahil Siddiq wrote:
>
> This is the first patch in a series to add support for packed
> virtqueues in vhost_shadow_virtqueue. This patch implements the
> insertion of available buffers in the descriptor area. It takes
> into account descriptor chains, but does not
The asset used in the mentioned test gets truncated before it's used
in the test. This means that the file gets modified, and thus the
asset's expected hash doesn't match anymore. This causes cache misses
and re-downloads every time the test is re-run.
Let's make a copy of the asset so that the
Some of these tests actually require the root filesystem image,
obtained through Avocado's asset feature and kept in a common cache
location, to be writable.
This makes a distinction between the tests that actually have this
requirement and those who don't. The goal is to be as safe as
possible,
The kernel is a common blob used in all tests. By moving it to the
setUp() method, the "fetch asset" plugin will recognize the kernel and
attempt to fetch it and cache it before the tests are started.
Signed-off-by: Cleber Rosa
---
tests/avocado/boot_xen.py | 13 ++---
1 file changed, 6
The tests under machine_aarch64_virt.py and machine_aarch64_sbsaref.py
should not be writing to the ISO files. By adding "media=cdrom" the
"ro" is autmatically set.
While at it, let's use a single code style and hash for the ISO url.
Signed-off-by: Cleber Rosa
---
tests/avocado/machine_aarch64
This bumps Avocado to latest the LTS release.
An LTS release is one that can receive bugfixes and guarantees
stability for a much longer period and has incremental minor releases
made.
Even though the 103.0 LTS release is pretty a rewrite of Avocado when
compared to 88.1, the behavior of all exis
The updated Avocado version allows for the execution of tests in
parallel.
While on a CI environment it may not be a good idea to increase the
parallelization level in a single runner, developers may leverage that
on specific CI runners or on their development environments.
This also multiplies t
When the OpenBSD based tests are run in parallel, the previously
single instance of the image would become corrupt. Let's give each
test its own copy.
Signed-off-by: Cleber Rosa
---
tests/avocado/machine_aarch64_sbsaref.py | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/
The SSL certificate installed at mipsdistros.mips.com has expired:
0 s:CN = mipsdistros.mips.com
i:C = US, O = Amazon, OU = Server CA 1B, CN = Amazon
a:PKEY: rsaEncryption, 2048 (bit); sigalg: RSA-SHA256
v:NotBefore: Dec 23 00:00:00 2019 GMT; NotAfter: Jan 23 12:00:00 2021 GMT
Because this pr
Avocado's asset system will deposit files in a cache organized either
by their original location (the URI) or by their names. Because the
cache (and the "by_name" sub directory) is common across tests, it's a
good idea to make these names as distinct as possible.
This avoid name clashes, which ma
Signed-off-by: Cleber Rosa
---
tests/avocado/tuxrun_baselines.py | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/tests/avocado/tuxrun_baselines.py
b/tests/avocado/tuxrun_baselines.py
index 736e4aa289..bd02e88ed6 100644
--- a/tests/avocado/tuxrun_baselines.py
Signed-off-by: Cleber Rosa
---
tests/avocado/cdrom.py | 41 +
1 file changed, 41 insertions(+)
create mode 100644 tests/avocado/cdrom.py
diff --git a/tests/avocado/cdrom.py b/tests/avocado/cdrom.py
new file mode 100644
index 00..c9aa5d69cb
--- /de
This is a *long* overdue update of the Avocado version used in QEMU.
It comes a time where the role of the runner and the libraries are
being discussed and questioned.
These exact commits have been staging on my side for over 30 days now,
and I was exceeding what I should in terms of testing befor
Avocado's fetchasset plugin runs before the actual Avocado job (and
any test). It analyses the test's code looking for occurrences of
"self.fetch_asset()" in the either the actual test or setUp() method.
It's not able to fully analyze all code, though.
The way these tests are written, make the fe
Based on many runs, the average run time for these 4 tests is around
250 seconds, with 320 seconds being the ceiling. In any way, the
default 120 seconds timeout is inappropriate in my experience.
Let's increase the timeout so these tests get a chance to completion.
Signed-off-by: Cleber Rosa
-
On Fri, Jul 26, 2024 at 11:58 AM Sahil Siddiq wrote:
>
> Hi,
>
> I have made some progress in this project and thought I would
> send these changes first before continuing. I split patch v1 [1]
> into two commits (#1 and #2) to make it easy to review. There are
> very few changes in the first comm
On Mon, 22 Jul 2024 08:45:59 +0200
Mauro Carvalho Chehab wrote:
> Enrich CPER error injection logic for ARM processor to allow
> setting values to from UEFI 2.10 tables N.16 and N.17.
>
> It should be noticed that, with such change, all arguments are
> now optional, so, once QMP is negotiated w
On Mon, 01 Jul 2024 18:11, Alberto Garcia wrote:
This tool converts a disk image to qcow2, writing the result directly
to stdout. This can be used for example to send the generated file
over the network.
This is equivalent to using qemu-img to convert a file to qcow2 and
then writing the result
On Fri, 2024-07-26 at 09:14 -0400, Michael S. Tsirkin wrote:
> For purposes of virtio, should we label all the fields here
> __le?
Yes. Peter and I discussed that, and it's mostly just a cosmetic change
at this point. The simple ACPI thing only exists on LE platforms for
*now* anyway.
We also had
On Fri, Jul 26, 2024 at 01:28:17PM +0100, David Woodhouse wrote:
> diff --git a/include/uapi/linux/vmclock-abi.h
> b/include/uapi/linux/vmclock-abi.h
> new file mode 100644
> index ..7b1b4759363c
> --- /dev/null
> +++ b/include/uapi/linux/vmclock-abi.h
> @@ -0,0 +1,187 @@
> +/* SPDX-Li
On Fri, 2024-07-26 at 09:04 -0400, Michael S. Tsirkin wrote:
> On Fri, Jul 26, 2024 at 02:00:25PM +0100, David Woodhouse wrote:
> > On Fri, 2024-07-26 at 08:52 -0400, Michael S. Tsirkin wrote:
> > > On Fri, Jul 26, 2024 at 09:35:51AM +0100, David Woodhouse wrote:
> > > > But for this use case, we o
On Fri, Jul 26, 2024 at 02:00:25PM +0100, David Woodhouse wrote:
> On Fri, 2024-07-26 at 08:52 -0400, Michael S. Tsirkin wrote:
> > On Fri, Jul 26, 2024 at 09:35:51AM +0100, David Woodhouse wrote:
> > > But for this use case, we only need a memory region that the hypervisor
> > > can update. We don
On 25/07/2024 13.07, Daniel P. Berrangé wrote:
On Thu, Jul 25, 2024 at 08:42:31PM +1000, Richard Henderson wrote:
On 7/25/24 19:55, Daniel P. Berrangé wrote:
On Thu, Jul 25, 2024 at 09:35:22AM +1000, Richard Henderson wrote:
...
Avocado runs a first pass doing all of the downloads, and only a
On Fri, 2024-07-26 at 08:52 -0400, Michael S. Tsirkin wrote:
> On Fri, Jul 26, 2024 at 09:35:51AM +0100, David Woodhouse wrote:
> > But for this use case, we only need a memory region that the hypervisor
> > can update. We don't need any of that complexity of gratuitously
> > interrupting all the v
On Fri, Jul 26, 2024 at 09:35:51AM +0100, David Woodhouse wrote:
> But for this use case, we only need a memory region that the hypervisor
> can update. We don't need any of that complexity of gratuitously
> interrupting all the vCPUs just to ensure that none of them can be
> running userspace whil
On Fri, 2024-07-26 at 08:47 -0400, Michael S. Tsirkin wrote:
> On Fri, Jul 26, 2024 at 09:06:29AM +0100, David Woodhouse wrote:
> > That's great. You don't even need it to be per-vCPU if you let the
> > hypervisor write directly to the single physical location that's mapped
> > to userspace. It can
On Mon, 22 Jul 2024 08:45:57 +0200
Mauro Carvalho Chehab wrote:
> There is a logic at helper to properly fill the mpidr information.
> This is needed for ARM Processor error injection, so store the
> value inside a cpu opaque value, to allow it to be used.
>
> Signed-off-by: Mauro Carvalho Cheha
On Fri, Jul 26, 2024 at 09:06:29AM +0100, David Woodhouse wrote:
> That's great. You don't even need it to be per-vCPU if you let the
> hypervisor write directly to the single physical location that's mapped
> to userspace. It can do that before it even starts *running* the vCPUs
> after migration.
A few quick replies from me.
I'm sure Mauro will add more info.
> > + 'tlb-error',
> > + 'bus-error',
> > + 'micro-arch-error']
> > +}
> > +
> > +##
> > +# @arm-inject-error:
> > +#
> > +# Inject ARM Processor error.
> > +#
> > +# @errortypes: ARM processor error type
On Mon, 22 Jul 2024 08:45:56 +0200
Mauro Carvalho Chehab wrote:
> From: Jonathan Cameron
>
> 1. Some GHES functions require handling addresses. Add a helper function
>to support it.
>
> 2. Add support for ACPI CPER (firmware-first) ARM processor error injection.
>
> Compliance with N.2.4.
Hi Paolo,
I suggest adding a "riscv:" at the start of the cover letter subject for the
next
version. This will make it easier for everyone else to quickly identify which
arch
the patches are changing.
Other than that, and checkpatch.pl style changes, looks good to me.
Thanks,
Daniel
On
On Mon, 22 Jul 2024 08:45:54 +0200
Mauro Carvalho Chehab wrote:
> From: Jonathan Cameron
>
> Creates a GED - Generic Event Device and set a GPIO to
The wonder of confusing names in ACPI. I thought I'd
fixed this but clearly not.
This GED isn't a Generic Event Device, it's a
Generic Error (De
From: David Woodhouse
The vmclock "device" provides a shared memory region with precision clock
information. By using shared memory, it is safe across Live Migration.
Like the KVM PTP clock, this can convert TSC-based cross timestamps into
KVM clock values. Unlike the KVM PTP clock, it does so o
On 7/17/24 12:30 PM, Paolo Savini wrote:
This patch optimizes the emulation of unit-stride load/store RVV instructions
when the data being loaded/stored per iteration amounts to 64 bytes or more.
The optimization consists of calling __builtin_memcpy on chunks of data of 128
and 256 bytes betwe
On 7/17/24 12:30 PM, Paolo Savini wrote:
From: Helene CHELIN
This patch improves the performance of the emulation of the RVV unit-stride
loads and stores in the following cases:
- when the data being loaded/stored per iteration amounts to 8 bytes or less.
- when the vector length is 16 byte
On Fri, 19 Jul 2024 16:29:26 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Add CPUID enumeration for intel RDT monitoring and allocation, as well
> as the flags used in the enumeration code.
>
> Signed-off-by: Hendrik Wüthrich
> ---
> hw/i386/rdt.c | 29 ++
On Fri Jul 26, 2024 at 7:11 PM AEST, Thomas Huth wrote:
> On 25/07/2024 17.40, Nicholas Piggin wrote:
> > In Gitlab CI, some ppc64 multi-threaded tcg tests crash when run in the
> > clang-user job with an assertion failure in glibc that seems to
> > indicate corruption:
> >
> >signals: allocat
ping
On Mon, Jul 01, 2024 at 05:11:40PM +0200, Alberto Garcia wrote:
> This tool converts a disk image to qcow2, writing the result directly
> to stdout. This can be used for example to send the generated file
> over the network.
On Fri, Jul 26, 2024 at 03:25:31AM -0400, Michael S. Tsirkin wrote:
> On Fri, Jul 26, 2024 at 09:03:24AM +0200, Thomas Huth wrote:
> > On 26/07/2024 08.08, Michael S. Tsirkin wrote:
> > > On Thu, Jul 25, 2024 at 06:18:20PM -0400, Peter Xu wrote:
> > > > On Tue, Aug 01, 2023 at 01:31:48AM +0300, Yur
On Fri, 19 Jul 2024 16:29:25 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Implement rdmsr and wrmsr for the following MSRs:
> * MSR_IA32_PQR_ASSOC
> * MSR_IA32_QM_EVTSEL
> * MSR_IA32_QM_CTR
> * IA32_L3_QOS_Mask_n
> * IA32_L2_QOS_Mask_n
> * IA32_L2_QoS_Ext_BW_Thrtl_n
>
> This al
On 7/26/2024 3:20 PM, David Hildenbrand wrote:
> On 26.07.24 08:20, Chenyi Qiang wrote:
>>
>>
>> On 7/25/2024 10:04 PM, David Hildenbrand wrote:
Open
Implementing a RamDiscardManager to notify VFIO of page conversions
causes changes in semantics: private memory is treate
On Fri, 19 Jul 2024 16:29:24 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Add RDT code to Associate CLOSID with RMID / set RMID for monitoring,
> write COS, and read monitoring data. This patch does not add code for
> the guest to interact through these things with MSRs, only th
On Fri, 19 Jul 2024 16:29:23 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Add code to initialize all necessary state for the RDT device.
>
> Signed-off-by: Hendrik Wüthrich
> ---
> hw/i386/rdt.c | 28
> 1 file changed, 28 insertions(+)
>
> diff -
On Fri, 19 Jul 2024 16:29:23 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Add code to initialize all necessary state for the RDT device.
>
> Signed-off-by: Hendrik Wüthrich
Spell check (typo in patch title).
On Fri, 19 Jul 2024 16:29:22 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Add structures and variables needed to emulate Intel RDT, including
> module-internal sturctures and state in ArchCPU. No functionality yet.
>
> Signed-off-by: Hendrik Wüthrich
A few general comments inl
Hi Paolo,
RAPL MSR has landed in staging with few scratches.
Here a couple of patches to solves CID 1558553 and 1558557.
Anthony
Anthony Harivel (2):
target/i386: Fix typo that assign same value twice
target/i386: Clean output of vmsr_read_thread_stat()
target/i386/kvm/kvm.c | 4 +
Fix leaking memory of file handle in case of error
Erase unused "pid = -1"
Add clearer error_report
Should fix: CID 1558557
Signed-off-by: Anthony Harivel
---
target/i386/kvm/vmsr_energy.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/i386/kvm/vmsr_energy.c b/t
Should fix: CID 1558553
Signed-off-by: Anthony Harivel
---
target/i386/kvm/kvm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index b4aab9a410b5..31f149c9902c 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@
On Fri, 19 Jul 2024 16:29:21 +
Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich
>
> Change config to show RDT, add minimal code to the rdt.c module to make
> sure things still compile.
>
> Signed-off-by: Hendrik Wüthrich
Hi Hendrik
Great to see emulation of this. Will be handy for tes
24.07.2024 04:58, Song Gao wrote:
When the lddir level is 4 and the base is a HugePage, we may try to put value 4
into a field in the TLBENTRY that is only 2 bits wide.
Fixes: Coverity CID 1547717
Fixes: 9c70db9a43388 ("target/loongarch: Fix tlb huge page loading issue")
Signed-off-by: Song Gao
On 25/07/2024 16.21, Cleber Rosa wrote:
On Tue, Jul 16, 2024 at 7:28 AM Thomas Huth wrote:
...
There have been several attempts to update the test suite in QEMU
to a newer version of Avocado, but so far no attempt has successfully
been merged yet.
So, we've seen in the past an attempt to upd
Hi,
I have made some progress in this project and thought I would
send these changes first before continuing. I split patch v1 [1]
into two commits (#1 and #2) to make it easy to review. There are
very few changes in the first commit. The second commit has not
changes.
There are a few things that
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