On 5/26/24 14:26, Nicholas Piggin wrote:
POWER9 and POWER10 machines come in two variants, "big-core" and
"small-core".
Big core machines are SMT8 from the software point of view, but in the
low level platform topology ("xscom registers and pervasive
addressing"), these look more like a pair of
On 5/28/24 18:47, David Hildenbrand wrote:
> Am 28.05.24 um 18:15 schrieb Michal Privoznik:
>> ./build/qemu-system-x86_64 \ -m
>> size=8389632k,slots=16,maxmem=2560k \ -object
>> '{"qom-type":"memory-backend-file","id":"ram-node0","mem-path":"hugepages2M","prealloc":true,"size":8590983168,"host
On 27/5/24 23:19, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.h | 2 +-
tcg/loongarch64/tcg-target.c.inc | 11 ---
2 files changed, 9 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
diff --git a/tcg/loongarch64/
On 27/5/24 23:19, Richard Henderson wrote:
Use TCG_VEC_TMP0 directly.
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 27/5/24 23:19, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 18 +-
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 1e721b8b20..9a8f67c
On 27/5/24 23:19, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 5/26/24 14:26, Nicholas Piggin wrote:
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Signed-off-by: Nicholas Piggin
---
target/ppc/cpu
On 5/29/24 02:24, Nicholas Piggin wrote:
On Tue May 28, 2024 at 6:32 PM AEST, Harsh Prateek Bora wrote:
On 5/26/24 17:56, Nicholas Piggin wrote:
The chip_pir chip class method allows the platform to set the PIR
processor identification register. Extend this to a more general
ID function which
On 27/5/24 23:18, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
host/include/loongarch64/host/cpuinfo.h | 1 +
util/cpuinfo-loongarch.c| 1 +
2 files changed, 2 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 27/5/24 23:18, Richard Henderson wrote:
We can implement this with fld_d, fst_d for load and store,
and then use the normal v128 operations in registers.
This will improve support for guests which use v64.
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.h | 2 +-
tcg/l
On 23/5/24 21:41, Inès Varhol wrote:
This commit creates a clock in STM32L4x5 SYSCFG and wires it up to the
corresponding clock from STM32L4x5 RCC.
Signed-off-by: Inès Varhol
---
include/hw/misc/stm32l4x5_syscfg.h | 1 +
hw/arm/stm32l4x5_soc.c | 2 ++
hw/misc/stm32l4x5_syscfg.
I had a look at this before I realized it's already in. I'm sending
this out not to demand any change, but only to point out an issue to be
avoided in future work.
Cédric Le Goater writes:
> We will use the Error object to improve error reporting in the
> .log_global*() handlers of VFIO. Add do
On Wed, May 29, 2024 at 07:15:36AM +0200, Philippe Mathieu-Daudé wrote:
> Date: Wed, 29 May 2024 07:15:36 +0200
> From: Philippe Mathieu-Daudé
> Subject: [PATCH v5 20/23] hw/i386/pc: Remove deprecated pc-i440fx-2.3
> machine
> X-Mailer: git-send-email 2.41.0
>
> The pc-i440fx-2.3 machine was dep
On Wed, May 29, 2024 at 07:15:37AM +0200, Philippe Mathieu-Daudé wrote:
> Date: Wed, 29 May 2024 07:15:37 +0200
> From: Philippe Mathieu-Daudé
> Subject: [PATCH v5 21/23] hw/i386/pc: Simplify DEFINE_I440FX_MACHINE() macro
> X-Mailer: git-send-email 2.41.0
>
> Last commit removed the last non-NULL
On 29/05/2024 07.15, Philippe Mathieu-Daudé wrote:
X86CPU::kvm_no_smi_migration was only used by the
pc-i440fx-2.3 machine, which got removed. Remove it
and simplify kvm_put_vcpu_events().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
target/i386/cpu.h | 3 ---
target/
Adjust the "cpus" parameter to match the comment configuration.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index c9cbc89c21b9..5d99e0d9234c 100644
--- a/test
With module level, QEMU now support 8-levels topology hierarchy.
Cover "modules" in SMP_CONFIG_WITH_FULL_TOPO related cases.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 129
1 file changed, 85 insertions(+), 44 deletions(-)
diff --git a/tests/u
Since -smp allows parameters=1 whether the level is supported by
machine, to avoid the test scenarios where the parameter defaults to 1
cause some errors to be masked, explicitly set undesired parameters to
0.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 8
1 file changed,
SMP_CONFIG_WITH_FULL_TOPO hasn't support module level, so the parameter
should indicate the "clusters".
Additionally, reorder the parameters of -smp to match the topology
hierarchy order.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 4 +++-
1 file changed, 3 insertions(+), 1 deleti
On 29/05/2024 07.15, Philippe Mathieu-Daudé wrote:
Last commit removed the last non-NULL use of DEFINE_I440FX_MACHINE
3rd parameter. 'compatfn' is now obsolete, remove it.
Suggested-by: Daniel P. Berrangé
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c | 62 ++
Since i386 PC machine supports both "modules" and "dies" in -smp, add the
"modules" and "dies" combination test case to match the actual topology
usage scenario.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 103
1 file changed, 103 insertions(+)
Cover the module cases in test-smp-parse.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 112 +---
1 file changed, 103 insertions(+), 9 deletions(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 2214e47ba9c0..01832e5eda32
Currently, -smp supports module level.
It is necessary to consider the effects of module in the test cases to
ensure that the calculations are correct. This is also the preparation
to add module test cases.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 13 +++--
1 file chang
Hi,
Since the module support has landed in x86, and it's time to add the
module's -smp test cases to cover the relevant code path.
This series adds the module tests to ensure that this new level does
not break the current topology information calculations. It also
includes some misc cleanup.
Tha
Fix the comments to match the actual configurations.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 9fdba24fce56..fa8e7d83a7b6 100644
--- a/tests/u
On 29/05/2024 07.15, Philippe Mathieu-Daudé wrote:
The pc-i440fx-2.3 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecate
On 27/05/2024 16.59, Alexander Bulekov wrote:
When we are building for OSS-Fuzz, we want to ensure that the fuzzer
targets are actually created, regardless of leaks. Leaks will be
detected by the subsequent tests of the individual fuzz-targets.
Signed-off-by: Alexander Bulekov
---
scripts/oss
On 29/5/24 07:15, Philippe Mathieu-Daudé wrote:
Missing review: #20
Err, missing review #20 & #21
Paolo, Michael, should I merge this myself? Ack-by welcome ;)
On 5/29/2024 12:59, Tong Ho wrote:> Add inlined functions to obtain a mask of
changed bits. 3 flavors
> are added: toggled, changed to 1, changed to 0.
>
> These newly added utilities aid common device behaviors where
> actions are taken only when a register's bit(s) are changed.
>
> Signed-off-
PCMachineClass::rsdp_in_ram was only used by the
pc-i440fx-2.2 machine, which got removed. It is
now always true. Remove it, simplifying acpi_setup().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 1 -
hw/i386/acpi-build.c | 35
The pc-i440fx-2.1 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
docs/about/deprecated.rst
XHCI_FLAG_FORCE_PCIE_ENDCAP was only used by the
pc-i440fx-2.0 machine, which got removed. Remove it
and simplify usb_xhci_pci_realize().
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/usb/hcd-xhci.h | 1 -
hw/usb/hcd-xhci-nec.c | 2 --
hw/usb/h
PCMachineClass::resizable_acpi_blob was only used by the
pc-i440fx-2.2 machine, which got removed. It is now always
true. Remove it, simplifying acpi_build().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 3 ---
hw/i386/acpi-build.c | 10 --
hw/
AcpiBuildState::rsdp is always NULL, remove it,
simplifying acpi_build_update().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
hw/i386/acpi-build.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i3
'legacy_align' is always NULL, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: David Hildenbrand
Reviewed-by: Zhao Liu
---
include/hw/mem/pc-dimm.h | 3 +--
hw/arm/virt.c| 2 +-
hw/i386/pc.c | 2 +-
hw/loongarch/virt.c | 2 +-
No external code sets the 'memory-hotplug-support'
property, remove it.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/acpi/ich9.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 573d032e
'smbios_encode_uuid' is always true, remove it,
simplifying smbios_encode_uuid().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/smbios/smbios.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 8261eb7
The pc-i440fx-2.3 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 4 ++--
docs/about/removed-features.rst
Last commit removed the last non-NULL use of DEFINE_I440FX_MACHINE
3rd parameter. 'compatfn' is now obsolete, remove it.
Suggested-by: Daniel P. Berrangé
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c | 62 ++-
1 file changed, 29 insertio
The pc-i440fx-2.2 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
docs/about/deprecated.rst
x86_cpu_change_kvm_default() was only used out of kvm-cpu.c by
the pc-i440fx-2.1 machine, which got removed. Make it static,
and remove its declaration. "kvm-cpu.h" is now empty, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
target/i386/kvm
The pc-i440fx-2.0 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
docs/about/deprecated.rst
X86CPU::kvm_no_smi_migration was only used by the
pc-i440fx-2.3 machine, which got removed. Remove it
and simplify kvm_put_vcpu_events().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
target/i386/cpu.h | 3 ---
target/i386/cpu.c | 2 --
target/i386/kvm/kvm.c | 7 +-
acpi_memory_hotplug::is_enabled is set to %true once via
ich9_lpc_initfn() -> ich9_pm_add_properties(). No need to
check it, so remove now dead code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/acpi/ich9.c | 28 ++--
1 file changed, 6 insertions(+)
PCMachineClass::acpi_data_size was only used by the pc-i440fx-2.0
machine, which got removed. Since it is constant, replace the class
field by a definition (local to hw/i386/pc.c, since not used
elsewhere).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
XHCI_FLAG_SS_FIRST was only used by the pc-i440fx-2.0 machine,
which got removed. Remove it and simplify various functions in
hcd-xhci.c.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/usb/hcd-xhci.h | 3 +--
hw/usb/hcd-xhci-nec.c | 2 --
hw/u
PCMachineClass::legacy_acpi_table_size was only used by the
pc-i440fx-2.0 machine, which got removed. Remove it and simplify
acpi_build().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 1 -
hw/i386/acpi-build.c | 62 +
'legacy_align' is always NULL, remove it, simplifying
memory_device_pre_plug().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: David Hildenbrand
Reviewed-by: Zhao Liu
---
include/hw/mem/memory-device.h | 2 +-
hw/i386/pc.c | 3 +--
hw/mem/memor
PCMachineClass::enforce_aligned_dimm was only used by the
pc-i440fx-2.1 machine, which got removed. It is now always
true. Remove it, simplifying pc_get_device_memory_range().
Update the comment in Avocado test_phybits_low_pse36().
Reviewed-by: Zhao Liu
Signed-off-by: Philippe Mathieu-Daudé
---
PCMachineClass::smbios_uuid_encoded was only used by the
pc-i440fx-2.1 machine, which got removed. It is now always
true, remove it.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 1 -
hw/i386/fw_cfg.c | 3 +--
hw/i386/pc.c
Similarly to the commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated",
deprecate the 2.4 to 2.12 machines.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Zhao Liu
---
docs/about/deprecated.rst | 4 +
'uuid_encoded' is always true, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/firmware/smbios.h | 3 +--
hw/arm/virt.c| 3 +--
hw/i386/fw_cfg.c | 2 +-
hw/loongarch/virt.c | 2 +-
hw/riscv/virt.c | 2 +-
hw
Missing review: #20
Paolo, Michael, should I merge this myself? Ack-by welcome ;)
Since v4:
- Rebased on top of 7b68a5fe2f ("Merge tag 'for-upstream')
- Removed obsolete comment (Daniel)
- Clean DEFINE_I440FX_MACHINE (Daniel, new patch).
Since v3:
- Deprecate up to 2.12 (Thomas)
Since v2:
- Add
Add inlined functions to obtain a mask of changed bits. 3 flavors
are added: toggled, changed to 1, changed to 0.
These newly added utilities aid common device behaviors where
actions are taken only when a register's bit(s) are changed.
Signed-off-by: Tong Ho
---
include/qemu/bitops.h | 33 +++
ping?
On 19/4/24 13:05, Philippe Mathieu-Daudé wrote:
We need to use get_address() to get an address from cpu_gpr[],
since $zero is "special" (NULL).
Fixes: e05da09b7c ("target/riscv: implement Zicbom extension")
Reported-by: Zhiwei Jiang (姜智伟)
Signed-off-by: Philippe Mathieu-Daudé
---
targ
On 20/5/24 14:49, Peter Maydell wrote:
On Wed, 8 May 2024 at 15:35, Philippe Mathieu-Daudé wrote:
Check the function index is in range and use an unsigned
variable to avoid the following warning with GCC 13.2.0:
[666/5358] Compiling C object libcommon.fa.p/hw_input_tsc2005.c.o
hw/input/
ping?
On 10/5/24 12:49, Philippe Mathieu-Daudé wrote:
Respin of Paolo's Xen patches from
https://lore.kernel.org/qemu-devel/20240509170044.190795-1-pbonz...@redhat.com/
rebased on one of my cleanup branches making backend
structures const. Treat xenfb as other backends.
Paolo Bonzini (2):
hw
On Wed, May 29, 2024 at 4:43 AM Gonglei (Arei) wrote:
>
> Hi,
>
> > -Original Message-
> > From: Peter Xu [mailto:pet...@redhat.com]
> > Sent: Tuesday, May 28, 2024 11:55 PM
> > > > > Exactly, not so compelling, as I did it first only on servers
> > > > > widely used for production in our
Postcopy requires userfaultfd support, which requires tmpfs if a memory
file is used.
This adds back support for /dev/shm memory files, but adds preallocation
to skip environments where that mount is limited in size.
Signed-off-by: Nicholas Piggin
---
How about this? This goes on top of the res
Hi,
> -Original Message-
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Tuesday, May 28, 2024 11:55 PM
> > > > Exactly, not so compelling, as I did it first only on servers
> > > > widely used for production in our data center. The network
> > > > adapters are
> > > >
> > > > Ethernet
On 5/1/2024 1:05, Denis V. Lunev via wrote:
> Preallocate filter allows to implement really interesting setups.
>
> Assume that we have
> * shared block device, f.e. iSCSI LUN, implemented with some HW device
> * clustered LVM on top of it
> * QCOW2 image stored inside LVM volume
>
> This allows
Hi Cedric,
> From: Cédric Le Goater
> On 5/28/24 12:02, Jamin Lin wrote:
> > Hi Cedric,
> >
> >> -Original Message-
> >> From: Cédric Le Goater
> >> Sent: Tuesday, May 28, 2024 5:56 PM
> >> To: Jamin Lin ; Peter Maydell
> >> ; Andrew Jeffery
> >> ; Joel Stanley ;
> >> Alistair Francis ;
On Wed, May 29, 2024 at 10:05:32AM +1000, Nicholas Piggin wrote:
> I think that's good if you _need_ shm (e.g., for a uffd test), but
> we should permit tests that only require a memory file.
Yes there's no reason to forbid that, it's just that we're not adding new
tests but we can potentially cha
On Tue May 28, 2024 at 7:16 PM AEST, Harsh Prateek Bora wrote:
>
>
> On 5/26/24 17:56, Nicholas Piggin wrote:
> > Add helpers for TCG code to determine if there are SMT siblings
> > sharing per-core and per-lpar registers. This simplifies the
> > callers and makes SMT register topology simpler to m
On Tue May 28, 2024 at 6:52 PM AEST, Harsh Prateek Bora wrote:
> corrected typo, it's bitwise.
>
> On 5/28/24 14:18, Harsh Prateek Bora wrote:
> >> - (POWERPC_CPU(cs)->env.spr_cb[SPR_PIR].default_value &
> >> ~(cs->nr_threads - 1))
> >> + (POWERPC_CPU(cs)->env.core_index)
> >
> > Dont we wa
On Tue May 28, 2024 at 6:32 PM AEST, Harsh Prateek Bora wrote:
>
>
> On 5/26/24 17:56, Nicholas Piggin wrote:
> > The chip_pir chip class method allows the platform to set the PIR
> > processor identification register. Extend this to a more general
> > ID function which also allows the TIR to be se
On Tue May 28, 2024 at 5:52 PM AEST, Cédric Le Goater wrote:
> On 5/28/24 08:28, Harsh Prateek Bora wrote:
> >
> >
> > On 5/26/24 17:56, Nicholas Piggin wrote:
> >> The timebase state machine is per per-core state and can be driven
> >> by any thread in the core. It is currently implemented as a
On Tue May 28, 2024 at 5:45 PM AEST, Cédric Le Goater wrote:
> On 5/28/24 09:10, Harsh Prateek Bora wrote:
> > Hi Nick,
> >
> > On 5/26/24 17:56, Nicholas Piggin wrote:
> >> This will allow different settings and checks for different
> >> machine types with later changes.
> >>
> >> Signed-off-by:
On Tue May 28, 2024 at 5:15 PM AEST, Cédric Le Goater wrote:
> On 5/28/24 09:05, Aditya Gupta wrote:
> > Skiboot/OPAL patches are in discussion upstream [1], with corresponding
> > commits in github repository [2].
> >
> > Update skiboot.lid, with binary built from 'upstream_power11' branch
> > of
On Tue May 28, 2024 at 4:50 PM AEST, Harsh Prateek Bora wrote:
>
> Hi Nick,
>
> On 5/26/24 17:56, Nicholas Piggin wrote:
> > SPRC/SPRD were recently added to all BookS CPUs supported, but
> > they are only tested on POWER9 and POWER10, so restrict them to
> > those CPUs.
> >
>
> Hope you mean to r
On Wed May 29, 2024 at 2:05 AM AEST, Peter Xu wrote:
> On Tue, May 28, 2024 at 09:35:22AM -0400, Peter Xu wrote:
> > On Tue, May 28, 2024 at 02:27:57PM +1000, Nicholas Piggin wrote:
> > > There is no need to use /dev/shm for file-backed memory devices, and
> > > it is too small to be usable in gitl
On 5/29/2024 2:06 AM, Richard Henderson wrote:
On 5/27/24 23:12, Jeuk Kim wrote:
From: Minwoo Im
This patch adds support for MCQ defined in UFSHCI 4.0. This patch
utilized the legacy I/O codes as much as possible to support MCQ.
MCQ operation & runtime register is placed at 0x1000 offset o
On Mon, Apr 29, 2024 at 08:55:28AM -0700, Steve Sistare wrote:
> Preserve fields of RAMBlocks that allocate their host memory during CPR so
> the RAM allocation can be recovered.
This sentence itself did not explain much, IMHO. QEMU can share memory
using fd based memory already of all kinds, as
On 28/05/2024 11:35, Thomas Huth wrote:
On 28/05/2024 11.54, Gerd Hoffmann wrote:
The xhci host adapter is the much better choice.
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ohci-pci.c | 1 +
hw/usb/Kconfig | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb
On 26/05/2024 20:42, Richard Henderson wrote:
Now tested with RISU, using a Solaris M8 host as reference.
This exposed a few bugs in the existing VIS1 support as well,
so fix those before anything else. It also exposed a few bugs
in the implementation of VIS3, so fixes squashed there as well.
On Mon, Apr 29, 2024 at 08:55:26AM -0700, Steve Sistare wrote:
> Allocate anonymous memory using memfd_create if the memfd-alloc machine
> option is set.
>
> Signed-off-by: Steve Sistare
> ---
> hw/core/machine.c | 22 ++
> include/hw/boards.h | 1 +
> qemu-options.hx
On 26/05/2024 20:36, Richard Henderson wrote:
Let risu accept elf test files, adjusted from v1.
Adjust risugen to invoke the assembler and linker,
with a cross-compiler prefix if needed.
Add some sparc64 testing which utilizes this.
Changes for v2:
- Implement VIS2 through VIS4.
There's som
No need for a full comparison; xor produces non-zero bits
for QC just fine.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/gengvec.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/gengvec.c b/
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 10 +
target/arm/tcg/translate.h | 4
target/arm/tcg/neon-dp.decode | 10 ++---
target/arm/tcg/gengvec.c| 22 +++
target/arm/tcg/neon_helper.c| 38 ++
For all, rm == 15 is UNPREDICTABLE.
Prior to v8, thumb with rm == 13 is UNPREDICTABLE.
For PLDW, rn == 15 is UNPREDICTABLE.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a32-uncond.decode | 8 +++--
target/arm/tcg/t32.decode| 7 ++--
target/arm/tcg/translate.c | 58
We already have a gvec helper for the operations, but we aren't
using it on the aa32 neon side. Create a unified expander for
use by both aa32 and aa64 translators.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 4
target/arm/tcg/gengvec
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 6 --
target/arm/tcg/translate.h | 4 +
target/arm/tcg/gengvec.c| 144
target/arm/tcg/neon_helper.c| 27 --
target/arm/tcg/translate-a64.c
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 22 +++---
2 files changed, 11 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index ea897
These are the last instructions within disas_simd_three_reg_same
and disas_simd_scalar_three_reg_same, so remove them.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 10 ++
target/arm/tcg/a64.decode | 18 +++
target/arm/tcg/translate-a64.c | 276 ++--
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/gengvec.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
index e64ca02e0c..2451d23823 100644
--- a/target/arm/tcg/gengvec.c
+++ b/target/arm/
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4 ++
target/arm/tcg/translate-a64.c | 108 ++---
2 files changed, 49 insertions(+), 63 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
These are the only instructions in the 3 source scalar class.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 10 ++
target/arm/tcg/translate-a64.c | 231 -
2 files changed, 93 insertions(+), 148 deletions(-)
diff --git a/target/arm/tcg/a64
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 22 ++
2 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 1c448
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 8
target/arm/tcg/translate.h | 4
target/arm/tcg/neon-dp.decode | 10 ++---
target/arm/tcg/gengvec.c| 24 ++
target/arm/tcg/neon_helper.c| 36
Suggested-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/gengvec.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
index bfe6885a01..3e2d3c21a1 100644
--- a/target/arm/tcg/gengvec.c
+++ b/target/arm/tcg/gengv
This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 17
target/arm/tcg/translate.h | 15 +++
target/arm/tcg/gengvec.c
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 7 ++
target/arm/tcg/translate-a64.c | 40 +-
2 files changed, 32 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.deco
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4 ++
target/arm/tcg/translate-a64.c | 74 ++
2 files changed, 53 insertions(+), 25 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
i
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 22 ++
2 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index bc989
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 2 ++
target/arm/tcg/translate-a64.c | 11 +++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 3061e26242..e33d91fd
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 6 ++
target/arm/tcg/translate-a64.c | 22 +++---
2 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 96c
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 5
target/arm/tcg/translate-a64.c | 51 +-
2 files changed, 25 insertions(+), 31 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 2 ++
target/arm/tcg/translate-a64.c | 11 +++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index e33d91fd0a..b1bbcb14
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/gengvec.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
index 6dc96269d5..e64ca02e0c 100644
--- a/target/arm/tcg/gengvec.c
+++ b/target/a
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 8
target/arm/tcg/translate-a64.c | 77 ++
2 files changed, 31 insertions(+), 54 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
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