The uaddcmt (UNIT ADD COMPLEMENT AND TRAP ON CONDITION) instruction
triggers a trap if the condition is true, and stores the result of the
addition in the target register otherwise.
It does not use the condition to nullify the following instruction, so
drop the calculated condition and do not insta
On 3/23/24 18:29, Richard Henderson wrote:
Call translator_io_start before write to EIRR.
Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt.
Exit TB after write to EIEM, but otherwise use a straight store.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge D
On 3/23/24 18:29, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Thanks!
Helge
---
target/hppa/translate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ceb739c
On 3/23/24 18:29, Richard Henderson wrote:
The call to gen_helper_read_interval_timer is
identical on both sides of the IF.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Thanks!
Helge
---
target/hppa/translate.c | 4 +---
1 file changed, 1 inserti
On 3/23/24 18:29, Richard Henderson wrote:
The return address comes from IA*Q_Next, and IASQ_Next
is always equal to IASQ_Back, not IASQ_Front.
Signed-off-by: Richard Henderson
Tested-by: Helge Deller
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
On Thu, Mar 21, 2024 at 8:50 AM Philippe Mathieu-Daudé
wrote:
>
> Extract the MMU API and expose it via "mmu.h" so we can
> reuse the methods in target/xtensa/ files.
The MMU/MPU are replaceable configuration blocks in the xtensa
architecture, their internals don't have architecture-wide signific
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ceb739c54a..8c1a564c5d 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2162,6 +2162,9 @@ static bool t
Do not clobber the high bits of the address by using a 32-bit deposit.
Reviewed-by: Helge Deller
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/translate.c b/target
The return address comes from IA*Q_Next, and IASQ_Next
is always equal to IASQ_Back, not IASQ_Front.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 19594f917e
From: Sven Schnelle
Fixes: c53e401ed9ff ("target/hppa: Remove TARGET_REGISTER_BITS")
Signed-off-by: Sven Schnelle
Reviewed-by: Richard Henderson
Message-Id: <20240321184228.611897-2-sv...@stackframe.org>
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 6 ++
1 file changed,
From: Sven Schnelle
Wide mode provides two more conditions, add them.
Fixes: 59963d8fdf42 ("target/hppa: Pass d to do_unit_cond")
Signed-off-by: Sven Schnelle
Reviewed-by: Richard Henderson
Message-Id: <20240321184228.611897-1-sv...@stackframe.org>
Signed-off-by: Richard Henderson
---
target
Call translator_io_start before write to EIRR.
Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt.
Exit TB after write to EIEM, but otherwise use a straight store.
Signed-off-by: Richard Henderson
---
target/hppa/helper.h | 1 -
target/hppa/int_helper.c | 14 --
target/h
Two new fixes for -icount assertion failures wrt
not setting can_do_io properly. With these I can
boot Linux with -icount shift=auto enabled.
r~
Richard Henderson (5):
target/hppa: Fix BE,L set of sr0
target/hppa: Fix B,GATE for wide mode
target/hppa: Mark interval timer write as io
ta
The call to gen_helper_read_interval_timer is
identical on both sides of the IF.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 8c1a564c5d..5b8c1b06c3 1006
On Thu, Mar 21, 2024 at 4:49 PM Philippe Mathieu-Daudé
wrote:
> MicroBlaze MMU API is exposed in "mmu.h". In order to avoid
> name clashing with other targets, prefix the API with 'mb_'.
>
Reviewed-by: Edgar E. Iglesias
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/microblaze/m
Shutdown requests are normally hardware dependent.
By extending pvpanic to also handle shutdown requests, guests can
submit such requests with an easily implementable and cross-platform
mechanism.
Acked-by: Cornelia Huck
Signed-off-by: Thomas Weißschuh
---
hw/misc/pvpanic.c | 5 +
i
Avoid the necessity to update all tests when new events are added
to the device.
Acked-by: Thomas Huth
Reviewed-by: Cornelia Huck
Signed-off-by: Thomas Weißschuh
---
tests/qtest/pvpanic-pci-test.c | 5 +++--
tests/qtest/pvpanic-test.c | 5 +++--
2 files changed, 6 insertions(+), 4 deletion
The missing functionality has been implemented now.
This reverts commit e739d1935c461d0668057e9dbba9d06f728d29ec.
Signed-off-by: Thomas Weißschuh
---
docs/specs/pvpanic.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/specs/pvpanic.rst b/docs/specs/pvpanic.rst
index
The different components of pvpanic duplicate the list of supported
events. Move it to the shared header file to minimize changes when new
events are added.
Reviewed-by: Thomas Huth
Reviewed-by: Cornelia Huck
Signed-off-by: Thomas Weißschuh
---
hw/misc/pvpanic-isa.c | 3 +--
hw/misc/pvpani
PVPANIC_* defines are imported from the kernel via
standard-header/pvpanic.h.
For that the kernel needs to pick up the changes from
qemu docs/specs/pvpanic.rst which takes time.
The actual value of the define is known as the authoritative source
comes from the qemu tree in docs/specs/pvpanic.rst,
Validate that a shutdown via the pvpanic device emits the correct
QMP events.
Signed-off-by: Thomas Weißschuh
Reviewed-by: Thomas Huth
---
tests/qtest/pvpanic-pci-test.c | 39 +++
tests/qtest/pvpanic-test.c | 29 +
2 files chan
Shutdown requests are normally hardware dependent.
By extending pvpanic to also handle shutdown requests, guests can
submit such requests with an easily implementable and cross-platform
mechanism.
The background is the usage of minimal Linux kernels with different
architectures for testing purpose
From: Alejandro Jimenez
Emit a QMP event on receiving a PVPANIC_SHUTDOWN event. Even though a typical
SHUTDOWN event will be sent, it will be indistinguishable from a shutdown
originating from other cases (e.g. KVM exit due to KVM_SYSTEM_EVENT_SHUTDOWN)
that also issue the guest-shutdown cause.
A
23 matches
Mail list logo