From: Ankit Agrawal
ACPI spec provides a scheme to associate "Generic Initiators" [1]
(e.g. heterogeneous processors and accelerators, GPUs, and I/O devices with
integrated compute or DMA engines GPUs) with Proximity Domains. This is
achieved using Generic Initiator Affinity Structure in SRAT. Du
From: Ankit Agrawal
NVIDIA GPU's support MIG (Mult-Instance GPUs) feature [1], which allows
partitioning of the GPU device resources (including device memory) into
several (upto 8) isolated instances. Each of the partitioned memory needs
a dedicated NUMA node to operate. The partitions are not fi
From: Ankit Agrawal
There are upcoming devices which allow CPU to cache coherently access
their memory. It is sensible to expose such memory as NUMA nodes separate
from the sysmem node to the OS. The ACPI spec provides a scheme in SRAT
called Generic Initiator Affinity Structure [1] to allow an a
On Fri, Dec 01, 2023 at 12:15:11PM -0500, Michael S. Tsirkin wrote:
> We have a reported regression because of the switch to
> smbios 3.0, and maybe need to revert that, but Igor asked
> for a bit more time to investigate.
>
> The following changes since commit abf635ddfe3242df907f58967f3c1e6763bb
On Fri, Dec 01, 2023 at 10:57:04PM +0530, Ani Sinha wrote:
>
>
> > On 01-Dec-2023, at 10:45 PM, Michael S. Tsirkin wrote:
> >
> > From: Ani Sinha
> >
> > When dumping table blobs using rebuild-expected-aml.sh, table blobs from all
> > test variants are dumped regardless of whether there are a
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up and
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
Current implementation of T2 - T5 times on the STM32 platform does not
work properly.
After configuring the timer-counter circuit to report interrupts every
10ms, in reality the first interrupt is reported
only once after a few seconds, while subsequent interrupts do not come.
The current code also
From: Lucjan Bryndza
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit
Hi Alistair
Sorry for the delay in response and thank you for a response.
The previous STM32 timer implementation did not work properly. Incorrect
calculation of time to next interrupt caused interrupts not to be reported
correctly. For example, programming the timer-counter circuit with an
;
+}
/* If device supports async unplug just request it to be done,
* otherwise just remove it synchronously */
---
base-commit: 4705fc0c8511d073bee4751c3c974aab2b10a970
change-id: 20231202-bus-75a454c5d959
Best regards,
--
Akihiko Odaki
On 2023/12/02 17:00, Akihiko Odaki wrote:
Introduction
This series is based on the RFC series submitted by Yui Washizu[1].
See also [2] for the context.
This series enables SR-IOV emulation for virtio-net. It is useful
to test SR-IOV support on the guest, or to expose several vDPA
This change removes the parsing of pci-device's failover_pair_id
property from virtio-net, and lets pci-device to report an error if
an unknown ID is specified for the property.
Signed-off-by: Akihiko Odaki
---
include/hw/virtio/virtio-net.h | 3 ++-
hw/net/virtio-net.c| 24
A SR-IOV VF cannot have a ROM BAR.
Co-developed-by: Yui Washizu
Signed-off-by: Akihiko Odaki
---
hw/pci/pci.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 67d8ae3f61..54d9e0f4cf 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2419,6 +2419,14 @@
This enables SR-IOV emulation on virtio-pci devices. It introduces a
property 'sriov-pf' to state that the device will be a VF, and it
will be paired with the PF identified with the property.
Currently this feature needs to be explicitly enabled by a subclass.
Co-developed-by: Yui Washizu
Signed-
pci-failover allows to create a device capable of failover without
relying on DeviceListener::hide_device(), which intrudes the
pci-device implementation from outside.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pci_device.h | 14 ++
hw/pci/pci.c| 43 +
A SR-IOV VF needs to use pcie_sriov_vf_register_bar() instead of
pci_register_bar().
Co-developed-by: Yui Washizu
Signed-off-by: Akihiko Odaki
---
hw/pci/msix.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index ab8869d9d0..3b94ce389f
This enables the SR-IO capability previously added to virtio-pci for
virtio-net-pci.
Buglink: https://issues.redhat.com/browse/RHEL-1216
Signed-off-by: Akihiko Odaki
---
hw/virtio/virtio-net-pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-n
Specifying VF device options will be useful to create VFs based on
conventional device emulation code which have user-configurable
options.
Signed-off-by: Akihiko Odaki
---
docs/pcie_sriov.txt | 2 +-
include/hw/pci/pcie_sriov.h | 13 ++--
hw/net/igb.c| 2 +-
hw/nvm
vfio determines if rombar is explicitly enabled by inspecting QDict.
Inspecting QDict is not nice because QDict is untyped and depends on the
details on the external interface.
Instead of inspecting QDict, inspect PCIDevice::rom_bar.
PCIDevice::rom_bar is changed to have -1 by the default to tell
qdev_device_new_from_qdict() can be used to create a device from QDict
without realizing it.
Signed-off-by: Akihiko Odaki
---
include/monitor/qdev.h | 2 ++
system/qdev-monitor.c | 23 ---
2 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/include/monitor/qdev.
It is no longer used.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pci_device.h | 2 +-
include/hw/qdev-core.h | 4
hw/core/qdev.c | 1 -
system/qdev-monitor.c | 12 +++-
4 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/include/hw/pci/pci
DeviceClass::hide() is a better alternative to
DeviceListener::hide_device() that does not need listener registration
and is contained in specific devices that need the hiding capability.
Signed-off-by: Akihiko Odaki
---
include/hw/qdev-core.h | 33 +++--
system/qdev-
Release VFs failed to realize just as we do in unregister_vfs().
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index 5ef8950940..3ec786d341 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_sr
hide() can be implemented to prevent creating a PCI device and get
device options.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pci_device.h | 2 ++
hw/pci/pci.c| 8
2 files changed, 10 insertions(+)
diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_devic
49 +++---
18 files changed, 442 insertions(+), 124 deletions(-)
---
base-commit: 4705fc0c8511d073bee4751c3c974aab2b10a970
change-id: 20231202-sriov-9402fb262be8
Best regards,
--
Akihiko Odaki
It is no longer used.
Signed-off-by: Akihiko Odaki
---
include/hw/qdev-core.h | 24
hw/core/qdev.c | 18 --
system/qdev-monitor.c | 9 -
3 files changed, 51 deletions(-)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index
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