Re: [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop

On 13/10/2023 15:11, Philippe Mathieu-Daudé wrote: Hi, This series add support for (async) FIFO on the transmit path of the PL011 UART. Since v2: - Added R-b tags - Addressed Richard comments on migration Since v1: - Restrict pl011_ops[] impl access_size, - Do not check transmitter is enabled

Re: [PATCH 11/11] qdev: Rework array properties based on list visitor

Kevin Wolf writes: > Am 22.09.2023 um 17:05 hat Markus Armbruster geschrieben: >> Kevin Wolf writes: >> >> > Until now, array properties are actually implemented with a hack that >> > uses multiple properties on the QOM level: a static "foo-len" property >> > and after it is set, dynamically cr

Re: [PATCH 00/85] target/sparc: Convert to decodetree

On 13/10/2023 22:27, Richard Henderson wrote: While doing some other testing the other day, I noticed my sparc64 chroot running particularly slowly. I think I know what the problem is there, but fixing that was going to be particularly ugly with the existing sparc translator. So I've converted

[PATCH v12 04/18] target/arm: Use GDBFeature for dynamic XML

In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki Acked-by: Richard Henderson --- target/arm/cpu.h | 21 +++ target/arm/internal

[PATCH v12 09/18] gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cb

Align the parameters of gdb_get_reg_cb and gdb_set_reg_cb with the gdb_read_register and gdb_write_register members of CPUClass to allow to unify the logic to access registers of the core and coprocessors in the future. Signed-off-by: Akihiko Odaki --- include/exec/gdbstub.h | 4 +- target

[PATCH v12 08/18] gdbstub: Use GDBFeature for GDBRegisterState

Simplify GDBRegisterState by replacing num_regs and xml members with one member that points to GDBFeature. Signed-off-by: Akihiko Odaki Reviewed-by: Alex Bennée --- gdbstub/gdbstub.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/gdbstub/gdbstub.c b/gdbstub/g

[PATCH v12 15/18] cpu: Call plugin hooks only when ready

The initialization and exit hooks will not affect the state of vCPU outside TCG context, but they may depend on the state of vCPU. Therefore, it's better to call plugin hooks after the vCPU state is fully initialized and before it gets uninitialized. Signed-off-by: Akihiko Odaki --- cpu-target.c

[PATCH v12 16/18] plugins: Use different helpers when reading registers

This avoids optimizations incompatible when reading registers. Signed-off-by: Akihiko Odaki --- accel/tcg/plugin-helpers.h | 3 ++- include/exec/plugin-gen.h | 4 ++-- include/hw/core/cpu.h | 4 ++-- include/qemu/plugin.h | 3 +++ plugins/plugin.h | 5 +++-- accel/tcg/p

[PATCH v12 13/18] gdbstub: Add members to identify registers to GDBFeature

These members will be used to help plugins to identify registers. The added members in instances of GDBFeature dynamically generated by CPUs will be filled in later changes. Signed-off-by: Akihiko Odaki --- include/exec/gdbstub.h | 3 +++ gdbstub/gdbstub.c | 10 -- target/riscv/g

[PATCH v12 17/18] plugins: Allow to read registers

It is based on GDB protocol to ensure interface stability. The timing of the vcpu init hook is also changed so that the hook will get called after GDB features are initialized. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1706 Signed-off-by: Akihiko Odaki --- include/qemu/qemu-plugin

[PATCH v12 10/18] gdbstub: Simplify XML lookup

Now we know all instances of GDBFeature that is used in CPU so we can traverse them to find XML. This removes the need for a CPU-specific lookup function for dynamic XMLs. Signed-off-by: Akihiko Odaki --- include/exec/gdbstub.h | 2 + gdbstub/gdbstub.c | 85 +++-

[PATCH v12 12/18] hw/core/cpu: Remove gdb_get_dynamic_xml member

This function is no longer used. Signed-off-by: Akihiko Odaki --- include/hw/core/cpu.h | 4 target/arm/cpu.h | 6 -- target/ppc/cpu.h | 1 - target/arm/cpu.c | 1 - target/arm/gdbstub.c | 18 -- target/ppc/cpu_init.c | 3 --- target/ppc/gdbstub.c |

[PATCH v12 07/18] gdbstub: Use GDBFeature for gdb_register_coprocessor

This is a tree-wide change to introduce GDBFeature parameter to gdb_register_coprocessor(). The new parameter just replaces num_regs and xml parameters for now. GDBFeature will be utilized to simplify XML lookup in a following change. Signed-off-by: Akihiko Odaki Acked-by: Alex Bennée --- inclu

[PATCH v12 18/18] contrib/plugins: Allow to log registers

This demonstrates how a register can be read from a plugin. Signed-off-by: Akihiko Odaki --- docs/devel/tcg-plugins.rst | 10 +++- contrib/plugins/execlog.c | 120 +++-- 2 files changed, 97 insertions(+), 33 deletions(-) diff --git a/docs/devel/tcg-plugins.rst

[PATCH v12 14/18] gdbstub: Expose functions to read registers

gdb_find_feature() and gdb_find_feature_register() find registers. gdb_read_register() actually reads registers. Signed-off-by: Akihiko Odaki --- include/exec/gdbstub.h | 5 + gdbstub/gdbstub.c | 31 ++- 2 files changed, 35 insertions(+), 1 deletion(-) diff

[PATCH v12 05/18] target/ppc: Use GDBFeature for dynamic XML

In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki Reviewed-by: Richard Henderson --- target/ppc/cpu-qom.h | 4 ++-- target/ppc/cpu.h

[PATCH v12 02/18] gdbstub: Introduce gdb_find_static_feature()

This function is useful to determine the number of registers exposed to GDB from the XML name. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- include/exec/gdbstub.h | 2 ++ gdbstub/gdbstub.c | 13 +

[PATCH v12 11/18] gdbstub: Infer number of core registers from XML

GDBFeature has the num_regs member so use it where applicable to remove magic numbers. Signed-off-by: Akihiko Odaki --- include/hw/core/cpu.h | 3 ++- target/s390x/cpu.h | 2 -- gdbstub/gdbstub.c | 5 - target/arm/cpu.c| 1 - target/arm/cpu64.c | 1 - target/avr/cpu

[PATCH v12 06/18] target/riscv: Use GDBFeature for dynamic XML

In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki --- target/riscv/cpu.h | 5 +-- target/riscv/cpu.c | 4 +-- target/riscv/gdbstub

[PATCH v12 01/18] gdbstub: Add num_regs member to GDBFeature

Currently the number of registers exposed to GDB is written as magic numbers in code. Derive the number of registers GDB actually see from XML files to replace the magic numbers in code later. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- include

[PATCH v12 03/18] gdbstub: Introduce GDBFeatureBuilder

GDBFeatureBuilder unifies the logic to generate dynamic GDBFeature. Signed-off-by: Akihiko Odaki Reviewed-by: Richard Henderson --- include/exec/gdbstub.h | 20 ++ gdbstub/gdbstub.c | 59 ++ 2 files changed, 79 insertions(+) diff --git a

[PATCH v12 00/18] plugins: Allow to read registers

Based-on: <20231014033545.15220-1-akihiko.od...@daynix.com> ("[PATCH v2 0/3] gdbstub and TCG plugin improvements") I and other people in the University of Tokyo, where I research processor design, found TCG plugins are very useful for processor design exploration. The feature we find missing is t

[PATCH v2 0/3] gdbstub and TCG plugin improvements

This series extracts fixes and refactorings that can be applied independently from "[PATCH v9 00/23] plugins: Allow to read registers". The patch "target/riscv: Move MISA limits to class" was replaced with patch "target/riscv: Move misa_mxl_max to class" since I found instances may have different

[PATCH v2 2/3] target/riscv: Initialize gdb_core_xml_file only once

gdb_core_xml_file was assigned each time a CPU is instantiated before this change. Signed-off-by: Akihiko Odaki --- target/riscv/cpu.c | 5 + target/riscv/tcg/tcg-cpu.c | 4 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c in

[PATCH v2 3/3] plugins: Remove an extra parameter

copy_call() has an unused parameter so remove it. Signed-off-by: Akihiko Odaki --- accel/tcg/plugin-gen.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 39b3c9351f..78b331b251 100644 --- a/accel/tcg/plugin-gen.c

[PATCH v2 1/3] target/riscv: Do not allow MXL_RV32 for TARGET_RISCV64

TARGET_RISCV64 does not have riscv-32bit-cpu.xml so it shouldn't accept MXL_RV32. Signed-off-by: Akihiko Odaki --- target/riscv/tcg/tcg-cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index a28918ab30..e0cbc56320

Re: [RFC PATCH 10/78] hw/ide/atapi.c: add fallthrough pseudo-keyword

On Fri, Oct 13, 2023 at 3:50 AM Emmanouil Pitsidianakis wrote: > > In preparation of raising -Wimplicit-fallthrough to 5, replace all > fall-through comments with the fallthrough attribute pseudo-keyword. > > Signed-off-by: Emmanouil Pitsidianakis > --- > hw/ide/atapi.c | 1 + > 1 file changed,

[PATCH 37/85] target/sparc: Move FLUSH, SAVE, RESTORE to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 target/sparc/translate.c | 35 +-- 2 files changed, 29 insertions(+), 10 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d8ebebce53..b7b60f9919 100644

[PATCH 79/85] target/sparc: Move FMOVq, FNEGq, FABSq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 + target/sparc/translate.c | 138 +- 2 files changed, 48 insertions(+), 93 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index f749e23ae6..8f953a6af6 10064

[PATCH 41/85] target/sparc: Split out ldst functions with asi pre-computed

As an intermediate step in decodetree conversion, create new functions passing in DisasASI and not insn. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 215 ++- 1 file changed, 123 insertions(+), 92 deletions(-) diff --git a/target/sparc/tran

[PATCH 49/85] target/sparc: Split out fp ldst functions with asi precomputed

Take the operation size from the MemOp instead of a separate parameter. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 136 ++- 1 file changed, 78 insertions(+), 58 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c

[PATCH 54/85] target/sparc: Move EDGE* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 ++- target/sparc/translate.c | 272 -- 2 files changed, 134 insertions(+), 160 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 185bcadab7..b4bbdd43ec 1

[PATCH 76/85] target/sparc: Move FqTOd, FqTOx to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 49 +-- 2 files changed, 29 insertions(+), 22 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index f38ea9b343..f30f2bc800 10064

[PATCH 61/85] target/sparc: Move gen_ne_fop_FFF insns to decodetree

Move FANDNOT1s, FANDNOT2s, FANDs, FNANDs, FNORs, FORNOT1s, FORNOT2s, FORs, FPADD16s, FPADD32s, FPSUB16s, FPSUB32s, FXNORs, FXORs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 16 ++ target/sparc/translate.c | 116 ++ 2 files changed,

[PATCH 05/85] target/sparc: Define AM_CHECK for sparc32

Define as false, which allows some ifdef removal. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 21 + 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 59e5289693..da6503e101 100644 --- a

[PATCH 60/85] target/sparc: Use tcg_gen_vec_{add,sub}*

Replace the local helpers for the same integer operations. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 12 target/sparc/translate.c | 15 +- target/sparc/vis_helper.c | 59 --- 3 files changed, 7 insertions(+), 79 deletio

[PATCH 45/85] target/sparc: Move LDSTUB, LDSTUBA to decodetree

Remove gen_ldstub_asi. Rename gen_ldstub_asi0 to gen_ldstub_asi. Merge gen_ldstub into gen_ldstub_asi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 target/sparc/translate.c | 46 +++ 2 files changed, 26 insertions(+), 24 deletions

[PATCH 68/85] target/sparc: Move gen_fop_FFF insns to decodetree

Move FADDs, FSUBs, FMULs, FDIVs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 54 +++ 2 files changed, 31 insertions(+), 27 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode

[PATCH 40/85] target/sparc: Drop ifdef around get_asi and friends

Mark some of the functions as unused, temporarily. Fix up some tl vs i64 issues revealed in the process. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 187 +++ 1 file changed, 70 insertions(+), 117 deletions(-) diff --git a/target/sparc/tran

[PATCH 83/85] target/sparc: Move FPACK16, FPACKFIX to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 55 --- 2 files changed, 42 insertions(+), 15 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 9333c8ba3b..14daaa4a92 10064

[PATCH 55/85] target/sparc: Move ARRAY* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 54 --- 2 files changed, 37 insertions(+), 21 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index b4bbdd43ec..e8d49de888 1006

[PATCH 59/85] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 7 target/sparc/translate.c | 73 +-- 2 files changed, 38 insertions(+), 42 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 2072930bd7..362aa00300 100

[PATCH 48/85] target/sparc: Move PREFETCH, PREFETCHA to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 8 ++-- target/sparc/translate.c | 14 ++ 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 1a641248ce..c032b81c16 100644 --- a/target/sparc

[PATCH 77/85] target/sparc: Move FiTOq, FsTOq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 44 +-- 2 files changed, 26 insertions(+), 20 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index f30f2bc800..f0a6abb170 10064

[PATCH 53/85] target/sparc: Merge LDFSR, LDXFSR implementations

Combine the helper to a single set_fsr(). Perform the mask and merge inline. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 3 +-- target/sparc/fop_helper.c | 17 ++-- target/sparc/translate.c | 42 --- 3 files changed, 16 inser

[PATCH 43/85] target/sparc: Move simple integer load/store to decodetree

Move LDUW, LDUB, LDUH, LDD, LDSW, LDSB, LDSH, LDX, STW, STB, STH, STD, STX. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 + target/sparc/translate.c | 196 +++--- 2 files changed, 142 insertions(+), 76 deletions(-) diff --git a/target

[PATCH 56/85] target/sparc: Move ADDRALIGN* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 56 ++- 2 files changed, 34 insertions(+), 25 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index e8d49de888..f6ac8672c8 1006

[PATCH 81/85] target/sparc: Convert FCMP, FCMPE to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 7 ++ target/sparc/translate.c | 145 +++--- 2 files changed, 96 insertions(+), 56 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 5e8d456ab2..c5d6f46737 1006

[PATCH 64/85] target/sparc: Move gen_gsr_fop_DDD insns to decodetree

Move FPACK32, FALIGNDATA, BSHUFFLE. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 101 -- 2 files changed, 55 insertions(+), 49 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.dec

[PATCH 26/85] target/sparc: Move MULX to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 6 +- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 87108da5da..d907a4a69f 100644 --- a/target/sparc/insns.decode +++

[PATCH 39/85] target/sparc: Split out resolve_asi

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 25 + 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index e652bdcac2..42a26671f1 100644 --- a/target/sparc/translate.c +++ b/target/sparc/tr

[PATCH 84/85] target/sparc: Convert FZERO, FONE to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 5 +++ target/sparc/translate.c | 69 +++ 2 files changed, 45 insertions(+), 29 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 14daaa4a92..0c3d6071ff 1006

[PATCH 82/85] target/sparc: Move FPCMP* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 9 target/sparc/translate.c | 94 +-- 2 files changed, 50 insertions(+), 53 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index c5d6f46737..9333c8ba3b 100

[PATCH 50/85] target/sparc: Move simple fp load/store to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 19 target/sparc/translate.c | 194 ++ 2 files changed, 113 insertions(+), 100 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index c032b81c16..00ddc7a93b

[PATCH 47/85] target/sparc: Move CASA, CASXA to decodetree

Remove gen_cas_asi, gen_casx_asi. Rename gen_cas_asi0 to gen_cas_asi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 7 target/sparc/translate.c | 71 +++ 2 files changed, 35 insertions(+), 43 deletions(-) diff --git a/target/sparc/in

[PATCH 01/85] target/sparc: Set TCG_GUEST_DEFAULT_MO

Always use TSO, per the Oracle 2015 manual. This is slightly less restrictive than the TCG_MO_ALL default, and happens to match the i386 model, which will eliminate a few extra barriers on that host. Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 23 +++ 1 file cha

[PATCH 57/85] target/sparc: Move BMASK to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 22 +- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index f6ac8672c8..1418e45172 100644 --- a/target/spa

[PATCH 80/85] target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 12 +++ target/sparc/translate.c | 189 +++--- 2 files changed, 88 insertions(+), 113 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 8f953a6af6..5e8d456ab2 10

[PATCH 51/85] target/sparc: Move asi fp load/store to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 51 ++-- target/sparc/translate.c | 169 -- 2 files changed, 79 insertions(+), 141 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 00ddc7a93b..b354

[PATCH 85/85] target/sparc: Remove disas_sparc_legacy

All instructions are now converted. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 145 +-- 1 file changed, 1 insertion(+), 144 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index ffdd600353..b7f98c7e18 100644

[PATCH 75/85] target/sparc: Move FqTOs, FqTOi to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 48 +-- 2 files changed, 28 insertions(+), 22 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 4368ac25a9..f38ea9b343 10064

[PATCH 34/85] target/sparc: Move POPC to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 54 +-- 2 files changed, 8 insertions(+), 47 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 1f6dfa210f..7ec1518b54 100644

[PATCH 63/85] target/sparc: Move PDIST to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 41 +-- 2 files changed, 23 insertions(+), 19 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 576349a719..12db108a31 100644

[PATCH 42/85] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX

Perform one atomic 16-byte operation. The atomicity is required for the LDTXA instructions. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 48 +--- 1 file changed, 40 insertions(+), 8 deletions(-) diff --git a/target/sparc/translate.c b/targe

[PATCH 67/85] target/sparc: Move FSQRTq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 39 +++ 2 files changed, 24 insertions(+), 16 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d3badc6db3..31d84f0cb3 100644

[PATCH 78/85] target/sparc: Move FdTOq, FxTOq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 47 ++- 2 files changed, 28 insertions(+), 21 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index f0a6abb170..f749e23ae6 10064

[PATCH 71/85] target/sparc: Move FSMULD to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 43 +-- 2 files changed, 24 insertions(+), 20 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 036e2b01d4..a52fac9352 100644

[PATCH 32/85] target/sparc: Move SLL, SRL, SRA to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 14 +++ target/sparc/translate.c | 182 -- 2 files changed, 92 insertions(+), 104 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 2aae7d9514..597519b99b 10

[PATCH 58/85] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 13 target/sparc/translate.c | 64 --- 2 files changed, 39 insertions(+), 38 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 1418e45172..2072930bd7

[PATCH 74/85] target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree

Note that gen_ne_fop_DF was incorrectly named and does pass env. The two sets of helpers should have been unified. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 67 --- 2 files changed, 30 insertions(+), 40

[PATCH 66/85] target/sparc: Move gen_fop_DD insns to decodetree

Move FSQRTd, FxTOd, FdTOx. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 50 +-- 2 files changed, 30 insertions(+), 23 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PATCH 20/85] target/sparc: Move WRASR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 31 target/sparc/translate.c | 353 +- 2 files changed, 225 insertions(+), 159 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 9142e0e2f0..c253c6b1c1

[PATCH 46/85] target/sparc: Move SWAP, SWAPA to decodetree

Remove gen_swap_asi. Rename gen_swap_asi0 to gen_swap_asi. Merge gen_swap into gen_swap_asi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 58 +-- 2 files changed, 29 insertions(+), 33 deletions(-) diff -

[PATCH 70/85] target/sparc: Move gen_fop_QQQ insns to decodetree

Move FADDq, FSUBq, FMULq, FDIVq. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 52 +++ 2 files changed, 30 insertions(+), 26 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode

[PATCH 65/85] target/sparc: Move gen_fop_FF insns to decodetree

Move FSQRTs, FiTOs, FsTOi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 47 --- 2 files changed, 27 insertions(+), 23 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PATCH 25/85] target/sparc: Move ADDC to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 41 +++ 2 files changed, 39 insertions(+), 4 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index a95f682fa7..87108da5da 100644

[PATCH 21/85] target/sparc: Move WRPSR, SAVED, RESTORED to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 10 +++ target/sparc/translate.c | 61 ++- 2 files changed, 38 insertions(+), 33 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index c253c6b1c1..db5a899bdf

[PATCH 72/85] target/sparc: Move FDMULQ to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 41 +-- 2 files changed, 23 insertions(+), 19 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index a52fac9352..4063695cd9 100644

[PATCH 62/85] target/sparc: Move gen_ne_fop_DDD insns to decodetree

Move FMUL8x16, FMUL8x16AU, FMUL8x16AL, FMUL8SUx16, FMUL8ULx16, FMULD8SUx16, FMULD8ULx16, FPMERGE, FEXPAND, FANDNOT1d, FANDNOT2d, FANDd, FNANDd, FNORd, FORNOT1d, FORNOT2d, FORd, FPADD16d, FPADD32d, FPSUB16d, FPSUB32d, FXNORd, FXORd. Signed-off-by: Richard Henderson --- target/sparc/insns.decode |

[PATCH 69/85] target/sparc: Move gen_fop_DDD insns to decodetree

Move FADDd, FSUBd, FMULd, FDIVd. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 55 --- 2 files changed, 32 insertions(+), 27 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode

[PATCH 44/85] target/sparc: Move asi integer load/store to decodetree

Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA, STBA, STDA, STHA, STWA, STXA. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 31 + target/sparc/translate.c | 128 +- 2 files changed, 48 insertions(+), 111 deletions(-) di

[PATCH 73/85] target/sparc: Move gen_fop_FD insns to decodetree

Move FdTOs, FdTOi, FxTOs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 51 +-- 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PATCH 23/85] target/sparc: Move WRTBR, WRHPR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 9 target/sparc/translate.c | 110 +++--- 2 files changed, 65 insertions(+), 54 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index b61926d278..0425764973 10

[PATCH 13/85] target/sparc: Pass DisasCompare to advance_jump_cond

Fold the condition into the branch or movcond when possible. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 32 +--- 1 file changed, 13 insertions(+), 19 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index ee8c0450aa..

[PATCH 33/85] target/sparc: Move MOVcc, MOVR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 ++ target/sparc/translate.c | 103 +- 2 files changed, 51 insertions(+), 56 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 597519b99b..1f6dfa210f 1006

[PATCH 29/85] target/sparc: Move UDIVX, SDIVX to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 24 ++-- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 69b3e82ae9..d5f5dfff14 100644 --- a/target/

[PATCH 52/85] target/sparc: Move LDFSR, STFSR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 + target/sparc/translate.c | 152 +++--- 2 files changed, 64 insertions(+), 92 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index b354bb97c4..185bcadab7 10064

[PATCH 02/85] configs: Enable MTTCG for sparc, sparc64

This will be of small comfort to sparc64, because both sun4u and sun4v board models force max_cpus = 1. But it does enable actual smp for sparc32 sun4m. Signed-off-by: Richard Henderson --- configs/targets/sparc-softmmu.mak | 1 + configs/targets/sparc64-softmmu.mak | 1 + 2 files changed, 2 i

[PATCH 09/85] target/sparc: Move FBPfcc and FBfcc to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 ++ target/sparc/translate.c | 105 +++--- 2 files changed, 46 insertions(+), 63 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 838f4cdb1d..9ab3f2eb82 1006

[PATCH 14/85] target/sparc: Move SETHI to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 6 + target/sparc/translate.c | 50 --- 2 files changed, 21 insertions(+), 35 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 9ab3f2eb82..f6f5401b10 10

[PATCH 04/85] target/sparc: Add decodetree infrastructure

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 5 +++ target/sparc/translate.c | 69 ++- target/sparc/meson.build | 3 ++ 3 files changed, 55 insertions(+), 22 deletions(-) create mode 100644 target/sparc/insns.decode diff --git a/target

[PATCH 16/85] target/sparc: Move RDASR, STBAR, MEMBAR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 +++ target/sparc/translate.c | 360 -- 2 files changed, 253 insertions(+), 129 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 2945575268..8dc45f5abc 1

[PATCH 35/85] target/sparc: Convert remaining v8 coproc insns to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 11 +++ target/sparc/translate.c | 32 ++-- 2 files changed, 17 insertions(+), 26 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 7ec1518b54..a124fdeaac 100

[PATCH 12/85] target/sparc: Merge gen_branch_[an] with only caller

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 73 +--- 1 file changed, 30 insertions(+), 43 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index ecb485c305..ee8c0450aa 100644 --- a/target/sparc/translate.c +++ b

[PATCH 30/85] target/sparc: Move UDIV, SDIV to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 target/sparc/translate.c | 43 +++ 2 files changed, 20 insertions(+), 27 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d5f5dfff14..35e7905bfe 100

[PATCH 28/85] target/sparc: Move SUBC to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 28 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 9cd89cf03b..69b3e82ae9 100644 --- a/targ

[PATCH 18/85] target/sparc: Move RDWIM, RDPR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 +++ target/sparc/translate.c | 360 +++--- 2 files changed, 244 insertions(+), 138 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d3ca9061ce..05329803f4 1

[PATCH 24/85] target/sparc: Move basic arithmetic to decodetree

Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 18 target/sparc/translate.c | 183 +- 2 files changed, 98 insertions(+), 103 deletions(-) diff --git a/target/sparc/insns.decode b/target/sp

[PATCH 38/85] target/sparc: Move DONE, RETRY to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 99 +++ 2 files changed, 40 insertions(+), 62 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index b7b60f9919..9f17a11dd0 10064

[PATCH 00/85] target/sparc: Convert to decodetree

While doing some other testing the other day, I noticed my sparc64 chroot running particularly slowly. I think I know what the problem is there, but fixing that was going to be particularly ugly with the existing sparc translator. So I've converted the translator to something more managable. :-)

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