On 9/26/23 18:04, Salil Mehta via wrote:
Factor out CPU properties code common for {hot,cold}-plugged CPUs. This allows
code reuse.
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 220 ++
include/hw/arm/virt.h | 4 +
2 files changed, 140 i
With commit d4c19cde("virtio-serial: add missing virtio_detach_element() call"),
when virtio serial is throttled and closed by host, port->elem should be
discard with virtqueue_push,
otherwise virtqueue will not rewind, guest will blocked finally and cannot
write anymore data.
It can be reproduc
When explicitly booting a multiple vcpus vm with "-cpu +ht", it gets
warning of
warning: host doesn't support requested feature: CPUID.01H:EDX.ht [bit 28]
Make CPUID_HT as supported unconditionally can resolve the warning.
However it introduces another issue that it also expose CPUID_HT to
gues
Philippe Mathieu-Daudé writes:
[...]
> If we have to clean that for -Wshadow=global, I'm tempted to rename
> the typedef as 'vaddr_t' and keep the 'vaddr' variable names.
POSIX reserves suffix _t, see
https://pubs.opengroup.org/onlinepubs/9699919799/functions/V2_chap02.html#tag_15_02_02
Do we
On 10/10/2023 2:34 AM, Fabiano Rosas wrote:
Het Gala writes:
This is v12 patchset of modified 'migrate' and 'migrate-incoming' QAPI design
for upstream review.
Would like to thank all the maintainers that actively participated in the v11
patchset discussion and gave insightful suggestions to
On 10/10/2023 9:02 AM, Tina Zhang wrote:
Hi,
On 8/18/23 17:49, Xiaoyao Li wrote:
According to Chapter "CPUID Virtualization" in TDX module spec, CPUID
bits of TD can be classified into 6 types:
1 | As configured | configu
On 9/10/23 22:53, Brian Cain wrote:
On 9/10/23 08:09, Philippe Mathieu-Daudé wrote:
On 6/10/23 00:22, Brian Cain wrote:
The typedef `vaddr` is shadowed by `vaddr` identifiers, so we rename the
identifiers to avoid shadowing the type name.
This one surprises me, since we have other occurences:
On 10/9/2023 8:05 PM, Fabiano Rosas wrote:
Het Gala writes:
On 10/4/2023 8:55 PM, Fabiano Rosas wrote:
Het Gala writes:
Integrate MigrateChannelList with all transport backends
(socket, exec and rdma) for both src and dest migration
endpoints for hmp migration.
Suggested-by: Aravind Ret
On 10/9/2023 7:59 PM, Fabiano Rosas wrote:
Het Gala writes:
On 10/4/2023 8:51 PM, Fabiano Rosas wrote:
Het Gala writes:
Integrate MigrateChannelList with all transport backends
(socket, exec and rdma) for both src and dest migration
endpoints for qmp migration.
For current series, limit
Hi Thomas,
On 9/10/23 23:00, Thomas Weißschuh wrote:
Passing the struct around explicitly makes the control-flow more
obvious.
Signed-off-by: Thomas Weißschuh
---
hw/loongarch/virt.c | 50 -
1 file changed, 27 insertions(+), 23 deletions(-)
-s
From: Jeuk Kim
This patch fixes invalid ufs register fields.
This fixes an issue reported by Bin Meng that
caused ufs to fail over riscv.
Signed-off-by: Jeuk Kim
---
include/block/ufs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/block/ufs.h b/include/block/
Philippe Mathieu-Daudé writes:
> On 9/10/23 08:09, Philippe Mathieu-Daudé wrote:
>> Hi Brian,
>> On 6/10/23 00:22, Brian Cain wrote:
>>> The typedef `vaddr` is shadowed by `vaddr` identifiers, so we rename the
>>> identifiers to avoid shadowing the type name.
>> This one surprises me, since we ha
On 10/9/2023 5:13 PM, Hanna Czenczek wrote:
External email: Use caution opening links or attachments
On 09.10.23 11:07, Hanna Czenczek wrote:
On 09.10.23 10:21, Hanna Czenczek wrote:
On 07.10.23 04:22, Yajun Wu wrote:
[...]
The main motivation of adding VHOST_USER_SET_STATUS is to let
ba
Hi, All.
This series adds save/restore sigcontext.
We use extctx_flags to choces which sigcontext need save/restore.
The extctx_flags default value is EXTCTX_FLAGS_FPU, we need
save/restore fpu context.
After a LSX/LASX instruction is execed, extctx_flags value change to
EXTCTX_FLAGS_LSX/LASX,
Signed-off-by: Song Gao
---
linux-user/loongarch64/signal.c | 107 ++--
1 file changed, 87 insertions(+), 20 deletions(-)
diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
index 277e9f5757..4b09e50a5f 100644
--- a/linux-user/loongarch64/si
Signed-off-by: Song Gao
---
target/loongarch/insn_trans/trans_vec.c.inc | 12
target/loongarch/internals.h| 2 ++
2 files changed, 14 insertions(+)
diff --git a/target/loongarch/insn_trans/trans_vec.c.inc
b/target/loongarch/insn_trans/trans_vec.c.inc
index 98f856bb
See:
https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/signal.c
The kernel setup_sigcontext() set end context size 0.
Signed-off-by: Song Gao
---
linux-user/loongarch64/signal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/loongarch64/signal
See:
https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/signal.c
The alloc size is sizeof(struct target_fpu_context).
Signed-off-by: Song Gao
---
linux-user/loongarch64/signal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/loongarch64/signal.c
extctx_flags only for user-mode, and the default value is
EXTCTX_FLAGS_FPU, We only need save/restore fpu context,
After a LSX or LASX instruction is execed, the value change to
EXTCTX_FLAGS_LSX/LASX, and we need save/restore lsx/lasx
context. So if the binary no LSX/LASX instruction We only need
Signed-off-by: Song Gao
---
linux-user/loongarch64/signal.c | 67 ++---
1 file changed, 62 insertions(+), 5 deletions(-)
diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
index 4b09e50a5f..e5b7688a2e 100644
--- a/linux-user/loongarch64/sig
On 10/9/2023 6:28 PM, German Maglione wrote:
External email: Use caution opening links or attachments
On Sat, Oct 7, 2023 at 4:23 AM Yajun Wu wrote:
On 10/6/2023 6:34 PM, Michael S. Tsirkin wrote:
External email: Use caution opening links or attachments
On Fri, Oct 06, 2023 at 11:47:55A
vhost requires eBPF for RSS. Even when eBPF is not available, virtio-net
reported RSS availability, and raised a warning only after the
guest requested RSS, and the guest could not know that RSS is not
available.
Check RSS availability during device realization and return an error
if RSS is reques
calculate_rss_hash() was using hash value 0 to tell if it calculated
a hash, but the hash value may be 0 on a rare occasion. Have a
distinct bool value for correctness.
Fixes: f3fa412de2 ("ebpf: Added eBPF RSS program.")
Signed-off-by: Akihiko Odaki
---
tools/ebpf/rss.bpf.c | 20 +++-
This series contains fixes and improvements for virtio-net RSS and hash
reporting feature.
V1 -> V2:
Added patch "ebpf: Fix RSS error handling".
Akihiko Odaki (7):
tap: Fix virtio-net header buffer size
virtio-net: Copy header only when necessary
virtio-net: Disable RSS on reset
virtio-
RSS is disabled by default.
Fixes: 590790297c ("virtio-net: implement RSS configuration command")
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 70 +++--
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/
The largest possible virtio-net header is struct virtio_net_hdr_v1_hash.
Fixes: fbbdbddec0 ("tap: allow extended virtio header with hash info")
Signed-off-by: Akihiko Odaki
---
net/tap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/net/tap.c b/net/tap.c
index c6639d9f2
The code to attach or detach the eBPF program to RSS were duplicated so
unify them into one function to save some code.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 90 ++---
1 file changed, 36 insertions(+), 54 deletions(-)
diff --git a/hw/net/
It is necessary to copy the header only for byte swapping. Worse, when
byte swapping is not needed, the header can be larger than the buffer
due to VIRTIO_NET_F_HASH_REPORT, which results in buffer overflow.
Copy the header only when byte swapping is needed.
Fixes: e22f0603fb ("virtio-net: refere
Even if eBPF is not available, virtio-net can perform RSS on the
user-space if vhost is disabled although such a configuration results in
a warning. If vhost is enabled, the configuration will be rejected when
realizing the device. Therefore, VIRTIO_NET_F_RSS should not be cleared
even if eBPF is n
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Thomas,
Thanks for reporting this issue.
It is the problem of QEMU for LoongArch system, QEMU does not support
booting vmlinux with elf format without UEFI bios now. We will add
support to boot vmlinux directly on QEMU LoongArch side.
Regards
Bibo Mao
在 2023/10/10 上午4:13, Thomas Weißschuh 写
From: Andrei Gudkov
Currently query-dirty-rate uses QEMU_CLOCK_REALTIME as
the source for start-time field. This translates to
clock_gettime(CLOCK_MONOTONIC), i.e. number of seconds
since host boot. This is not very useful. The only
reasonable use case of start-time I can imagine is to
check whet
The following changes since commit 2f3913f4b2ad74baeb5a6f1d36efbd9ecdf1057d:
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu
into staging (2023-10-05 09:01:01 -0400)
are available in the Git repository at:
https://github.com/newfriday/qemu.git
tags/dirtylimit-d
From: Andrei Gudkov
This patch allows to measure dirty page rate for
sub-second intervals of time. An optional argument is
introduced -- calc-time-unit. For example:
{"execute": "calc-dirty-rate", "arguments":
{"calc-time": 500, "calc-time-unit": "millisecond"} }
Millisecond granularity allows
On Mon, 9 Oct 2023, Stefano Stabellini wrote:
> On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> > From: Juergen Gross
> >
> > Add a memory region which can be used to automatically map granted
> > memory. It is starting at 0x8000ULL in order to be able to
> > distinguish it from normal RA
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> Enable grant ram mapping support for Xenpvh machine on ARM.
>
> Signed-off-by: Vikram Garhwal
Reviewed-by: Stefano Stabellini
> ---
> hw/arm/xen_arm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.c
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> From: Juergen Gross
>
> Add the callbacks for mapping/unmapping guest memory via grants to the
> special grant memory region.
>
> Signed-off-by: Juergen Gross
> Signed-off-by: Vikram Garhwal
This looks good. We need to add a check to make sure we do
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> From: Juergen Gross
>
> In order to support mapping and unmapping guest memory dynamically to
> and from qemu during address_space_[un]map() operations add the map()
> and unmap() callbacks to MemoryRegionOps.
>
> Those will be used e.g. for Xen grant
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> From: Juergen Gross
>
> Today xen_ram_addr_from_mapcache() will either abort() or return 0 in
> case it can't find a matching entry for a pointer value. Both cases
> are bad, so change that to return an invalid address instead.
>
> Signed-off-by: Juerg
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> From: Juergen Gross
>
> qemu_map_ram_ptr() and qemu_ram_ptr_length() share quite some code, so
> modify qemu_ram_ptr_length() a little bit and use it for
> qemu_map_ram_ptr(), too.
>
> Signed-off-by: Juergen Gross
> Signed-off-by: Vikram Garhwal
Thi
On Mon, Oct 9, 2023 at 12:11 AM Marc-André Lureau <
marcandre.lur...@redhat.com> wrote:
> On Fri, Oct 6, 2023 at 5:09 AM Gurchetan Singh
> wrote:
> >
> > This adds initial support for gfxstream and cross-domain. Both
> > features rely on virtio-gpu blob resources and context types, which
> > are
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> From: Juergen Gross
>
> Add a memory region which can be used to automatically map granted
> memory. It is starting at 0x8000ULL in order to be able to
> distinguish it from normal RAM.
>
> For this reason the xen.ram memory region is expan
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 09/10/2023 23:23, BALATON Zoltan wrote:
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 08/10/2023 12:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The initial value for BARs we
On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> From: Juergen Gross
>
> Virtio devices should never be unplugged at boot time, as they are
> similar to pci passthrough devices.
>
> Signed-off-by: Juergen Gross
> Signed-off-by: Vikram Garhwal
> ---
> hw/i386/xen/xen_platform.c | 8 +++-
> 1 fi
On 09/10/2023 23:23, BALATON Zoltan wrote:
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 08/10/2023 12:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 09/10/2023 22:57, BALATON Zoltan wrote:
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 08/10/2023 19:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The Articia S is a generic chi
On 09/10/2023 22:57, BALATON Zoltan wrote:
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 08/10/2023 19:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The Articia S is a generic chipset supporting several different CPUs
that
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 08/10/2023 12:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because
Hello Cedric,
Thanks for the review.
On 9/11/23 07:19, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive ac
On Mon, 9 Oct 2023, Mark Cave-Ayland wrote:
On 08/10/2023 19:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The Articia S is a generic chipset supporting several different CPUs
that were used on some PPC boards. This is a minim
On 09/10/2023 10:24, Philippe Mathieu-Daudé wrote:
Fix:
target/sparc/translate.c:2823:66: error: declaration shadows a variable in
the global scope [-Werror,-Wshadow]
static void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_env tcg_env)
On 08/10/2023 19:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The Articia S is a generic chipset supporting several different CPUs
that were used on some PPC boards. This is a minimal emulation of the
parts needed for emulati
On 08/10/2023 12:08, BALATON Zoltan wrote:
On Sun, 8 Oct 2023, Mark Cave-Ayland wrote:
On 05/10/2023 23:13, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because PCI code resets
BARs after calling device res
On Mon, 9 Oct 2023 13:30:48 +0100
Jonathan Cameron wrote:
> On Sun, 8 Oct 2023 01:47:40 +0530
> wrote:
>
> > From: Ankit Agrawal
> >
> > NVIDIA GPU's support MIG (Mult-Instance GPUs) feature [1], which allows
> > partitioning of the GPU device resources (including device memory) into
> > seve
Het Gala writes:
> Integrate MigrateChannelList with all transport backends
> (socket, exec and rdma) for both src and dest migration
> endpoints for hmp migration.
>
> Suggested-by: Aravind Retnakaran
> Signed-off-by: Het Gala
> ---
> migration/migration-hmp-cmds.c | 15 +--
> mig
Hello Glenn,
On 10/5/23 23:10, Glenn Miles wrote:
Testing of the pca9552 device on the powernv platform
showed that the reset method was not being called when
an instance of the device was realized. This was causing
the INPUT0/INPUT1 POR values to be incorrect.
Fixed by overriding the parent p
Het Gala writes:
> This is v12 patchset of modified 'migrate' and 'migrate-incoming' QAPI design
> for upstream review.
>
> Would like to thank all the maintainers that actively participated in the v11
> patchset discussion and gave insightful suggestions to improve the patches.
>
> Link to previ
Passing the struct around explicitly makes the control-flow more
obvious.
Signed-off-by: Thomas Weißschuh
---
hw/loongarch/virt.c | 50 -
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 26
Hello,
Perhaps I need to drop this patch from this patch-set as it is ARM specific.
I pulled this from RFC V2 of Virtual CPU Hotplug Support on ARMv8 and is
not required by other architectures trying to implement Virtual CPU Hotplug
Support.
https://lore.kernel.org/qemu-devel/20230926103654.34424-
On 10/9/23 20:58, Eric Farman wrote:
On Mon, 2023-10-09 at 10:20 +0800, Zhenzhong Duan wrote:
No functional changes.
Signed-off-by: Zhenzhong Duan
I see Cedric has already queued this, but FWIW:
Reviewed-by: Eric Farman
I will take the new tags when I rebase.
Thanks,
C.
---
incl
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Monday, October 9, 2023 1:43 AM
> To: Brian Cain ; qemu-devel@nongnu.org
> Cc: arm...@redhat.com; richard.hender...@linaro.org;
> peter.mayd...@linaro.org; Matheus Bernardino (QUIC)
> ; stefa...@redhat.com; a...@rev.ng;
> a...@r
Hello Glenn,
On 10/9/23 20:05, Glenn Miles wrote:
From: Cédric Le Goater
Not supported :
. 10 bit addresses
. multimaster
. slave
Signed-off-by: Cédric Le Goater
Signed-off-by: Glenn Miles
[milesg: fixed formatting warning]
Overall it looks good ;)
Some suggestions for the respin
From: Jean-Philippe Brucker
When a KVM vCPU is reset following a PSCI CPU_ON call, its power state
is not synchronized with KVM at the moment. Because the vCPU is not
marked dirty, we miss the call to kvm_arch_put_registers() that writes
to KVM's MP_STATE. Force mp_state synchronization.
Signed-
Add common function to help unregister the GDB Register Space. This shall be
done in context to the CPU unrealization.
Signed-off-by: Salil Mehta
---
gdbstub/gdbstub.c | 15 +++
include/exec/gdbstub.h | 5 +
2 files changed, 20 insertions(+)
diff --git a/gdbstub/gdbstub.c
Virtual CPU Hot-unplug leads to unrealization of a CPU object. This also
involves destruction of the CPU AddressSpace. Add common function to help
destroy the CPU AddressSpace.
Signed-off-by: Salil Mehta
---
include/exec/cpu-common.h | 8
include/hw/core/cpu.h | 1 +
softmmu/physm
ACPI GED shall be used to convey to the guest kernel about any CPU hot-(un)plug
events. Therefore, existing ACPI GED framework inside QEMU needs to be enhanced
to support CPU hotplug state and events.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
Reviewed-by:
OSPM evaluates _EVT method to map the event. The CPU hotplug event eventually
results in start of the CPU scan. Scan figures out the CPU and the kind of
event(plug/unplug) and notifies it back to the guest. Update the GED AML _EVT
method with the call to \\_SB.CPUS.CSCN
Also, macro CPU_SCAN_METHOD
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
PCI and is IO port based and hence existing CPUs AML code assumes _CRS objects
would evaluate to a system resource which describes IO Port address. But on ARM
arch CPUs control device(\\_SB.PRES) register interface is m
CPU ctrl-dev MMIO region length could be used in ACPI GED and various other
architecture specific places. Move ACPI_CPU_HOTPLUG_REG_LEN macro to more
appropriate common header file.
Signed-off-by: Salil Mehta
Reviewed-by: Alex Bennée
Reviewed-by: Jonathan Cameron
Reviewed-by: Gavin Shan
Review
ACPI CPU hotplug related initialization should only happen if ACPI_CPU_HOTPLUG
support has been enabled for particular architecture. Add cpu_hotplug_hw_init()
stub to avoid compilation break.
Signed-off-by: Salil Mehta
Reviewed-by: Jonathan Cameron
Reviewed-by: Gavin Shan
---
hw/acpi/acpi-cpu-
ACPI GED(as described in the ACPI 6.2 spec) can be used to generate ACPI events
when OSPM/guest receives an interrupt listed in the _CRS object of GED. OSPM
then maps or demultiplexes the event by evaluating _EVT method.
This change adds the support of CPU hotplug event initialization in the
exist
KVM vCPU creation is done once during the initialization of the VM when Qemu
thread is spawned. This is common to all the architectures.
Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the
corresponding KVM vCPU object in the Host KVM is not destroyed and its
representative
Virtual CPU hotplug support is being added across various architectures[1][3].
This series adds various code bits common across all architectures:
1. vCPU creation and Parking code refactor [Patch 1]
2. Update ACPI GED framework to support vCPU Hotplug [Patch 4,6,7]
3. ACPI CPUs AML code change [P
The Articia S is a generic chipset supporting several different CPUs
that were among others used on some PPC boards. This is a minimal
emulation of the parts needed for emulating the AmigaOne board.
Signed-off-by: BALATON Zoltan
---
hw/pci-host/Kconfig | 5 +
hw/pci-host/articia.c
The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware
with patches to support AmigaOS and is very similar to pegasos2 so can
be easily emulated sharing most code with pegasos2. The reason to
emulate it is that AmigaOS comes in different versions for AmigaOne
and PegasosII which only
Changes in v2:
- Update comment and commit message in patch 1 (Mark)
- Fix irq mapping in patch 2 (Volker)
Regards,
BALATON Zoltan
BALATON Zoltan (3):
via-ide: Fix legacy mode emulation
hw/pci-host: Add emulation of Mai Logic Articia S
hw/ppc: Add emulation of AmigaOne XE board
MAINTAINER
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because PCI code resets
BARs after calling device reset method. Remove this ineffective
default to avoid confusion.
Instead move setting the BARs to a callback on writing the PCI config
re
On 07/10/2023 08:23, Thomas Huth wrote:
(added Natalia who was the GSoC mentor for the NeXT cube work)
The machine is incomplete, and unfortunately the hoped-for improvements
never happened. So it's maybe best if we mark this machine as deprecated
and finally remove it again in case it gets int
> -Original Message-
> From: Brian Cain
> Sent: Sunday, October 8, 2023 7:50 AM
> To: ltaylorsimp...@gmail.com; qemu-devel@nongnu.org
> Cc: arm...@redhat.com; richard.hender...@linaro.org; phi...@linaro.org;
> peter.mayd...@linaro.org; Matheus Bernardino (QUIC)
> ; stefa...@redhat.com;
On Mon, 2023-10-09 at 10:20 +0800, Zhenzhong Duan wrote:
> No functional changes.
>
> Signed-off-by: Zhenzhong Duan
I see Cedric has already queued this, but FWIW:
Reviewed-by: Eric Farman
> ---
> include/hw/s390x/vfio-ccw.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/include/
was: [PATCH] qtest/migration: Add a test for the analyze-migration script
https://lore.kernel.org/r/20230927214756.14117-1-faro...@suse.de
The analyze-migration.py script should be kept in sync with the code
that generates the migration stream. The addition/removal of sections
and flags from the s
The script is broken when the configuration/capabilities section is
present. Add support for parsing the capabilities so we can fix it in
the next patch.
Signed-off-by: Fabiano Rosas
---
scripts/analyze-migration.py | 38
1 file changed, 38 insertions(+)
dif
From: Nikolay Borisov
Make the migration json writer part of MigrationState struct, allowing
the 'configuration' object be serialized to json.
This will facilitate the parsing of the 'configuration' object in the
next patch that fixes analyze-migration.py for arm.
Signed-off-by: Nikolay Borisov
The 'configuration' state subsections are currently not being parsed
and the script fails when analyzing an aarch64 stream:
Traceback (most recent call last):
File "./scripts/analyze-migration.py", line 625, in
dump.read(dump_memory = args.memory)
File "./scripts/analyze-migration.py", li
Add a smoke test that migrates to a file and gives it to the
script. It should catch the most annoying errors such as changes in
the ram flags.
After code has been merged it becomes way harder to figure out what is
causing the script to fail, the person making the change is the most
likely to know
The script is currently broken when the x-ignore-shared capability is
used:
Traceback (most recent call last):
File "./scripts/analyze-migration.py", line 656, in
dump.read(dump_memory = args.memory)
File "./scripts/analyze-migration.py", line 593, in read
section.read()
File "./scr
The migration code uses unsigned values for 16, 32 and 64-bit
operations. Fix the script to do the same.
This was causing an issue when parsing the migration stream generated
on the ppc64 target because one of instance_ids was larger than the
32bit signed maximum:
Traceback (most recent call last
From: Cédric Le Goater
Not supported :
. 10 bit addresses
. multimaster
. slave
Signed-off-by: Cédric Le Goater
Signed-off-by: Glenn Miles
[milesg: fixed formatting warning]
---
hw/ppc/meson.build | 1 +
hw/ppc/pnv.c | 26 ++
hw/ppc/pnv_i2c.c | 678 +
On Sun, Oct 8, 2023 at 5:58 PM Alistair Francis wrote:
>
> On Wed, Oct 4, 2023 at 7:36 PM Rob Bradford wrote:
> >
> > Hi Atish,
> >
> > On Tue, 2023-10-03 at 13:25 -0700, Atish Kumar Patra wrote:
> > > On Tue, Oct 3, 2023 at 5:51 AM Rob Bradford
> > > wrote:
> > > >
> > > > There is no requireme
Hello Cedric,
On 9/11/23 07:19, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS device is embeded inside the scratchpad. The scratchpad
provides a non-functional registers. There is a 1-1 re
Fabiano Rosas writes:
> Peter Xu writes:
>
>> On Thu, Oct 05, 2023 at 06:10:20PM -0300, Fabiano Rosas wrote:
>>> Peter Xu writes:
>>>
>>> > On Thu, Oct 05, 2023 at 10:37:56AM -0300, Fabiano Rosas wrote:
>>> >> >> +/*
>>> >> >> + * Make sure both QEMU instances will go into RECOVER stag
Hello Cedric,
On 9/9/23 03:37, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS device is embeded inside the scratchpad. The scratchpad
embedded
Fixed
provides a non-functional registe
We already provide "hw/misc/mips_itu.h" to declare prototype
related to MIPSITUState. Move itc_reconfigure() declaration
there.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/mips_itu.h | 2 ++
target/mips/cpu.h | 3 ---
target/mips/tcg/sysemu/cp0_helper.c |
When prototyping a heterogenous machine including the ITU,
we get:
include/hw/misc/mips_itu.h:76:5: error: unknown type name 'MIPSCPU'
MIPSCPU *cpu0;
^
MIPSCPU is declared in the target specific "cpu.h" header,
but we don't want to include it, because "cpu.h" is target
specific and
"hw/mips/cpudevs.h" contains declarations which are specific
to the MIPS architecture; it doesn't make sense for these to
be called from a non-MIPS architecture. Move the declarations
to "target/mips/cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/mips/cpudevs.h | 14 -
Prepare few MIPS hardware to be integrated in a
heterogeneous machine:
- Restrict MIPS-specific HW declaration to target/mips/
- Replace MIPSCPU by ArchCPU in common HW
Philippe Mathieu-Daudé (3):
hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h'
hw/misc/mips_itu: Declare itc_reconfi
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