Re: [PATCH 08/21] asc: generate silence if FIFO empty but engine still running

On 07/07/2023 07:24, Volker Rümelin wrote: MacOS (un)helpfully leaves the FIFO engine running even when all the samples have been written to the hardware, and expects the FIFO status flags and IRQ to be updated continuously. Since not all audio backends guarantee an all-zero output when no dat

Re: [PATCH v3 1/4] QGA VSS: Add wrapper to send log to debugger and stderr

On 07/07/2023 22.22, Konstantin Kostiuk wrote: On Fri, Jul 7, 2023 at 6:36 PM Philippe Mathieu-Daudé > wrote: On 7/7/23 16:24, Konstantin Kostiuk wrote: > > > On Fri, Jul 7, 2023 at 1:33 PM Philippe Mathieu-Daudé mailto:phi...@linaro.org>

[PATCH 1/1] hw/arm/sbsa-ref: set 'slots' property of xhci

This extends the slots of xhci to 64, since the default xhci_sysbus just supports one slot. Signed-off-by: Wang Yuquan Signed-off-by: Chen Baozi --- hw/arm/sbsa-ref.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 64e1cbce17..bc89eb4806 100644 --

[PATCH 0/1] hw/arm/sbsa-ref: set 'slots' property of xhci

As the default xhci_sysbus just supports only one usb slot, it can not meet the working requirement of this bord. Therefore, we extend the slots of xhci to 64. Yuquan Wang (1): hw/arm/sbsa-ref: set 'slots' property of xhci hw/arm/sbsa-ref.c | 1 + 1 file changed, 1 insertion(+) -- 2.34.1

Re: [PATCH v4 0/6] net/tap: Fix QEMU frozen issue when the maximum number of file descriptors is very large

Jason Wang writes: > On Sun, Jul 9, 2023 at 11:48 PM Bin Meng wrote: >> >> On Wed, Jun 28, 2023 at 11:29 PM Bin Meng wrote: >> > >> > >> > Current codes using a brute-force traversal of all file descriptors >> > do not scale on a system where the maximum number of file descriptors >> > is set t

Re: [RFC PATCH 6/9] ui/gtk: Add a new parameter to assign connectors/monitors to GFX VCs

"Kim, Dongwon" writes: > On 7/7/2023 7:07 AM, Markus Armbruster wrote: >> "Kim, Dongwon" writes: >> >>> Hi Markus, >>> >>> So I've worked on the description of this param. Can you check if this new >>> version looks ok? >>> >>> # @connectors:  List of physical monitor/connector names where the

Re: Reducing vdpa migration downtime because of memory pin / maps

On Sat, Jul 8, 2023 at 11:14 AM Si-Wei Liu wrote: > > > > On 7/5/2023 10:46 PM, Eugenio Perez Martin wrote: > > On Thu, Jul 6, 2023 at 2:13 AM Si-Wei Liu wrote: > >> > >> > >> On 7/5/2023 11:03 AM, Eugenio Perez Martin wrote: > >>> On Tue, Jun 27, 2023 at 8:36 AM Si-Wei Liu wrote: > >

Re: [PATCH] vhost_vdpa: no need to fetch vring base when poweroff

On 7/7/2023 7:02 PM, Eugenio Perez Martin wrote: On Fri, Jul 7, 2023 at 12:18 PM Zhu Lingshan wrote: In the poweroff routine, no need to fetch last available index. This commit also provides a better debug message in the vhost caller vhost_virtqueue_stop, because if vhost does not fetch the

Re: [PATCH v4 0/6] Add RISC-V KVM AIA Support

Hi Andrew, I'll add it into patch v5. Thank you! Regards, Yong-Xuan On Wed, Jul 5, 2023 at 4:14 PM Andrew Jones wrote: > > On Wed, Jun 21, 2023 at 02:54:50PM +, Yong-Xuan Wang wrote: > > This series adds support for KVM AIA in RISC-V architecture. > > > > In order to test these patches, we

Re: [RFC PATCH 6/6] vdpa: remove net cvq migration blocker

On Fri, Jul 7, 2023 at 3:12 AM Eugenio Pérez wrote: > > Now that we have add migration blockers if the device does not support > all the needed features, remove the general blocker applied to all net > devices with CVQ. > > Signed-off-by: Eugenio Pérez I wonder what's the difference compared if

Re: [PATCH] net: add initial support for AF_XDP network backend

On Fri, Jul 7, 2023 at 7:21 PM Ilya Maximets wrote: > > On 7/7/23 03:43, Jason Wang wrote: > > On Fri, Jul 7, 2023 at 3:08 AM Stefan Hajnoczi wrote: > >> > >> On Wed, 5 Jul 2023 at 02:02, Jason Wang wrote: > >>> > >>> On Mon, Jul 3, 2023 at 5:03 PM Stefan Hajnoczi wrote: > > On Fri, 3

Re: [RFC PATCH 2/6] vdpa: add should_enable op

On Fri, Jul 7, 2023 at 3:12 AM Eugenio Pérez wrote: > > To restore the device at the destination of a live migration we send the > commands through control virtqueue. For a device to read CVQ it must > have received the DRIVER_OK status bit. > > However this opens a window where the device could

Re: [RFC PATCH 1/6] vdpa: export vhost_vdpa_set_vring_ready

On Fri, Jul 7, 2023 at 3:12 AM Eugenio Pérez wrote: > > The vhost-vdpa net backend needs to enable vrings in a different order > than default, so export it. > > No functional change intended except for tracing, that now includes the > (virtio) index being enabled and the return value of the ioctl.

Re: [PATCH v4 0/6] net/tap: Fix QEMU frozen issue when the maximum number of file descriptors is very large

On Sun, Jul 9, 2023 at 11:48 PM Bin Meng wrote: > > On Wed, Jun 28, 2023 at 11:29 PM Bin Meng wrote: > > > > > > Current codes using a brute-force traversal of all file descriptors > > do not scale on a system where the maximum number of file descriptors > > is set to a very large value (e.g.: in

Re: [PATCH v9 00/20] target/riscv, KVM: fixes and enhancements

On Thu, Jul 6, 2023 at 8:19 PM Daniel Henrique Barboza wrote: > > Hi, > > In this version we dialed back from our design decision in patch 14, > returning to the design we've been using since the first version. The > rationale behind is that we can't get rid of EINVAL since it will break > extensi

Re: [PATCH v9 14/20] target/riscv/kvm.c: add multi-letter extension KVM properties

On Thu, Jul 6, 2023 at 10:47 PM Daniel Henrique Barboza wrote: > > > > On 7/6/23 09:14, Andrew Jones wrote: > > On Thu, Jul 06, 2023 at 07:17:32AM -0300, Daniel Henrique Barboza wrote: > >> Let's add KVM user properties for the multi-letter extensions that KVM > >> currently supports: zicbom, zicb

Re: [PATCH v9 14/20] target/riscv/kvm.c: add multi-letter extension KVM properties

On Thu, Jul 6, 2023 at 8:20 PM Daniel Henrique Barboza wrote: > > Let's add KVM user properties for the multi-letter extensions that KVM > currently supports: zicbom, zicboz, zihintpause, zbb, ssaia, sstc, > svinval and svpbmt. > > As with MISA extensions, we're using the KVMCPUConfig type to hold

Re: [PATCH v9 20/20] target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM

On Thu, Jul 6, 2023 at 8:20 PM Daniel Henrique Barboza wrote: > > If we don't set a proper cbom_blocksize|cboz_blocksize in the FDT the > Linux Kernel will fail to detect the availability of the CBOM/CBOZ > extensions, regardless of the contents of the 'riscv,isa' DT prop. > > The FDT is being wri

Re: [PATCH v9 19/20] target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper

On Thu, Jul 6, 2023 at 8:19 PM Daniel Henrique Barboza wrote: > > There are 2 places in which we need to get a pointer to a certain > property of the cpu->cfg struct based on property offset. Next patch > will add a couple more. > > Create a helper to avoid repeating this code over and over. > > S

Re: [PATCH v9 18/20] target/riscv: update multi-letter extension KVM properties

On Thu, Jul 6, 2023 at 8:19 PM Daniel Henrique Barboza wrote: > > We're now ready to update the multi-letter extensions status for KVM. > > kvm_riscv_update_cpu_cfg_isa_ext() is called called during vcpu creation > time to verify which user options changes host defaults (via the 'user_set' > flag)

Re: [PATCH v9 17/20] target/riscv/cpu.c: create KVM mock properties

On Thu, Jul 6, 2023 at 8:19 PM Daniel Henrique Barboza wrote: > > KVM-specific properties are being created inside target/riscv/kvm.c. But > at this moment we're gathering all the remaining properties from TCG and > adding them as is when running KVM. This creates a situation where > non-KVM prope

Re: [PATCH v9 16/20] target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext()

On Thu, Jul 6, 2023 at 8:20 PM Daniel Henrique Barboza wrote: > > riscv_isa_string_ext() is being used by riscv_isa_string(), which is > then used by boards to retrieve the 'riscv,isa' string to be written in > the FDT. All this happens after riscv_cpu_realize(), meaning that we're > already past

Re: [PATCH v9 15/20] target/riscv/cpu.c: add satp_mode properties earlier

On Thu, Jul 6, 2023 at 8:20 PM Daniel Henrique Barboza wrote: > > riscv_cpu_add_user_properties() ended up with an excess of "#ifndef > CONFIG_USER_ONLY" blocks after changes that added KVM properties > handling. > > KVM specific properties are required to be created earlier than their > TCG count

Re: [PATCH v9 13/20] target/riscv/kvm.c: update KVM MISA bits

On Thu, Jul 6, 2023 at 8:20 PM Daniel Henrique Barboza wrote: > > Our design philosophy with KVM properties can be resumed in two main > decisions based on KVM interface availability and what the user wants to > do: > > - if the user disables an extension that the host KVM module doesn't > know ab

Re: [PATCH v9 12/20] target/riscv: add KVM specific MISA properties

On Thu, Jul 6, 2023 at 8:21 PM Daniel Henrique Barboza wrote: > > Using all TCG user properties in KVM is tricky. First because KVM > supports only a small subset of what TCG provides, so most of the > cpu->cfg flags do nothing for KVM. > > Second, and more important, we don't have a way of tellin

Re: [PATCH v9 11/20] target/riscv/cpu: add misa_ext_info_arr[]

On Thu, Jul 6, 2023 at 8:18 PM Daniel Henrique Barboza wrote: > > Next patch will add KVM specific user properties for both MISA and > multi-letter extensions. For MISA extensions we want to make use of what > is already available in misa_ext_cfgs[] to avoid code repetition. > > misa_ext_info_arr[

Re: [PATCH v9 01/20] target/riscv: skip features setup for KVM CPUs

On Thu, Jul 6, 2023 at 8:18 PM Daniel Henrique Barboza wrote: > > As it is today it's not possible to use '-cpu host' if the RISC-V host > has RVH enabled. This is the resulting error: > > $ ./qemu/build/qemu-system-riscv64 \ > -machine virt,accel=kvm -m 2G -smp 1 \ > -nographic -snapshot

Re: [PATCH qemu v3 1/1] fdt_load_addr is getting assigned as the result of riscv_compute_fdt_addr(), which is an uint64_t.

On Fri, Jul 7, 2023 at 8:17 PM ~rlakshmibai wrote: > > From: Lakshmi Bai Raja Subramanian > > > fdt_load_addr is declared as uint32_t which is not matching with the > return data type of riscv_compute_fdt_addr. Modified fdt_load_addr data type > to uint64_t to match the riscv_compute_fdt_addr()

Re: [PATCH qemu v3 1/1] fdt_load_addr is getting assigned as the result of riscv_compute_fdt_addr(), which is an uint64_t.

On Fri, Jul 7, 2023 at 8:17 PM ~rlakshmibai wrote: > > From: Lakshmi Bai Raja Subramanian > > > fdt_load_addr is declared as uint32_t which is not matching with the > return data type of riscv_compute_fdt_addr. Modified fdt_load_addr data type > to uint64_t to match the riscv_compute_fdt_addr()

Re: [PATCH] target/riscv: fix the issue of guest reboot then no response or crash in kvm-mode

On Sun, Jun 25, 2023 at 12:50 PM liguang.zhang <18622748...@163.com> wrote: > > From: "liguang.zhang" > > There are two issues when rebooting a guest using KVM > 1. When the guest initiates a reboot the host is unable to stop the vcpu > 2. When running a SMP guest the qemu monitor system_reset cau

Re: [PATCH] target/riscv: Add Zihintntl extension ISA string to DTS

On Tue, Jul 4, 2023 at 6:42 PM Jason Chien wrote: > > RVA23 Profiles states: > The RVA23 profiles are intended to be used for 64-bit application > processors that will run rich OS stacks from standard binary OS > distributions and with a substantial number of third-party binary user > applications

Re: [PATCH] target/riscv: Add Zihintntl extension ISA string to DTS

On Tue, Jul 4, 2023 at 6:42 PM Jason Chien wrote: > > RVA23 Profiles states: > The RVA23 profiles are intended to be used for 64-bit application > processors that will run rich OS stacks from standard binary OS > distributions and with a substantial number of third-party binary user > applications

Re: [PATCH v2] riscv: Generate devicetree only after machine initialization is complete

On Thu, Jul 6, 2023 at 1:59 PM Guenter Roeck wrote: > > If the devicetree is created before machine initialization is complete, > it misses dynamic devices. Specifically, the tpm device is not added > to the devicetree file and is therefore not instantiated in Linux. > Load/create devicetree in vi

Re: [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly

On Fri, Jul 7, 2023 at 10:26 PM yang.zhang wrote: > > From: "yang.zhang" > > Should set/get riscv all reg timer,i.e, time/compare/frequency/state. > > Signed-off-by:Yang Zhang > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688 Thanks! Applied to riscv-to-apply.next Alistair > ---

Re: [PATCH v2] riscv: Generate devicetree only after machine initialization is complete

On Thu, Jul 6, 2023 at 1:59 PM Guenter Roeck wrote: > > If the devicetree is created before machine initialization is complete, > it misses dynamic devices. Specifically, the tpm device is not added > to the devicetree file and is therefore not instantiated in Linux. > Load/create devicetree in vi

Re: [PATCH v7] riscv: Add support for the Zfa extension

On Mon, Jul 3, 2023 at 4:27 PM Christoph Muellner wrote: > > From: Christoph Müllner > > This patch introduces the RISC-V Zfa extension, which introduces > additional floating-point instructions: > * fli (load-immediate) with pre-defined immediates > * fminm/fmaxm (like fmin/fmax but with differe

Re: [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly

On Fri, Jul 7, 2023 at 10:26 PM yang.zhang wrote: > > From: "yang.zhang" > > Should set/get riscv all reg timer,i.e, time/compare/frequency/state. > > Signed-off-by:Yang Zhang > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688 Reviewed-by: Alistair Francis Alistair > --- > targe

Re: [PATCH v2] ppc/pnv: Add QME region for P10

On Sat, 8 Jul 2023 at 01:17, Nicholas Piggin wrote: > > --- a/include/hw/ppc/pnv_xscom.h > > +++ b/include/hw/ppc/pnv_xscom.h > > @@ -127,6 +127,17 @@ struct PnvXScomInterfaceClass { > > #define PNV10_XSCOM_EC(proc)\ > > ((0x2 << 16) | ((1 << (3 - (proc))) << 12)) > > >

Re: Addition of qtest_irq_intercept_out_named, or modify qtest_irq_interrupt_out?

[sorry, resending because I forgot to reply-all] > qtest_irq_intercept_out() takes a QOM path argument. Whether it is > a named IRQ or not should be irrelevant at this layer. I'm a little confused about the QOM path. Currently the code in qtest_process_command() is calling object_resolve_path, b

[PATCH 0/1] linux-headers: update to v6.5-rc1

Hello, Here is an update of Linux headers for two series needing new KVM definitions : * s390x/ap: fix hang when mdev attached to guest is removed https://lore.kernel.org/all/20230602141125.448833-1-akrow...@linux.ibm.com/ * vfio/pci: Atomic Ops completer support https://lore.kernel.org/a

[PATCH 1/1] linux-headers: update to v6.5-rc1

Signed-off-by: Cédric Le Goater --- include/standard-headers/drm/drm_fourcc.h | 43 ++ include/standard-headers/linux/const.h| 2 +- include/standard-headers/linux/pci_regs.h | 1 + include/standard-headers/linux/vhost_types.h | 16 +++ include/standard-headers/linux/vi

[PULL 35/37] crypto: Implement aesdec_IMC with AES_imc_rot

This method uses one uint32_t * 256 table instead of 4, which means its data cache overhead is less. Acked-by: Daniel P. Berrangé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- crypto/aes.c | 42 +- 1 file changed, 21 insertions

[PULL 30/37] target/riscv: Use aesdec_ISB_ISR_AK

This implements the AES64DS instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/crypto_helper.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index b072fed3e2..

[PATCH 21/45] linux-user: Fix formatting of mmap.c

Fix all checkpatch.pl errors within mmap.c. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-5-richard.hender...@linaro.org> --- linux-user/mmap.c | 199 -- 1 file changed,

[PATCH 39/45] linux-user: Simplify target_munmap

All of the guest to host page adjustment is handled by mmap_reserve_or_unmap; there is no need to duplicate that. There are no failure modes for munmap after alignment and guest address range have been validated. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-23-richard.hender.

[PULL 36/37] crypto: Remove AES_imc

This array is no longer used. Acked-by: Daniel P. Berrangé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/crypto/aes.h | 7 -- crypto/aes.c | 264 --- 2 files changed, 271 deletions(-) diff --git a/include/cry

[PATCH 24/45] linux-user: Split TARGET_PROT_* out of syscall_defs.h

Move the values into the per-target target_mman.h headers Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-8-richard.hender...@linaro.org> --- linux-user/aarch64/target_mman.h | 8 linux-user/generic/target

[PATCH 33/45] accel/tcg: Introduce page_find_range_empty

Use the interval tree to locate an unused range in the VM. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-17-richard.hender...@linaro.org> --- include/exec/cpu-all.h | 15 +++ accel/tcg/user-exec.c | 41 + 2 files changed, 5

[PATCH 37/45] linux-user: Rewrite mmap_reserve

Use 'last' variables instead of 'end' variables; be careful about avoiding overflow. Assert that the mmap succeeded. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-21-richard.hender...@linaro.org> --- linux-user/mmap.c | 68 +-- 1 f

[PATCH 45/45] linux-user/riscv: Add syscall riscv_hwprobe

From: Robbin Ehn This patch adds the new syscall for the "RISC-V Hardware Probing Interface" (https://docs.kernel.org/riscv/hwprobe.html). Signed-off-by: Robbin Ehn Reviewed-by: Palmer Dabbelt Message-Id: <7f8d733df6e9b6151e9efb843d55441348805e70.ca...@rivosinc.com> Signed-off-by: Richard Hend

[PATCH 34/45] bsd-user: Use page_find_range_empty for mmap_find_vma_reserved

Use the interval tree to find empty space, rather than probing each page in turn. Cc: Warner Losh Cc: Kyle Evans Signed-off-by: Richard Henderson Reviewed-bt: Warner Losh Message-Id: <20230707204054.8792-18-richard.hender...@linaro.org> --- bsd-user/mmap.c | 48 +++

[PATCH 30/45] linux-user: Widen target_mmap offset argument to off_t

We build with _FILE_OFFSET_BITS=64, so off_t = off64_t = uint64_t. With an extra cast, this fixes emulation of mmap2, which could overflow the computation of the full value of offset. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-14-richard.hender...@

[PATCH 25/45] linux-user: Populate more bits in mmap_flags_tbl

Fix translation of TARGET_MAP_SHARED and TARGET_MAP_PRIVATE, which are types not single bits. Add TARGET_MAP_SHARED_VALIDATE, TARGET_MAP_SYNC, TARGET_MAP_NONBLOCK, TARGET_MAP_POPULATE, TARGET_MAP_FIXED_NOREPLACE, and TARGET_MAP_UNINITIALIZED. Update strace to match. Reviewed-by: Alex Bennée Sig

[PULL 37/37] crypto: Unexport AES_*_rot, AES_TeN, AES_TdN

These arrays are no longer used outside of aes.c. Acked-by: Daniel P. Berrangé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/crypto/aes.h | 25 - crypto/aes.c | 33 + 2 files changed, 21 insertio

[PATCH 22/45] linux-user/strace: Expand struct flags to hold a mask

A zero bit value does not make sense -- it must relate to some field in some way. Define FLAG_BASIC with a build-time sanity check. Adjust FLAG_GENERIC and FLAG_TARGET to use it. Add FLAG_GENERIC_MASK and FLAG_TARGET_MASK. Fix up the existing flag definitions for build errors. Reviewed-by: Alex

[PATCH 29/45] linux-user: Split out target_to_host_prot

Split out from validate_prot_to_pageflags, as there is not one single host_prot for the entire range. We need to adjust prot for every host page that overlaps multiple guest pages. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-13-richard.hender...@li

[PULL 32/37] target/riscv: Use aesenc_SB_SR_MC_AK

This implements the AES64ESM instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/crypto_helper.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index 505166ce5a.

[PATCH 00/45] linux-user: patch roundup

I think this is all of the linux-user patches from the list that are outstanding, except for 20230524054647.1093758-1-richard.hender...@linaro.org "linux-user/i386: Properly align signal frame" which failed testing under cross-i386-tci. I'll have another look at that later this week, as

[PULL 14/37] host/include/ppc: Implement aes-round.h

Detect CRYPTO in cpuinfo; implement the accel hooks. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- host/include/ppc/host/cpuinfo.h| 1 + host/include/ppc/host/crypto/aes-round.h | 182 + host/include/ppc64/host/crypto/aes-round.h |

[PULL 29/37] target/riscv: Use aesenc_SB_SR_AK

This implements the AES64ES instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/crypto_helper.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index 2ef30281

[PULL 24/37] target/arm: Demultiplex AESE and AESMC

Split these helpers so that we are not passing 'decrypt' within the simd descriptor. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/helper.h | 2 ++ target/arm/tcg/sve.decode | 4 ++-- target/arm/tcg/crypto_helper.c | 37

[PULL 12/37] host/include/i386: Implement aes-round.h

Detect AES in cpuinfo; implement the accel hooks. Signed-off-by: Richard Henderson --- host/include/i386/host/cpuinfo.h| 1 + host/include/i386/host/crypto/aes-round.h | 152 host/include/x86_64/host/crypto/aes-round.h | 1 + util/cpuinfo-i386.c

[PATCH 26/45] accel/tcg: Introduce page_check_range_empty

Examine the interval tree to validate that a region has no existing mappings. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-10-richard.hender...@linaro.org> --- include/exec/cpu-all.h | 12 accel/tcg/user-exec.c | 7 +++ 2 files ch

[PULL 26/37] target/arm: Use aesdec_ISB_ISR_AK

This implements the AESD instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/tcg/crypto_helper.c | 37 +++--- 1 file changed, 16 insertions(+), 21 deletions(-) diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/

[PATCH 38/45] linux-user: Rename mmap_reserve to mmap_reserve_or_unmap

If !reserved_va, munmap instead and assert success. Update all callers. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-22-richard.hender...@linaro.org> --- linux-user/mmap.c | 29 - 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/lin

[PULL 33/37] target/riscv: Use aesdec_ISB_ISR_IMC_AK

This implements the AES64DSM instruction. This was the last use of aes64_operation and its support macros, so remove them all. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/crypto_helper.c | 101 --- 1 file changed, 10 ins

[PATCH 43/45] linux-user: Simplify target_madvise

The trivial length 0 check can be moved up, simplifying some of the other cases. The end < start test is handled by guest_range_valid_untagged. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-27-richard.hender...@linaro.org> --- linux-user/mmap.c | 19 --- 1 fi

[PATCH 41/45] accel/tcg: Return bool from page_check_range

Replace the 0/-1 result with true/false. Invert the sense of the test of all callers. Document the function. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-25-richard.hender...@linaro.org> --- bsd-user/qemu.h| 2 +- include/exec/cpu-all.h | 13

[PATCH 44/45] linux-user: Drop uint and ulong

From: Juan Quintela These are types not used anymore anywhere else. Signed-off-by: Juan Quintela Reviewed-by: Richard Henderson Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Message-id: <20230511085056.13809-1-quint...@redhat.com> Signed-off-by: Richard Henderson --- linu

[PULL 31/37] target/riscv: Use aesdec_IMC

This implements the AES64IM instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/crypto_helper.c | 15 +-- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index e

[PULL 28/37] target/arm: Use aesdec_IMC

This implements the AESIMC instruction. We have converted everything to crypto/aes-round.h; crypto/aes.h is no longer needed. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/tcg/crypto_helper.c | 33 ++--- 1 file changed, 14 inser

[PULL 25/37] target/arm: Use aesenc_SB_SR_AK

This implements the AESE instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/tcg/crypto_helper.c | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/crypto_helpe

[PATCH 05/45] linux-user: Use abi_ullong not uint64_t in syscall_defs.h

Be careful not to change linux_dirent64, which is a host structure. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/syscall_defs.h | 72 +++ 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/linux-user/syscall

[PATCH 15/45] include/exec/user: Set ABI_LLONG_ALIGNMENT to 4 for nios2

Based on gcc's nios2.h setting BIGGEST_ALIGNMENT to 32 bits. Signed-off-by: Richard Henderson --- include/exec/user/abitypes.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index beba0a48c7..6191ce9f74 100644 ---

[PATCH 28/45] linux-user: Implement MAP_FIXED_NOREPLACE

Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-12-richard.hender...@linaro.org> --- linux-user/mmap.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 639921dba0..9dc34fc29d 100644 --- a/linux-user/m

[PULL 27/37] target/arm: Use aesenc_MC

This implements the AESMC instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/tcg/crypto_helper.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/crypto_helper.c inde

[PATCH 31/45] linux-user: Rewrite target_mprotect

Use 'last' variables instead of 'end' variables. When host page size > guest page size, detect when adjacent host pages have the same protection and merge that expanded host range into fewer syscalls. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-15-richard.hender...@linaro.or

[PATCH 35/45] linux-user: Use page_find_range_empty for mmap_find_vma_reserved

Use the interval tree to find empty space, rather than probing each page in turn. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-19-richard.hender...@linaro.org> --- linux-user/mmap.c | 52 ++- 1 file changed, 6 insertions(+), 46 del

[PATCH 42/45] linux-user: Remove can_passthrough_madvise

Use page_check_range instead, which uses the interval tree instead of checking each page individually. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-26-richard.hender...@linaro.org> --- linux-user/mmap.c | 24 +++- 1 file changed, 3 insertions(+), 21 delet

[PATCH 09/45] linux-user: Use abi_llong not long long in syscall_defs.h

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/syscall_defs.h | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 45ebacd4b4..e4fcbd16d2 100644 --- a/linux-user/syscall_d

[PATCH 20/45] linux-user: Make sure initial brk(0) is page-aligned

From: Andreas Schwab Fixes: 86f04735ac ("linux-user: Fix brk() to release pages") Signed-off-by: Andreas Schwab Message-Id: Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- linux-user/syscall.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/

[PULL 13/37] host/include/aarch64: Implement aes-round.h

Detect AES in cpuinfo; implement the accel hooks. Signed-off-by: Richard Henderson --- meson.build | 9 + host/include/aarch64/host/cpuinfo.h | 1 + host/include/aarch64/host/crypto/aes-round.h | 205 +++ util/cpuinfo-aarch64.c

[PULL 21/37] target/i386: Use aesdec_IMC

This implements the AESIMC instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/i386/ops_sse.h | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index 0a37bde595..893913ebf8 10064

[PATCH 36/45] linux-user: Use 'last' instead of 'end' in target_mmap

Complete the transition within the mmap functions to a formulation that does not overflow at the end of the address space. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230707204054.8792-20-richard.hender...@linaro.org> --- linux-user/mmap.c | 45 ++

[PATCH 08/45] linux-user: Use abi_ullong not unsigned long long in syscall_defs.h

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/syscall_defs.h | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 20986bd1d3..45ebacd4b4 100644 ---

[PULL 23/37] target/i386: Use aesdec_ISB_ISR_IMC_AK

This implements the AESDEC instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/i386/ops_sse.h | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index 93a4e0cf16..a0e425733f 10

[PULL 34/37] crypto: Remove AES_shifts, AES_ishifts

These arrays are no longer used, replaced by AES_SH_*, AES_ISH_*. Acked-by: Daniel P. Berrangé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/crypto/aes.h | 4 crypto/aes.c | 14 -- 2 files changed, 18 deletions(-) diff --git a/inclu

[PATCH 23/45] linux-user: Split TARGET_MAP_* out of syscall_defs.h

Move the values into the per-target target_mman.h headers Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-7-richard.hender...@linaro.org> --- linux-user/alpha/target_mman.h | 13 + linux-user/generic/target_mman.h | 54 linux

[PULL 11/37] crypto: Add aesdec_ISB_ISR_AK_IMC

Add a primitive for InvSubBytes + InvShiftRows + AddRoundKey + InvMixColumns. Acked-by: Daniel P. Berrangé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- host/include/generic/host/crypto/aes-round.h | 3 +++ include/crypto/aes-round.h | 21 +

[PATCH 27/45] bsd-user: Use page_check_range_empty for MAP_EXCL

The previous check returned -1 when any page within [start, start+len) is unmapped, not when all are unmapped. Cc: Warner Losh Cc: Kyle Evans Signed-off-by: Richard Henderson Reviewed-by: Warner Losh Message-Id: <20230707204054.8792-11-richard.hender...@linaro.org> --- bsd-user/mmap.c | 2 +-

[PATCH 18/45] accel/tcg: Split out cpu_exec_longjmp_cleanup

Share the setjmp cleanup between cpu_exec_step_atomic and cpu_exec_setjmp. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard W.M. Jones Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 43 +++ 1 file changed, 1

[PATCH 03/45] linux-user: Use abi_uint not uint32_t in syscall_defs.h

Signed-off-by: Richard Henderson --- linux-user/syscall_defs.h | 108 +++--- 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index a4e4df8d3e..414d88a9ec 100644 --- a/linux-user/syscall_defs.h ++

[PATCH 02/45] linux-user: Remove #if 0 block in syscall_defs.h

These definitions are in sparc/signal.c. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/syscall_defs.h | 24 1 file changed, 24 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index e80d54780b..a4e4df

[PATCH 32/45] linux-user: Rewrite mmap_frag

Use 'last' variables instead of 'end' variables. Always zero MAP_ANONYMOUS fragments, which we previously failed to do if they were not writable; early exit in case we allocate a new page from the kernel, known zeros. Signed-off-by: Richard Henderson Message-Id: <20230707204054.8792-16-richard.he

[PULL 10/37] crypto: Add aesdec_ISB_ISR_IMC_AK

Add a primitive for InvSubBytes + InvShiftRows + InvMixColumns + AddRoundKey. Acked-by: Daniel P. Berrangé Signed-off-by: Richard Henderson --- host/include/generic/host/crypto/aes-round.h | 3 + include/crypto/aes-round.h | 21 +++ crypto/aes.c

[PATCH 10/45] linux-user: Use abi_int not int in syscall_defs.h

Signed-off-by: Richard Henderson --- linux-user/syscall_defs.h | 216 +++--- 1 file changed, 108 insertions(+), 108 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index e4fcbd16d2..442a8aefe3 100644 --- a/linux-user/syscall_defs.h

[PATCH 40/45] accel/tcg: Accept more page flags in page_check_range

Only PAGE_WRITE needs special attention, all others can be handled as we do for PAGE_READ. Adjust the mask. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230707204054.8792-24-richard.hender...@linaro.org> --- accel/tcg/user-exec.c | 4 ++-- 1 file changed,

[PULL 07/37] crypto: Add aesenc_MC

Add a primitive for MixColumns. Acked-by: Daniel P. Berrangé Signed-off-by: Richard Henderson --- host/include/generic/host/crypto/aes-round.h | 2 + include/crypto/aes-round.h | 18 ++ crypto/aes.c | 61 3 files change

[PULL 17/37] target/ppc: Use aesenc_SB_SR_MC_AK

This implements the VCIPHER instruction. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/ppc/int_helper.c | 14 -- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/target/ppc/int_helper.c b/target/pp

[PULL 20/37] target/i386: Use aesdec_ISB_ISR_AK

This implements the AESDECLAST instruction. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/i386/ops_sse.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index 63fdecbe03..0a37bde595 10

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