On 2023/06/29 13:07, Ani Sinha wrote:
PCI Express ports only have one slot, so PCI Express devices can only be
plugged into slot 0 on a PCIE port. Enforce it.
The change has been tested to not break ARI by instantiating seven vfs on an
emulated igb device (the maximum number of vfs the linux igb
On 28/06/2023 18.55, Fabiano Rosas wrote:
The following patch will make use of this function from within
migrate-helpers.c, so move it there.
Signed-off-by: Fabiano Rosas
Reviewed-by: Juan Quintela
---
tests/qtest/migration-helpers.c | 11 +++
tests/qtest/migration-helpers.h | 3 ++
On Tue, 27 Jun 2023 13:51:24 +0200
Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
Reviewed-by: Greg Kurz
> target/ppc/kvm_ppc.h | 5 -
> 1 file changed, 5 deletions(-)
>
> diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
> index 901e188c9a..6a4dd9c56
On Tue, 27 Jun 2023 13:51:22 +0200
Philippe Mathieu-Daudé wrote:
> TYPE_HOST_POWERPC_CPU is used in various places of cpu_init.c,
> in order to restrict "kvm_ppc.h" to sysemu, move this QOM-related
> definition to cpu-qom.h.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
Reviewed-by: Greg Kur
On Tue, 27 Jun 2023 13:51:23 +0200
Philippe Mathieu-Daudé wrote:
> User emulation shouldn't need any of the KVM prototypes
> declared in "kvm_ppc.h".
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
Reviewed-by: Greg Kurz
> target/ppc/cpu_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 de
On 6/28/23 19:29, Alex Williamson wrote:
Cédric has stepped up involvement in vfio, reviewing and managing
patches, as well as pull requests. This work deserves gratitude and
punishment with a promotion to co-maintainer ;)
:)
Signed-off-by: Alex Williamson
Acked-by: Cédric Le Goater
-
On 6/29/23 04:16, Nicholas Piggin wrote:
These patches implement enough to boot a SMT powernv machine to Linux
and boot a SMP KVM guest inside that.
There are a few more SPRs that need to be done, and per-LPAR SPRs are
mostly not annotated yet so it can't run in 1LPAR mode. But it is
enough to r
On 6/28/23 16:15, Kevin Wolf wrote:
The following changes since commit 52ed34cbddde1cb89b2ac263e758e349a77f21e1:
Merge tag 'pull-request-2023-06-26' ofhttps://gitlab.com/thuth/qemu into
staging (2023-06-26 10:38:41 +0200)
are available in the Git repository at:
https://repo.or.cz/qemu/
On 6/29/23 04:57, Sittisak Sinprem wrote:
Hi Cédric,
I had fixed the function name to support in current branch,
but facing about below error while starting
./build/qemu-system-arm -machine montblanc-bmc -drive
file=~/flash-montblanc,format=raw,if=mtd -nographic -netdev
tap,id=netdev0,sc
On 6/29/23 04:16, Nicholas Piggin wrote:
Set the TIR default value with the SMT thread index, and place some
standard limits on SMT configurations. Now powernv is able to boot
skiboot and Linux with a SMT topology, including booting a KVM guest.
There are several other per-core SPRs, but they ar
On 6/25/23 14:20, Nicholas Piggin wrote:
The clock update logic reads the clock twice to compute the new clock
value, with a value derived from the later time subtracted from a value
derived from the earlier time. This can lead to an underflow in
subtractions in bits that are intended to cancel e
On Wed, Jun 28, 2023 at 4:25 PM Stefan Hajnoczi wrote:
>
> On Wed, 28 Jun 2023 at 10:19, Jason Wang wrote:
> >
> > On Wed, Jun 28, 2023 at 4:15 PM Stefan Hajnoczi wrote:
> > >
> > > On Wed, 28 Jun 2023 at 09:59, Jason Wang wrote:
> > > >
> > > > On Wed, Jun 28, 2023 at 3:46 PM Stefan Hajnoczi
On 6/29/23 04:07, Nicholas Piggin wrote:
The clock update logic reads the clock twice to compute the new clock
value, with a value derived from the later time subtracted from a value
derived from the earlier time. The delta causes time to be lost.
This can ultimately result in time becoming unsy
On 6/27/23 13:51, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
I guess the MemoryRegion code has sufficiently changed since commit
98efaf75282a ("ppc: Fix up usermode only builds") ?
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/kvm_ppc.h | 5 -
On 6/27/23 13:51, Philippe Mathieu-Daudé wrote:
User emulation shouldn't need any of the KVM prototypes
declared in "kvm_ppc.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/cpu_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deleti
On 6/27/23 13:51, Philippe Mathieu-Daudé wrote:
TYPE_HOST_POWERPC_CPU is used in various places of cpu_init.c,
in order to restrict "kvm_ppc.h" to sysemu, move this QOM-related
definition to cpu-qom.h.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
--
On 6/27/23 13:51, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/cpu-qom.h | 5 +
target/ppc/cpu.h | 6 --
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/target/ppc/cpu-qom.h
On 6/27/23 13:51, Philippe Mathieu-Daudé wrote:
"kvm_ppc.h" declares:
int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run);
'struct kvm_run' is declared in "sysemu/kvm.h", include it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
targe
On 6/27/23 13:51, Philippe Mathieu-Daudé wrote:
Keep a single if/else/endif block checking CONFIG_KVM.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/kvm_ppc.h | 62
1 file changed, 28 ins
On 6/25/23 14:03, Nicholas Piggin wrote:
Cedric kindly reviewed these already so I think they should be
good to go now. This is just a rebase and slight rewording the
changelog. Still haven't completed the main chiptod device yet.
Thanks,
Nick
Nicholas Piggin (2):
target/ppc: Tidy POWER book
The test attaches a SCSI controller to a non-zero slot and a pcie-to-pci bridge
on slot 0 on the same pcie-root-port. Since a downstream device can be attached
to a pcie-root-port only on slot 0, the above test configuration is not allowed.
Additionally using pcie.0 as id for pcie-to-pci bridge is
PCI Express ports only have one slot, so PCI Express devices can only be
plugged into slot 0 on a PCIE port. Enforce it.
The change has been tested to not break ARI by instantiating seven vfs on an
emulated igb device (the maximum number of vfs the linux igb driver supports).
The vfs are seen to h
Patches 1-4:
Fix tests so that devices do not use non-zero slots on the pcie root
ports. PCIE ports only have one slot, so PCIE devices can only be
plugged into slot 0 on a PCIE port.
Patch 5:
Enforce only one slot on PCIE port.
The test fixes must be applied before the QEMU change that checks fo
Some fixes were committed in bios-tables-test in the previous commit. Update
the acpi blob and clear bios-tables-test-allowed-diff.h so that the test
continues to pass with the changes in the bios-tables-test.
Following is the asl diff between the old and the newly updated blob:
@@ -1,30 +1,30 @@
PCIE ports only have one slot, slot 0. Hence, non-zero slots are not available
for PCIE devices on PCIE root ports. Fix test_acpi_q35_tcg_no_acpi_hotplug()
so that the test does not use them.
Signed-off-by: Ani Sinha
Reviewed-by: Igor Mammedov
---
tests/qtest/bios-tables-test.c | 4 ++--
1 file
We are going to fix bio-tables-test in the next patch and hence need to
make sure the acpi tests continue to pass.
Signed-off-by: Ani Sinha
Acked-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-al
Hi Cédric,
I had fixed the function name to support in current branch,
but facing about below error while starting
./build/qemu-system-arm -machine montblanc-bmc -drive
> file=~/flash-montblanc,format=raw,if=mtd -nographic -netdev
> tap,id=netdev0,script=no,downscript=no,ifname=tap0 -net
> nic,n
> On 28-Jun-2023, at 6:19 PM, Ani Sinha wrote:
>
>
>
>> On 28-Jun-2023, at 6:15 PM, Akihiko Odaki wrote:
>>
>> Adding CC.
>>
>> On 2023/06/28 21:24, Akihiko Odaki wrote:
>>> On 2023/06/27 23:32, Ani Sinha wrote:
Hi :
I am proposing a patch in QEMU [1] which may or may not break
Set the TIR default value with the SMT thread index, and place some
standard limits on SMT configurations. Now powernv is able to boot
skiboot and Linux with a SMT topology, including booting a KVM guest.
There are several other per-core SPRs, but they are not so important to
run OPAL/Linux. Some
HID is a per-core shared register, skiboot sets this (e.g., setting
HILE) on one thread and that must affect all threads of the core.
Signed-off-by: Nicholas Piggin
---
target/ppc/cpu_init.c| 2 +-
target/ppc/helper.h | 1 +
target/ppc/misc_helper.c | 21 +
target/
The Power ISA has the concept of sub-processors:
Hardware is allowed to sub-divide a multi-threaded processor into
"sub-processors" that appear to privileged programs as multi-threaded
processors with fewer threads.
POWER9 and POWER10 have two modes, either every thread is a
sub-processor o
These patches implement enough to boot a SMT powernv machine to Linux
and boot a SMP KVM guest inside that.
There are a few more SPRs that need to be done, and per-LPAR SPRs are
mostly not annotated yet so it can't run in 1LPAR mode. But it is
enough to run skiboot/Linux with SMT so I'll just post
The clock update logic reads the clock twice to compute the new clock
value, with a value derived from the later time subtracted from a value
derived from the earlier time. The delta causes time to be lost.
This can ultimately result in time becoming unsynchronized between CPUs
and that can cause
>-Original Message-
>From: Cédric Le Goater
>Sent: Thursday, June 29, 2023 12:04 AM
>To: Martins, Joao ; Avihai Horon
>
>Cc: Alex Williamson ; Juan Quintela
>; Peter Xu ; Leonardo Bras
>; Duan, Zhenzhong ;
>Yishai Hadas ; Jason Gunthorpe ;
>Maor Gottlieb ; Kirti Wankhede
>; Tarun Gupta ; q
Peter Xu writes:
> Display it as long as being set, irrelevant of FAILED status. E.g., it may
> also be applicable to PAUSED stage of postcopy, to provide hint on what has
> gone wrong.
This might have made the documentation slightly inaccurate:
# @error-desc: the human readable error descript
Peter Xu writes:
> We've already did this for most of the return path thread errors, but not
> yet for the IO errors happened on the return path qemufile. Do that too.
>
> Remember to reset "err" always, because the ownership is not us anymore,
> otherwise we're prone to use-after-free later aft
Peter Xu writes:
> rp_state.error was a boolean used to show error happened in return path
> thread. That's not only duplicating error reporting (migrate_set_error),
> but also not good enough in that we only do error_report() and set it to
> true, we never can keep a history of the exact error
Fabiano Rosas writes:
> Philippe Mathieu-Daudé writes:
>
>> On 28/6/23 18:48, Fabiano Rosas wrote:
>>> This code is only relevant when TCG is present in the build. Building
>>> with --disable-tcg --enable-xen on an x86 host we get:
>>>
>>> $ ../configure --target-list=x86_64-softmmu,aarch64-sof
copy hailiang.
On Thu, Jun 22, 2023 at 01:18:46PM +0200, Lukas Straub wrote:
> Like in the normal ram_load() path, put the received pages into the
> colo cache and mark the pages in the bitmap so that they will be
> flushed to the guest later.
>
> Signed-off-by: Juan Quintela
> Signed-off-by: Lu
Philippe Mathieu-Daudé writes:
> On 28/6/23 18:48, Fabiano Rosas wrote:
>> This code is only relevant when TCG is present in the build. Building
>> with --disable-tcg --enable-xen on an x86 host we get:
>>
>> $ ../configure --target-list=x86_64-softmmu,aarch64-softmmu --disable-tcg
>> --enable-
Provide an explicit reason for qemu_file_shutdown()s, which can be
displayed in query-migrate when used.
This will make e.g. migrate-pause to display explicit error descriptions,
from:
"error-desc": "Channel error: Input/output error"
To:
"error-desc": "Channel is explicitly shutdown by the use
This is a small series that reworks error handling of postcopy return path
threads.
We used to contain a bunch of error_report(), converting them into
error_setg() properly and deliver any of those errors to migration generic
error reports (via migrate_set_error()). Then these errors can also be
rp_state.error was a boolean used to show error happened in return path
thread. That's not only duplicating error reporting (migrate_set_error),
but also not good enough in that we only do error_report() and set it to
true, we never can keep a history of the exact error and show it in
query-migrat
There're a lot of cases where we only have an errno set in last_error but
without a detailed error description. When this happens, try to generate
an error contains the errno as a descriptive error.
This will be helpful in cases where one relies on the Error*. E.g.,
migration state only caches E
Display it as long as being set, irrelevant of FAILED status. E.g., it may
also be applicable to PAUSED stage of postcopy, to provide hint on what has
gone wrong.
The error_mutex seems to be overlooked when referencing the error, add it
to be very safe.
Signed-off-by: Peter Xu
---
migration/mi
migrate_set_error() used one error_copy() so it always copy an error.
However that's not the major use case - the major use case is one would
like to pass the error to migrate_set_error() without further touching the
error.
It can be proved if we see most of the callers are freeing the error
expli
Introduce a helper to detect whether MigrationState.error is set for
whatever reason. It is intended to not taking the error_mutex here because
neither do we reference the pointer, nor do we modify the pointer. State
why it's safe to do so.
This is preparation work for any thread (e.g. source re
We've already did this for most of the return path thread errors, but not
yet for the IO errors happened on the return path qemufile. Do that too.
Remember to reset "err" always, because the ownership is not us anymore,
otherwise we're prone to use-after-free later after recovered.
Signed-off-by
If we don't set a proper cbom_blocksize|cboz_blocksize in the FDT the
Linux Kernel will fail to detect the availability of the CBOM/CBOZ
extensions, regardless of the contents of the 'riscv,isa' DT prop.
The FDT is being written using the cpu->cfg.cbom|z_blocksize attributes,
so let's expose them
Update to commit ac9a78681b92 ("Linux 6.4-rc1").
Signed-off-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
---
include/standard-headers/linux/const.h| 2 +-
include/standard-headers/linux/virtio_blk.h | 18 +++
.../standard-headers/linux/virtio_config.h| 6 +++
inclu
riscv_isa_string_ext() is being used by riscv_isa_string(), which is
then used by boards to retrieve the 'riscv,isa' string to be written in
the FDT. All this happens after riscv_cpu_realize(), meaning that we're
already past riscv_cpu_validate_set_extensions() and, more important,
riscv_cpu_disabl
There are 2 places in which we need to get a pointer to a certain
property of the cpu->cfg struct based on property offset. Next patch
will add a couple more.
Create a helper to avoid repeating this code over and over.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
---
target
The absence of a satp mode in riscv_host_cpu_init() is causing the
following error:
$ sudo ./qemu/build/qemu-system-riscv64 -machine virt,accel=kvm \
-m 2G -smp 1 -nographic -snapshot \
-kernel ./guest_imgs/Image \
-initrd ./guest_imgs/rootfs_kvm_riscv64.img \
-append "earlycon=s
Let's add KVM user properties for the multi-letter extensions that KVM
currently supports: zicbom, zicboz, zihintpause, zbb, ssaia, sstc,
svinval and svpbmt.
As with MISA extensions, we're using the KVMCPUConfig type to hold
information about the state of each extension. However, multi-letter
exte
We're now ready to update the multi-letter extensions status for KVM.
kvm_riscv_update_cpu_cfg_isa_ext() is called called during vcpu creation
time to verify which user options changes host defaults (via the 'user_set'
flag) and tries to write them back to KVM.
Failure to commit a change to KVM i
KVM-specific properties are being created inside target/riscv/kvm.c. But
at this moment we're gathering all the remaining properties from TCG and
adding them as is when running KVM. This creates a situation where
non-KVM properties are setting flags to 'true' due to its default
settings (e.g. Zawr
We're going to change the handling of mvendorid/marchid/mimpid by the
KVM driver. Since these are always present in all CPUs let's put the
same validation for everyone.
It doesn't make sense to allow 'mvendorid' to be different than it
is already set in named (vendor) CPUs. Generic (dynamic) CPUs
Allow 'marchid' and 'mimpid' to also be initialized in
kvm_riscv_init_machine_ids().
After this change, the handling of mvendorid/marchid/mimpid for the
'host' CPU type will be equal to what we already have for TCG named
CPUs, i.e. the user is not able to set these values to a different val
than t
Our design philosophy with KVM properties can be resumed in two main
decisions based on KVM interface availability and what the user wants to
do:
- if the user disables an extension that the host KVM module doesn't
know about (i.e. it doesn't implement the kvm_get_one_reg() interface),
keep bootin
At this moment we're retrieving env->misa_ext during
kvm_arch_init_cpu(), leaving env->misa_ext_mask behind.
We want to set env->misa_ext_mask, and we want to set it as early as
possible. The reason is that we're going to use it in the validation
process of the KVM MISA properties we're going to a
Hi,
This new version has changes suggested by Phil in v5. It also has some
changes I made on the fly. The short summary is:
- use "#ifndef CONFIG_USER_MODE kvm_enabled() #endif" instead of a helper
that wraps them all up. This was suggested by Phil to be more clear
about the code that depends
After changing user validation for mvendorid/marchid/mimpid to guarantee
that the value is validated on user input time, coupled with the work in
fetching KVM default values for them by using a scratch CPU, we're
certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are
already good to be
riscv_cpu_add_user_properties() ended up with an excess of "#ifndef
CONFIG_USER_ONLY" blocks after changes that added KVM properties
handling.
KVM specific properties are required to be created earlier than their
TCG counterparts, but the remaining props can be created at any order.
Move riscv_add
Next patch will add KVM specific user properties for both MISA and
multi-letter extensions. For MISA extensions we want to make use of what
is already available in misa_ext_cfgs[] to avoid code repetition.
misa_ext_info_arr[] array will hold name and description for each MISA
extension that misa_e
Following the same logic used with 'mvendorid' let's also restrict
'mimpid' for named CPUs. Generic CPUs keep setting the value freely.
Note that we're getting rid of the default RISCV_CPU_MARCHID value. The
reason is that this is not a good default since it's dynamic, changing
with with every QEM
'marchid' shouldn't be set to a different value as previously set for
named CPUs.
For all other CPUs it shouldn't be freely set either - the spec requires
that 'marchid' can't have the MSB (most significant bit) set and every
other bit set to zero, i.e. 0x8000 is an invalid 'marchid' value for
Certain validations, such as the validations done for the machine IDs
(mvendorid/marchid/mimpid), are done before starting the CPU.
Non-dynamic (named) CPUs tries to match user input with a preset
default. As it is today we can't prefetch a KVM default for these cases
because we're only able to rea
Using all TCG user properties in KVM is tricky. First because KVM
supports only a small subset of what TCG provides, so most of the
cpu->cfg flags do nothing for KVM.
Second, and more important, we don't have a way of telling if any given
value is an user input or not. For TCG this has a small imp
As it is today it's not possible to use '-cpu host' if the RISC-V host
has RVH enabled. This is the resulting error:
$ sudo ./qemu/build/qemu-system-riscv64 \
-machine virt,accel=kvm -m 2G -smp 1 \
-nographic -snapshot -kernel ./guest_imgs/Image \
-initrd ./guest_imgs/rootfs_kvm_riscv
On Wed, 28 Jun 2023 10:31:10 +0300
Avihai Horon wrote:
> Hello,
>
> The major parts of VFIO migration are supported today in QEMU. This
> includes basic VFIO migration, device dirty page tracking and precopy
> support. Thus, at this point in time, it seems appropriate to make VFIO
> migration no
Following are done to fix the coverity issues:
1. Change read_data to fix the CID 1512899: Out-of-bounds access (OVERRUN)
2. Fix match_rx_tx_data to fix CID 1512900: Logically dead code (DEADCODE)
3. Replace rand() in generate_random_data() with g_rand_int()
Signed-off-by: Vikram Garhwal
---
tes
On 28/6/23 18:48, Fabiano Rosas wrote:
This code is only relevant when TCG is present in the build. Building
with --disable-tcg --enable-xen on an x86 host we get:
$ ../configure --target-list=x86_64-softmmu,aarch64-softmmu --disable-tcg
--enable-xen
$ make -j$(nproc)
...
libqemu-aarch64-softmm
On 28/6/23 19:29, Alex Williamson wrote:
Cédric has stepped up involvement in vfio, reviewing and managing
patches, as well as pull requests. This work deserves gratitude and
punishment with a promotion to co-maintainer ;)
Signed-off-by: Alex Williamson
---
Cédric, I'd also support if you wan
The goal is to eliminate i440fx_init() which is a legacy init function. This
neccessitates the memory regions to be properties, like in Q35, which will be
assigned in board code.
Since i440fx needs different PCI devices in Xen mode, and since i440fx shall
be self-contained, the PCI device will be
The Q35 PCI host already has a PCI_HOST_BYPASS_IOMMU property. However, the
host initializes this property itself by accessing global machine state,
thereby assuming it to be a PC machine. Avoid this by having board code
set this property.
Signed-off-by: Bernhard Beschow
Reviewed-by: Igor Mammedo
Introduce the property in anticipation of QOM'ification; Q35 has the same
property.
Signed-off-by: Bernhard Beschow
---
hw/pci-host/i440fx.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index efc940ba12..a740d1762
i440fx_realize() realizes the PCI device inside the host bridge
(PCII440FXState), but is implemented between i440fx_pcihost_realize() and
i440fx_init() which deal with the host bridge itself (I440FXState). Since we
want to append i440fx_init() to i440fx_pcihost_realize() later let's move
i440fx_rea
Eliminates an else branch.
Suggested-by: Igor Mammedov
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 1df309b8e2..d07218a8c9 100644
--- a/hw/i386/pc_piix.c
+++ b/
I440FX needs a different PCI device model if the "igd-passthru" property is
enabled. The type name is currently passed as a parameter to i440fx_init(). This
parameter will be replaced by a property assignment once i440fx_init() gets
resolved.
Signed-off-by: Bernhard Beschow
---
include/hw/pci-ho
`PCIHostState` is often referred to as `phb`, own device state usually as `s`.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
hw/pci-host/i440fx.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/hw/pci-host/i440fx.c b/hw/
i440fx_init() is a legacy init function. The previous patches worked towards
TYPE_I440FX_PCI_HOST_BRIDGE to be instantiated the QOM way. Do this now by
transforming the parameters passed to i440fx_init() into property assignments.
Signed-off-by: Bernhard Beschow
---
include/hw/pci-host/i440fx.h
Introduce a macro to avoid copy and pasting strings which can easily
cause typos.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Bernhard Beschow
Reviewed-by: Igor Mammedov
---
include/hw/pci/pci_host.h | 2 ++
hw/pci/pci_host.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
Signed-off-by: Bernhard Beschow
Reviewed-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
hw/pci-host/i440fx.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index 61e7b97ff4..daa4d11104 100644
--- a/hw/pci-host/i
Fixes the following clangd warning (-Winitializer-overrides):
q35.c:297:19: Initializer overrides prior initialization of this subobject
q35.c:292:19: previous initialization is here
Settle on little endian which is consistent with using pci_host_conf_le_ops.
Fixes: bafc90bdc594 ("q35: imple
I440FX realization is currently mixed with PIIX3 creation. Furthermore, it is
common practice to only set properties between a device's qdev_new() and
qdev_realize(). Clean up to resolve both issues.
Since I440FX spawns a PCI bus let's also move the pci_bus initialization there.
Note that when ru
This series resolves the legacy i440fx_init() function and instantiates the
I440FX host bridge the QOM way. As a preparation the Q35 host bridge receives
some cleanup as well.
Most of the Q35 patches have been submitted under [1] before. This series
incorporates only the changes making the two dev
Introduce the properties in anticipation of QOM'ification; Q35 has the same
properties.
Note that we want to avoid a "ram size" property in the QOM interface since it
seems redundant to both properties introduced in this change. Thus the removal
of the ram_size parameter. We assume the invariant o
The Q35 PCI host currently sets the PC machine's PCI bus attribute
through global state, thereby assuming the machine to be a PC machine.
The Q35 machine code already holds on to Q35's pci bus attribute, so can
easily set its own property while preserving encapsulation.
Signed-off-by: Bernhard Bes
The variable is redundant to "phb" and is never used by its real type.
Signed-off-by: Bernhard Beschow
Reviewed-by: Thomas Huth
---
hw/i386/pc_q35.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 11a708
Signed-off-by: Bernhard Beschow
---
include/hw/i386/pc.h | 4
include/hw/pci-host/q35.h | 5 -
hw/i386/pc_q35.c | 8
hw/pci-host/q35.c | 8
4 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
Observed a wrong context is bound when changing the scanout mode.
To prevent problem, it is needed to make sure to bind the right
context in gtk_egl_set_scanout_mode/gtk_gl_area_set_scanout_mode
as well as unbind one in the end of gd_egl_update/gd_gl_area_update.
Cc: Gerd Hoffmann
Cc: Marc-André
Skip refresh if a new dmabuf (guest scanout frame) is submitted
and ready to be drawn because the scanout will be refreshed with
new frame anyway.
Also, setting scanout mode is better to be done right before
a draw event is scheduled because the mode can be reset anytime
after it is set in dpy_gl_
Marcelo Tosatti, Jun 28, 2023 at 19:26:
Hi Marcelo,
> On Fri, Jun 16, 2023 at 04:08:30PM +0200, Anthony Harivel wrote:
> This feature is activated with -accel kvm,rapl=true.
>
>> I suppose this should be a CPU flag instead? -cpu xxx,rapl=on.
It's possible yes then I might need to make sure that
Cédric has stepped up involvement in vfio, reviewing and managing
patches, as well as pull requests. This work deserves gratitude and
punishment with a promotion to co-maintainer ;)
Signed-off-by: Alex Williamson
---
Cédric, I'd also support if you wanted to add a tree entry here.
MAINTAINERS
On Fri, Jun 16, 2023 at 04:08:30PM +0200, Anthony Harivel wrote:
> Starting with the "Sandy Bridge" generation, Intel CPUs provide a RAPL
> interface (Running Average Power Limit) for advertising the accumulated
> energy consumption of various power domains (e.g. CPU packages, DRAM,
> etc.).
>
> T
On Thu, Jun 22, 2023 at 01:37:31PM -0700, Steve Sistare wrote:
> Allow an offset option to be specified as part of the file URI, in
> the form "file:filename,offset=offset", where offset accepts the common
> size suffixes, or the 0x prefix, but not both. Migration data is written
> to and read fro
On Wed, Jun 28, 2023 at 01:07:24PM -0400, Peter Xu wrote:
> On Thu, Jun 22, 2023 at 01:37:30PM -0700, Steve Sistare wrote:
> > Extend the migration URI to support file:. This can be used for
> > any migration scenario that does not require a reverse path. It can be
> > used as an alternative to '
17.06.2023 08:36, Bin Meng wrote:
Current codes using a brute-force traversal of all file descriptors
do not scale on a system where the maximum number of file descriptors
is set to a very large value (e.g.: in a Docker container of Manjaro
distribution it is set to 1073741816). QEMU just looks
The 05/15/2023 16:22, Jonathan Cameron wrote:
> On Thu, 11 May 2023 17:56:40 +
> Fan Ni wrote:
>
> > From: Fan Ni
> >
> > Before the change, read from or write to dynamic capacity of the memory
> > device is not support as 1) no host backed file/memory is provided for
> > it; 2) no address
On Thu, Jun 22, 2023 at 01:37:30PM -0700, Steve Sistare wrote:
> Extend the migration URI to support file:. This can be used for
> any migration scenario that does not require a reverse path. It can be
> used as an alternative to 'exec:cat > file' in minimized containers that
> do not contain /bi
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