Re: [PATCH v2 07/21] include/exec/memattrs: Add two bits of space to MemTxAttrs

On 21/2/23 00:26, Richard Henderson wrote: We will need 2 bits to represent ARMSecurityState. Do not attempt to replace or widen secure, even though it logically overlaps the new field -- there are uses within e.g. hw/block/pflash_cfi01.c, which don't know anything specific about ARM. Reviewed-

Re: [PATCH 2/2] qga/win32: Use rundll for VSS installation

Reviewed-by: Yan Vugenfirer On Mon, Feb 20, 2023 at 7:41 PM Konstantin Kostiuk wrote: > > Add specific an entry points for rundll which is > just a wrapper for COMRegister/COMUnregister functions. > > resolves: rhbz#2167436 > fixes: CVE-2023-0664 > > Signed-off-by: Konstantin Kostiuk > --- >

Re: [PATCH 1/2] qga/win32: Remove change action from MSI installer

Reviewed-by: Yan Vugenfirer On Mon, Feb 20, 2023 at 7:41 PM Konstantin Kostiuk wrote: > > resolves: rhbz#2167436 > fixes: CVE-2023-0664 > > Signed-off-by: Konstantin Kostiuk > --- > qga/installer/qemu-ga.wxs | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/qga/installer/qemu-ga.wxs b/q

Re: [PATCH v3 2/6] configure: Add courtesy hint to Python version failure message

On 21/2/23 02:24, John Snow wrote: If we begin requiring Python 3.7+, a few platforms are going to need to install an additional Python interpreter package. As a courtesy to the user, suggest the optional package they might need to install. This will hopefully minimize any downtime caused by the

Re: [PATCH v2 14/14] target/arm: Implement gdbstub m-profile systemreg and secext

On 21/2/23 03:19, Richard Henderson wrote: The upstream gdb xml only implements {MSP,PSP}{,_NS,S}, but go ahead and implement the other system registers as well. Since there is significant overlap between the two, implement them with common code. The only exception is the systemreg view of CONT

Re: [PATCH v2 13/14] target/arm: Export arm_v7m_get_sp_ptr

On 21/2/23 03:19, Richard Henderson wrote: From: David Reiss Allow the function to be used outside of m_helper.c. Move to be outside of ifndef CONFIG_USER_ONLY block. Rename from get_v7m_sp_ptr. Reviewed-by: Peter Maydell Signed-off-by: David Reiss [rth: Split out of a larger patch] Signed-o

Re: [PATCH v2 12/14] target/arm: Export arm_v7m_mrs_control

On 21/2/23 03:19, Richard Henderson wrote: From: David Reiss Allow the function to be used outside of m_helper.c. Rename with an "arm_" prefix. Reviewed-by: Peter Maydell Signed-off-by: David Reiss [rth: Split out of a larger patch] Signed-off-by: Richard Henderson --- target/arm/internal

Re: [PATCH v2 08/14] target/arm: Add name argument to output_vector_union_type

On 21/2/23 03:19, Richard Henderson wrote: This will make the function usable between SVE and SME. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) Reviewed-by: Phili

Re: [PATCH v2 06/14] target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml

On 21/2/23 03:19, Richard Henderson wrote: Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v2 05/14] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml

On 21/2/23 03:19, Richard Henderson wrote: Rather than increment base_reg and num, compute num from the change to base_reg at the end. Clean up some nearby comments. Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 27 --- 1 file changed, 16 insertions(+

Re: [PATCH v11 0/9] support subsets of code size reduction extension

Hi,  any  new comments for this patchset? Regards, Weiwei Li On 2023/2/9 12:13, Weiwei Li wrote: This patchset implements RISC-V Zc* extension v1.0.2-1 version instructions. Specification: https://github.com/riscv/riscv-code-size-reduction/tree/main/Zc-specification The port is available her

Re: [PATCH v2 02/14] target/arm: Unexport arm_gen_dynamic_sysreg_xml

On 21/2/23 03:19, Richard Henderson wrote: This function is not used outside gdbstub.c. Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/cpu.h | 1 - target/arm/gdbstub.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-D

Re: [PATCH v2 03/14] target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c

On 21/2/23 03:19, Richard Henderson wrote: The function is only used for aarch64, so move it to the file that has the other aarch64 gdbstub stuff. Move the declaration to internals.h. Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 --- target/a

Re: [PATCH v2 01/14] target/arm: Normalize aarch64 gdbstub get/set function names

On 21/2/23 03:19, Richard Henderson wrote: Make the form of the function names between fp and sve the same: - arm_gdb_*_svereg -> aarch64_gdb_*_sve_reg. - aarch64_fpu_gdb_*_reg -> aarch64_gdb_*_fpu_reg. Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/internal

Re: [PATCH v3 6/6] Python: Drop support for Python 3.6

John Snow writes: > Python 3.6 was EOL 2021-12-31. Newer versions of upstream libraries have > been dropping support for this version and it is becoming more > cumbersome to support. Avocado-framework and qemu.qmp each have their > own reasons for wanting to drop Python 3.6, but won't until QEMU

Re: [PATCH v2 04/13] vdpa: move vhost reset after get vring base

On Tue, Feb 21, 2023 at 6:36 AM Jason Wang wrote: > > > 在 2023/2/8 17:42, Eugenio Pérez 写道: > > The function vhost.c:vhost_dev_stop calls vhost operation > > vhost_dev_start(false). In the case of vdpa it totally reset and wipes > > the device, making the fetching of the vring base (virtqueue stat

Re: [PATCH v2 03/13] vdpa: add vhost_vdpa_suspend

On Tue, Feb 21, 2023 at 6:33 AM Jason Wang wrote: > > > 在 2023/2/21 13:27, Jason Wang 写道: > > > > 在 2023/2/8 17:42, Eugenio Pérez 写道: > >> The function vhost.c:vhost_dev_stop fetches the vring base so the vq > >> state can be migrated to other devices. However, this is unreliable in > >> vdpa, si

Re: [PATCH v3 0/6] Python: Drop support for Python 3.6

John Snow writes: > CI: https://gitlab.com/jsnow/qemu/-/pipelines/783612696 > [Updated for v3, still all green.] > GL: https://gitlab.com/jsnow/qemu/-/commits/python-require-37 > > Hi, discussion about this series is ongoing. This series (v3) is not > meant to address all of that discussion,

Re: [PATCH v3 5/6] meson: prefer 'sphinx-build' to 'sphinx-build-3'

John Snow writes: > Once upon a time, "sphinx-build" on certain RPM platforms invoked > specifically a Python 2.x version, while "sphinx-build-3" was a distro > shim for the Python 3.x version. > > These days, none of our supported platforms utilize a 2.x version, so it > should be safe to search

Re: [PATCH v4 0/6] qapi: static typing conversion, pt5c

John Snow writes: > On Wed, Feb 15, 2023 at 8:39 AM Markus Armbruster wrote: >> >> I had a few suggestions, but none of them requires a respin. Let's >> discuss them, and then I merge. > > Hiya, I lost track of things a little due to the other Python > discussion. Who is waiting for whom? Just

Re: online blockdev-backup, a clarification (was: Summary on new backup interfaces in QEMU)

On 20.02.23 18:18, John Maline wrote: As a qemu newcomer I had a related question and confusion from reading existing docs. Searching qemu-block, this seemed related to my question so I’ll ask… On Mar 15, 2022, at 12:57 PM, Vladimir Sementsov-Ogievskiy wrote: Hi all! Here I want to summar

[PATCH] hw/riscv: Skip re-generating DT nodes for a given DTB

Lanuch qemu-system-riscv64 with a given dtb for 'sifive_u' and 'virt' machines, QEMU complains: qemu_fdt_add_subnode: Failed to create subnode /soc: FDT_ERR_EXISTS The whole DT generation logic should be skipped when a given DTB is present. Fixes: b1f19f238cae ("hw/riscv: write bootargs 'chose

Re: [PATCH v2 05/13] vdpa: rewind at get_base, not set_base

在 2023/2/8 17:42, Eugenio Pérez 写道: At this moment it is only possible to migrate to a vdpa device running with x-svq=on. As a protective measure, the rewind of the inflight descriptors was done at the destination. That way if the source sent a virtqueue with inuse descriptors they are always d

Re: [PATCH v2 04/13] vdpa: move vhost reset after get vring base

在 2023/2/8 17:42, Eugenio Pérez 写道: The function vhost.c:vhost_dev_stop calls vhost operation vhost_dev_start(false). In the case of vdpa it totally reset and wipes the device, making the fetching of the vring base (virtqueue state) totally useless. The kernel backend does not use vhost_dev_st

Re: [PATCH v2 03/13] vdpa: add vhost_vdpa_suspend

在 2023/2/21 13:27, Jason Wang 写道: 在 2023/2/8 17:42, Eugenio Pérez 写道: The function vhost.c:vhost_dev_stop fetches the vring base so the vq state can be migrated to other devices.  However, this is unreliable in vdpa, since we didn't signal the device to suspend the queues, making the value fe

Re: [PATCH v2 03/13] vdpa: add vhost_vdpa_suspend

在 2023/2/8 17:42, Eugenio Pérez 写道: The function vhost.c:vhost_dev_stop fetches the vring base so the vq state can be migrated to other devices. However, this is unreliable in vdpa, since we didn't signal the device to suspend the queues, making the value fetched useless. Suspend the device i

Re: [PATCH v3 6/8] target/i386/intel-pt: Enable host pass through of Intel PT

On 12/8/2022 2:25 PM, Xiaoyao Li wrote: > commit e37a5c7fa459 ("i386: Add Intel Processor Trace feature support") > added the support of Intel PT by making CPUID[14] of PT as fixed feature > set (from ICX) for any CPU model on any host. This truly breaks the PT > exposure on Intel SPR platform be

[PATCH 2/2] target/arm: Fix arm_cpu_get_phys_page_attrs_debug for m-profile

M-profile is not supported by arm_is_secure, so using it as a replacement when bypassing get_phys_addr was incorrect. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1421 Fixes: 4a35855682ce ("target/arm: Plumb debug into S1Translate") Signed-off-by: Richard Henderson --- target/arm/ptw.

[PATCH 1/2] Revert "target/arm: Merge regime_is_secure into get_phys_addr"

This reverts commit 03bea66e7fa3af42976ceafb20512c59abf2e699, but restore into ptw.c instead of internals.h. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.

[PATCH 0/2] target/arm: Fix gdbstub for m-profile (#1421)

This will conflict with FEAT_RME patches; I'll fix that up later. r~ Richard Henderson (2): Revert "target/arm: Merge regime_is_secure into get_phys_addr" target/arm: Fix arm_cpu_get_phys_page_attrs_debug for m-profile target/arm/ptw.c | 33 + 1 file change

Re: [PATCH v5 21/29] hw/net/net_tx_pkt: Automatically determine if virtio-net header is used

在 2023/2/1 11:35, Akihiko Odaki 写道: The new function qemu_get_using_vnet_hdr() allows to automatically determine if virtio-net header is used. Signed-off-by: Akihiko Odaki --- hw/net/e1000e_core.c | 3 +-- hw/net/net_tx_pkt.c | 19 ++- hw/net/net_tx_pkt.h | 3 +-- hw/

Re: [RFC v5 0/3] migration: reduce time of loading non-iterable vmstate

Hi, Peter It seems that there is a problem with the code format in my last email. I adjusted the format and resend this to you. Hope the format of this email won't be wrong again..  :) On 2023/2/17 下午11:52, Peter Xu wrote: Hello, Chuang, On Fri, Feb 17, 2023 at 04:11:19PM +0800, Chuang Xu wrot

[PATCH v2 10/14] target/arm: Create pauth_ptr_mask

Keep the logic for pauth within pauth_helper.c, and expose a helper function for use with the gdbstub pac extension. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/internals.h| 10 ++ target/arm/pauth_helper.c | 26 ++ 2 files chan

[PATCH v2 11/14] target/arm: Implement gdbstub pauth extension

The extension is primarily defined by the Linux kernel NT_ARM_PAC_MASK ptrace register set. The original gdb feature consists of two masks, data and code, which are used to mask out the authentication code within a pointer. Following discussion with Luis Machado, add two more masks in order to su

[PATCH v2 06/14] target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml

Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 070ba20d99..895e19f084 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstu

[PATCH v2 01/14] target/arm: Normalize aarch64 gdbstub get/set function names

Make the form of the function names between fp and sve the same: - arm_gdb_*_svereg -> aarch64_gdb_*_sve_reg. - aarch64_fpu_gdb_*_reg -> aarch64_gdb_*_fpu_reg. Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/internals.h | 8 target/arm/gdbstub.c | 9 +++

[PATCH v2 09/14] target/arm: Simplify iteration over bit widths

Order suf[] by the log8 of the width. Use ARRAY_SIZE instead of hard-coding 128. This changes the order of the union definitions, but retains the order of the union-of-union members. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 10 ++ 1 file

[PATCH v2 14/14] target/arm: Implement gdbstub m-profile systemreg and secext

The upstream gdb xml only implements {MSP,PSP}{,_NS,S}, but go ahead and implement the other system registers as well. Since there is significant overlap between the two, implement them with common code. The only exception is the systemreg view of CONTROL, which merges the banked bits as per MRS.

[PATCH v2 13/14] target/arm: Export arm_v7m_get_sp_ptr

From: David Reiss Allow the function to be used outside of m_helper.c. Move to be outside of ifndef CONFIG_USER_ONLY block. Rename from get_v7m_sp_ptr. Reviewed-by: Peter Maydell Signed-off-by: David Reiss [rth: Split out of a larger patch] Signed-off-by: Richard Henderson --- target/arm/int

[PATCH v2 07/14] target/arm: Fix svep width in arm_gen_dynamic_svereg_xml

Define svep based on the size of the predicates, not the primary vector registers. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 895

[PATCH v2 00/14] target/arm: gdbstub cleanups and additions

This is my pauth enhancements from last year, the corresponding gdb patches for which are nearing merge. If lore and patchew are to be believed, I never posted this to the list, only pushed a branch so that issue #1105 could see it. Since the cleanups there conflict with the recent m-profile gdbs

[PATCH v2 08/14] target/arm: Add name argument to output_vector_union_type

This will make the function usable between SVE and SME. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index

[PATCH v2 02/14] target/arm: Unexport arm_gen_dynamic_sysreg_xml

This function is not used outside gdbstub.c. Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/cpu.h | 1 - target/arm/gdbstub.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 12b1082537..32ca6c9a0d 10

[PATCH v2 12/14] target/arm: Export arm_v7m_mrs_control

From: David Reiss Allow the function to be used outside of m_helper.c. Rename with an "arm_" prefix. Reviewed-by: Peter Maydell Signed-off-by: David Reiss [rth: Split out of a larger patch] Signed-off-by: Richard Henderson --- target/arm/internals.h | 3 +++ target/arm/m_helper.c | 6 +++---

[PATCH v2 03/14] target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c

The function is only used for aarch64, so move it to the file that has the other aarch64 gdbstub stuff. Move the declaration to internals.h. Reviewed-by: Fabiano Rosas Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 --- target/arm/internals.h | 1 + target/arm/gdbstub.c

[PATCH v2 04/14] target/arm: Split out output_vector_union_type

Create a subroutine for creating the union of unions of the various type sizes that a vector may contain. Reviewed-by: Fabiano Rosas Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 83 +++--- 1 file changed, 45 insert

[PATCH v2 05/14] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml

Rather than increment base_reg and num, compute num from the change to base_reg at the end. Clean up some nearby comments. Signed-off-by: Richard Henderson --- target/arm/gdbstub64.c | 27 --- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/target/arm/gdb

[PATCH v3 6/6] Python: Drop support for Python 3.6

Python 3.6 was EOL 2021-12-31. Newer versions of upstream libraries have been dropping support for this version and it is becoming more cumbersome to support. Avocado-framework and qemu.qmp each have their own reasons for wanting to drop Python 3.6, but won't until QEMU does. Versions of Python av

[PATCH v3 1/6] configure: Look for auxiliary Python installations

At the moment, we look for just "python3" and "python", which is good enough almost all of the time. But ... if you are on a platform that uses an older Python by default and only offers a newer Python as an option, you'll have to specify --python=/usr/bin/foo every time. As a courtesy, we can mak

Re: [PATCH v4 0/6] qapi: static typing conversion, pt5c

On Wed, Feb 15, 2023 at 8:39 AM Markus Armbruster wrote: > > I had a few suggestions, but none of them requires a respin. Let's > discuss them, and then I merge. Hiya, I lost track of things a little due to the other Python discussion. Who is waiting for whom? --js

[PATCH v3 0/6] Python: Drop support for Python 3.6

CI: https://gitlab.com/jsnow/qemu/-/pipelines/783612696 [Updated for v3, still all green.] GL: https://gitlab.com/jsnow/qemu/-/commits/python-require-37 Hi, discussion about this series is ongoing. This series (v3) is not meant to address all of that discussion, but rather is an updated baseli

[PATCH v3 2/6] configure: Add courtesy hint to Python version failure message

If we begin requiring Python 3.7+, a few platforms are going to need to install an additional Python interpreter package. As a courtesy to the user, suggest the optional package they might need to install. This will hopefully minimize any downtime caused by the change in Python dependency. Signed

[PATCH v3 5/6] meson: prefer 'sphinx-build' to 'sphinx-build-3'

Once upon a time, "sphinx-build" on certain RPM platforms invoked specifically a Python 2.x version, while "sphinx-build-3" was a distro shim for the Python 3.x version. These days, none of our supported platforms utilize a 2.x version, so it should be safe to search for 'sphinx-build' prior to 's

[PATCH v3 4/6] DO-NOT-MERGE: testing: add pip-installed sphinx-build to CentOS 8

This is just for sake of demonstration again; by modifying the dockerfile we can continue to support building docs on CentOS 8 with minimal pain. Note: This uses pip to install packages as root; this is hygienically not a *great* idea for arbitrary systems. For CI, I am abusing the fact that this

[PATCH v3 3/6] DO-NOT-MERGE: testing: Add Python >= 3.7 to Centos, OpenSuSE

This is just a proof-of-concept patch, as these files are lcitool generated. The real fix will involve updating the lcitool configuration and updating these files that way. Paolo has been working on this part: https://lists.gnu.org/archive/html/qemu-devel/2023-01/msg03547.html This patch, meanwhi

Re: [PATCH v2 07/18] hw/ide/piix: Ensure IDE output IRQs are wired at realization

On Mon, 20 Feb 2023, Bernhard Beschow wrote: IIUC, QEMU guarantees a deprecation period for at least two major versions. So if we deprecated user-creatable piix-ide in 8.1, we are not allowed to remove it before 10.1. Let's stick to our rules to give our users a chance to adapt gracefully. I

Re: [PATCH v2 07/18] hw/ide/piix: Ensure IDE output IRQs are wired at realization

Am 19. Februar 2023 21:54:34 UTC schrieb "Philippe Mathieu-Daudé" : >+Daniel, Igor, Marcel & libvirt > >On 16/2/23 16:33, Philippe Mathieu-Daudé wrote: >> On 16/2/23 15:43, Bernhard Beschow wrote: >>> >>> >>> On Wed, Feb 15, 2023 at 5:20 PM Philippe Mathieu-Daudé >>

Re: [PATCH 21/22] target/arm: Enable RME for -cpu max

On 2/10/23 04:20, Peter Maydell wrote: On Tue, 24 Jan 2023 at 00:01, Richard Henderson wrote: Add a cpu property to set GPCCR_EL3.L0GPTSZ, for testing various possible configurations. Signed-off-by: Richard Henderson Looks OK, but I think we probably shouldn't enable RME by default until w

[PATCH v2 02/21] target/arm: Add isar_feature_aa64_rme

Add the missing field for ID_AA64PFR0, and the predicate. Disable it if EL3 is forced off by the board or command-line. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 ++ target/arm/cpu.c | 4 2 files changed, 10 insertions(+) diff --git a/target/

[PATCH v2 15/21] target/arm: Move s1_is_el0 into S1Translate

Instead of passing this to get_phys_addr_lpae, stash it in the S1Translate structure. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/ptw.c | 26 -- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/p

[PATCH v2 01/21] target/arm: Rewrite check_s2_mmu_setup

Integrate neighboring code from get_phys_addr_lpae which computed starting level, as it is easier to validate when doing both at the same time. Mirror the checks at the start of AArch{64,32}.S2Walk, especially S2InvalidSL and S2InconsistentSL. This reverts 49ba115bb74, which was incorrect -- ther

[PATCH v2 12/21] target/arm: Handle Block and Page bits for security space

With Realm security state, bit 55 of a block or page descriptor during the stage2 walk becomes the NS bit; during the stage1 walk the bit 5 NS bit is RES0. With Root security state, bit 11 of the block or page descriptor during the stage1 walk becomes the NSE bit. Rather than collecting an NS bit

[PATCH v2 19/21] target/arm: Implement the granule protection check

Place the check at the end of get_phys_addr_with_struct, so that we check all physical results. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/ptw.c | 246 +++ 1 file changed, 228 insertions(+), 18 deletions(-) diff --git

[PATCH v2 14/21] target/arm: Use get_phys_addr_with_struct in S1_ptw_translate

Do not provide a fast-path for physical addresses, as those will need to be validated for GPC. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/ptw.c | 35 ++- 1 file changed, 14 insertions(+), 21 deletions(-) diff --git a/target/arm/pt

[PATCH v2 17/21] target/arm: Add GPC syndrome

The function takes the fields as filled in by the Arm ARM pseudocode for TakeGPCException. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/syndrome.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h index d2

[NOTFORMERGE PATCH v2 20/21] target/arm: Enable RME for -cpu max

Add a cpu property to set GPCCR_EL3.L0GPTSZ, for testing various possible configurations. Signed-off-by: Richard Henderson --- target/arm/cpu64.c | 37 + 1 file changed, 37 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 4066950da1..7

[NOTFORMERGE PATCH v2 21/21] hw/arm/virt: Add some memory for Realm Management Monitor

This is arbitrary, but used by the Huawei TF-A test code. Signed-off-by: Richard Henderson --- include/hw/arm/virt.h | 2 ++ hw/arm/virt.c | 43 +++ 2 files changed, 45 insertions(+) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h inde

[PATCH v2 05/21] target/arm: Add RME cpregs

This includes GPCCR, GPTBR, MFAR, the TLB flush insns PAALL, PAALLOS, RPALOS, RPAOS, and the cache flush insns CIPAPA and CIGDPAPA. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h| 19 +++ target/arm/helper.c | 83

[PATCH v2 04/21] target/arm: SCR_EL3.NS may be RES1

With RME, SEL2 must also be present to support secure state. The NS bit is RES1 if SEL2 is not present. Signed-off-by: Richard Henderson --- target/arm/helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index 42d94e0904..2ebca3e2b6 100644 --

[PATCH v2 13/21] target/arm: Handle no-execute for Realm and Root regimes

While Root and Realm may read and write data from other spaces, neither may execute from other pa spaces. This happens for Stage1 EL3, EL2, EL2&0, but stage2 EL1&0. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 52 ++-- 1 file changed, 46 in

[PATCH v2 10/21] target/arm: Pipe ARMSecuritySpace through ptw.c

Add input and output space members to S1Translate. Set and adjust them in S1_ptw_translate, and the various points at which we drop secure state. Initialize the space in get_phys_addr; for now leave get_phys_addr_with_secure considering only secure vs non-secure spaces. Reviewed-by: Peter Maydell

[PATCH v2 09/21] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root}

With FEAT_RME, there are four physical address spaces. For now, just define the symbols, and mention them in the same spots as the other Phys indexes in ptw.c. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu-param.h | 2 +- target/arm/cpu.h | 23 +++

[PATCH v2 16/21] target/arm: Use get_phys_addr_with_struct for stage2

This fixes a bug in which we failed to initialize the result attributes properly after the memset. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 13 + 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index d4027ce763..a797750

[PATCH v2 07/21] include/exec/memattrs: Add two bits of space to MemTxAttrs

We will need 2 bits to represent ARMSecurityState. Do not attempt to replace or widen secure, even though it logically overlaps the new field -- there are uses within e.g. hw/block/pflash_cfi01.c, which don't know anything specific about ARM. Reviewed-by: Peter Maydell Signed-off-by: Richard Hen

[PATCH v2 18/21] target/arm: Implement GPC exceptions

Handle GPC Fault types in arm_deliver_fault, reporting as either a GPC exception at EL3, or falling through to insn or data aborts at various exception levels. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h| 1 + target/arm/internals.h | 27 ++

[PATCH v2 03/21] target/arm: Update SCR and HCR for RME

Define the missing SCR and HCR bits, allow SCR_NSE and {SCR,HCR}_GPF to be set, and invalidate TLBs when NSE changes. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h| 5 +++-- target/arm/helper.c | 10 -- 2 files changed, 11 insertions(+), 4 deletio

[PATCH v2 00/21] target/arm: Implement FEAT_RME

This is based on mainline, without any extra ARMv9-A dependencies which are still under development. This is good enough to pass all of the tests within https://github.com/Huawei/Huawei_CCA_QEMU Changes for v2: * Drop "Fix pmsav8 stage2 secure parameter". * Incorporate review feedback.

[PATCH v2 06/21] target/arm: Introduce ARMSecuritySpace

Introduce both the enumeration and functions to retrieve the current state, and state outside of EL3. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h| 86 +++-- target/arm/helper.c | 54 2

[PATCH v2 11/21] target/arm: NSTable is RES0 for the RME EL3 regime

Test in_space instead of in_secure so that we don't switch out of Root space. Handle the output space change immediately, rather than try and combine the NSTable and NS bits later. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 27 ++- 1 file changed, 14 inserti

[PATCH v2 08/21] target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx

It will be helpful to have ARMMMUIdx_Phys_* to be in the same relative order as ARMSecuritySpace enumerators. This requires the adjustment to the nstable check. While there, check for being in secure state rather than rely on clearing the low bit making no change to non-secure state. Reviewed-by:

Re: [PATCH] hw/acpi: Set memory regions to native endian as a work around

On Mon, 20 Feb 2023, Michael S. Tsirkin wrote: On Mon, Feb 20, 2023 at 07:24:59PM +0100, BALATON Zoltan wrote: On Tue, 22 Feb 2022, Michael S. Tsirkin wrote: On Wed, Jan 19, 2022 at 04:19:14AM -0500, Michael S. Tsirkin wrote: On Sat, Nov 13, 2021 at 07:47:20PM +0100, BALATON Zoltan wrote: On

Re: [PATCH 5/6] hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps

Nathan Chancellor writes: > Hi Philippe, > > On Wed, Jan 04, 2023 at 02:39:34PM +0100, Philippe Mathieu-Daudé wrote: >> GT64120's PCI endianness swapping works on little-endian hosts, >> but doesn't on big-endian ones. Instead of complicating how >> CFGADDR/CFGDATA registers deal with endiannes

Re: [Pixman] pixman_blt on aarch64

On 2/19/23 00:38, BALATON Zoltan wrote: On Sun, 5 Feb 2023, BALATON Zoltan wrote: On Sun, 5 Feb 2023, Richard Henderson wrote: On 2/4/23 06:57, BALATON Zoltan wrote: This has just bounced, I hoped to still b

Re: [PATCH] hw/acpi: Set memory regions to native endian as a work around

On Mon, Feb 20, 2023 at 07:24:59PM +0100, BALATON Zoltan wrote: > On Tue, 22 Feb 2022, Michael S. Tsirkin wrote: > > On Wed, Jan 19, 2022 at 04:19:14AM -0500, Michael S. Tsirkin wrote: > > > On Sat, Nov 13, 2021 at 07:47:20PM +0100, BALATON Zoltan wrote: > > > > On Mon, 8 Nov 2021, BALATON Zoltan w

Re: Detecting qemu from guest on arm/hvf (apple arm)

Hello Peter, btw, please keep me CC'd, as I'm not subscribed to the mailing list. > I guess the question is, why do you want to know? Typically The main reason is that FreeBSD (and other operating systems) adjust some of the clock periods to be longer for better effeciency. When FreeBSD detects

Re: [PATCH 17/22] target/arm: Use get_phys_addr_with_struct for stage2

On 2/10/23 03:28, Peter Maydell wrote: On Tue, 24 Jan 2023 at 00:01, Richard Henderson wrote: This fixes a bug in which we failed to initialize the result attributes properly after the memset. Signed-off-by: Richard Henderson --- target/arm/ptw.c | 13 + 1 file changed, 1 inse

[PATCH v2 15/15] win32: replace closesocket() with close() wrapper

From: Marc-André Lureau Use a close() wrapper instead, so that we don't need to worry about closesocket() vs close() anymore, let's hope. Signed-off-by: Marc-André Lureau --- include/sysemu/os-posix.h | 2 -- include/sysemu/os-win32.h | 8 backends/tpm/tpm_emulator.c | 6 +++---

[PATCH v2 14/15] os-posix: remove useless ioctlsocket() define

From: Marc-André Lureau The API is specific to win32. Signed-off-by: Marc-André Lureau --- include/sysemu/os-posix.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/sysemu/os-posix.h b/include/sysemu/os-posix.h index 58de7c994d..378213fc86 100644 --- a/include/sysemu/os-posix.h +++

[PATCH v2 04/15] error: add global &error_warn destination

From: Marc-André Lureau This can help debugging issues or develop, when error handling is introduced. Signed-off-by: Marc-André Lureau --- include/qapi/error.h | 6 ++ util/error.c | 10 +++--- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/include/qapi/error.

[PATCH v2 13/15] win32: avoid mixing SOCKET and file descriptor space

From: Marc-André Lureau Until now, a win32 SOCKET handle is often cast to an int file descriptor, as this is what other OS use for sockets. When necessary, QEMU eventually queries whether it's a socket with the help of fd_is_socket(). However, there is no guarantee of conflict between the fd and

[PATCH v2 00/15] win32: do not mix SOCKET and fd space

From: Marc-André Lureau Hi, A win32 SOCKET handle is often cast to an int file descriptor, as this is what other OS use for sockets. When necessary, QEMU eventually queries whether it's a socket with the help of fd_is_socket(). However, there is no guarantee of conflict between the fd and SOCKET

[PATCH v2 12/15] slirp: open-code qemu_socket_(un)select()

From: Marc-André Lureau We are about to make the QEMU socket API use file-descriptor space only, but libslirp gives us SOCKET as fd, still. Signed-off-by: Marc-André Lureau --- net/slirp.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/net/slirp.c b/net/slirp.c

[PATCH v2 02/15] tests: use closesocket()

From: Marc-André Lureau Because they are actually sockets... Signed-off-by: Marc-André Lureau Reviewed-by: Thomas Huth --- tests/unit/socket-helpers.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/unit/socket-helpers.c b/tests/unit/socket-helpers.c index eeca

[PATCH v2 05/15] win32/socket: introduce qemu_socket_select() helper

From: Marc-André Lureau This is a wrapper for WSAEventSelect, with Error handling. By default, it will produce a warning, so callers don't have to be modified now, and yet we can spot potential mis-use. Signed-off-by: Marc-André Lureau --- include/sysemu/os-win32.h | 5 + io/channel-socke

[PATCH v2 11/15] slirp: unregister the win32 SOCKET

From: Marc-André Lureau Presumably, this is what should happen when the SOCKET is to be removed. (it probably worked until now because closesocket() does it implicitly, but we never now how the slirp library could use the SOCKET later) Signed-off-by: Marc-André Lureau --- net/slirp.c | 4 +++-

[PATCH v2 07/15] aio: make aio_set_fd_poll() static to aio-posix.c

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- include/block/aio.h | 8 util/aio-posix.c| 6 +++--- util/aio-win32.c| 7 --- 3 files changed, 3 insertions(+), 18 deletions(-) diff --git a/include/block/aio.h b/include/block/aio.h index 8fba6a3584..543717f294

[PATCH v2 06/15] win32/socket: introduce qemu_socket_unselect() helper

From: Marc-André Lureau A more explicit version of qemu_socket_select() with no events. Signed-off-by: Marc-André Lureau --- include/sysemu/os-win32.h | 2 ++ io/channel-socket.c | 4 ++-- util/oslib-win32.c| 7 ++- 3 files changed, 10 insertions(+), 3 deletions(-) diff --gi

[PATCH v2 10/15] main-loop: remove qemu_fd_register(), win32/slirp/socket specific

From: Marc-André Lureau Open-code the socket registration where it's needed, to avoid artificially used or unclear generic interface. Furthermore, the following patches are going to make socket handling use FD-only inside QEMU, but we need to handle win32 SOCKET from libslirp. Signed-off-by: Ma

[PATCH v2 09/15] RFC: build-sys: add slirp.wrap

From: Marc-André Lureau This allows to build with --enable-slirp / -D slirp=enabled, even when libslirp is not installed on the system. Meson will pull it from git in that case. RFC because this is very convenient, for a developper targetting different environments, but might not be considered a

[PATCH v2 01/15] util: drop qemu_fork()

From: Marc-André Lureau Fortunately, qemu_fork() is no longer used since commit a95570e3e4d6 ("io/command: use glib GSpawn, instead of open-coding fork/exec"). (GSpawn uses posix_spawn() whenever possible instead) Signed-off-by: Marc-André Lureau --- include/qemu/osdep.h | 14 - util/o

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