在 2023/2/17 11:14, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 05:31:11PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 17:31:11 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 12/52] hw/acpi: Replace MachineState.smp access with
topology helpers
Hi Zhao,
在 2023/2/13 17:49, Zhao Liu 写道:
From:
在 2023/2/17 11:26, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 08:15:23PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 20:15:23 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 41/52] machine: Introduce core_type() hook
Hi Zhao,
在 2023/2/13 17:50, Zhao Liu 写道:
From: Zhao Liu
Since supported co
Hello Karthikeyan,
On 2/16/23 19:43, Karthikeyan Pasupathi wrote:
This patch support Tiogapass in QEMU environment.
and introduced EEPROM BMC FRU data support "add tiogapass_bmc_fruid data"
along with the machine support.
Signed-off-by: Karthikeyan Pasupathi
There are a couple of coding styl
Add Peter D. since he wrote the fuji.
Thanks for the contribution !
C.
On 2/17/23 04:43, ~ssinprem wrote:
- hw/at24c : modify at24c to support 1 byte address mode
- aspeed/fuji : correct the eeprom size
Sittisak Sinprem (2):
hw/at24c : modify at24c to support 1 byte address mode
aspeed/
在 2023/2/17 11:07, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 04:38:38PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 16:38:38 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 08/52] machine: Add helpers to get cpu topology info from
MachineState.topo
Hi Zhao,
在 2023/2/13 17:49, Zhao Liu 写道:
On 2/15/2023 11:35 PM, Eugenio Perez Martin wrote:
On Thu, Feb 16, 2023 at 3:15 AM Si-Wei Liu wrote:
On 2/14/2023 11:07 AM, Eugenio Perez Martin wrote:
On Tue, Feb 14, 2023 at 2:45 AM Si-Wei Liu wrote:
On 2/13/2023 3:14 AM, Eugenio Perez Martin wrote:
On Mon, Feb 13, 2023 at 7:51 AM S
On Fri, Feb 17, 2023 at 12:07:01PM +0800, wangyanan (Y) wrote:
> Date: Fri, 17 Feb 2023 12:07:01 +0800
> From: "wangyanan (Y)"
> Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
> cache topo in CPUID.04H
>
> 在 2023/2/17 11:35, Zhao Liu 写道:
> > On Thu, Feb 16, 2023 at 09:14:
This commit adds a new audiodev backend to allow QEMU to use Pipewire as
both an audio sink and source. This backend is available on most systems
Add Pipewire entry points for QEMU Pipewire audio backend
Add wrappers for QEMU Pipewire audio backend in qpw_pcm_ops()
qpw_write function returns the c
On Thu, Feb 16, 2023 at 06:00:57PM +, Jonathan Cameron wrote:
> On Wed, 15 Feb 2023 04:10:20 -0500
> Gregory Price wrote:
>
> > On Wed, Feb 15, 2023 at 03:18:54PM +, Jonathan Cameron via wrote:
> > > On Wed, 8 Feb 2023 16:28:44 -0600
> > > zhiting zhu wrote:
> > >
> > > 1) Emulate an
Juan Quintela writes:
> Markus Armbruster wrote:
>> Juan Quintela writes:
>>
> @@ -478,6 +478,24 @@
> #should not affect the correctness of postcopy
> migration.
> #(since 7.1)
> #
> +# @multifd-flush-after-each-section: flush
From: Eugenio Pérez
VHOST_BACKEND_F_IOTLB_ASID is the feature bit, not the bitmask. Since
the device under test also provided VHOST_BACKEND_F_IOTLB_MSG_V2 and
VHOST_BACKEND_F_IOTLB_BATCH, this went unnoticed.
Fixes: c1a1008685 ("vdpa: always start CVQ in SVQ mode if possible")
Signed-off-by: Eug
From: Laurent Vivier
In stream mode, if the server shuts down there is currently
no way to reconnect the client to a new server without removing
the NIC device and the netdev backend (or to reboot).
This patch introduces a reconnect option that specifies a delay
to try to reconnect with the same
From: Thomas Huth
Just because a NIC model is compiled into the QEMU binary does not
necessary mean that it can be used with each and every machine.
So let's rather talk about "available" models instead of "supported"
models, just to avoid confusion.
Reviewed-by: Claudio Fontana
Signed-off-by:
From: Fiona Ebner
Currently, VMXNET3_MAX_MTU itself (being 9000) is not considered a
valid value for the MTU, but a guest running ESXi 7.0 might try to
set it and fail the assert [0].
In the Linux kernel, dev->max_mtu itself is a valid value for the MTU
and for the vmxnet3 driver it's 9000, so a
From: Thomas Huth
The code that collects the available NIC models is not really specific
to PCI anymore and will be required in the next patch, too, so let's
move this into a new separate function in net.c instead.
Signed-off-by: Thomas Huth
Signed-off-by: Jason Wang
---
hw/pci/pci.c | 2
From: Joelle van Dyne
When the VM is stopped using the HMP command "stop", soon the handler will
stop reading from the vmnet interface. This causes a flood of
`VMNET_INTERFACE_PACKETS_AVAILABLE` events to arrive and puts the host CPU
at 100%. We fix this by removing the event handler from vmnet w
From: Qiang Liu
This patch replaces hw_error to guest error log for [read|write]b
accesses when mode_16bit is enabled. This avoids aborting qemu.
Fixes: 1248f8d4cbc3 ("hw/lan9118: Add basic 16-bit mode support.")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1433
Reported-by: Qiang Liu
From: Christian Svensson
Increase the allocated buffer size to fit larger packets.
Given that jumboframes can commonly be up to 9000 bytes the closest suitable
value seems to be 16 KiB.
Tested by running qemu towards a Linux L2TPv3 endpoint and pushing
jumboframe traffic through the interfaces.
From: Thomas Huth
Running QEMU with "-nic help" used to work in QEMU 5.2 and earlier versions
(it showed the available netdev backends), but this feature got broken during
some refactoring in version 6.0. Let's restore the old behavior, and while
we're at it, let's also print the available NIC mo
The following changes since commit 6dffbe36af79e26a4d23f94a9a1c1201de99c261:
Merge tag 'migration-20230215-pull-request' of
https://gitlab.com/juan.quintela/qemu into staging (2023-02-16 13:09:51 +)
are available in the git repository at:
https://github.com/jasowang/qemu.git tags/net-pu
On 2/16/23 11:55, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-by: Daniel Henrique Barboza
---
target/r
Hello,
I have been testing TCG plugin patch on latest Qemu build but noticed that it
fails with assert on some of the applications.
ERROR:../accel/tcg/cpu-exec.c:983:cpu_exec_loop:
assertion failed: (cpu->plugin_mem_cbs == ((void *)0))
It happens when TCG plugin sets memory callback in
On Thu, Feb 16, 2023 at 4:00 PM Philippe Mathieu-Daudé
wrote:
>
> Hi Jason,
>
> On 16/2/23 06:24, Jason Wang wrote:
> > The following changes since commit 6a50f64ca01d0a7b97f14f069762bfd88160f31e:
> >
> >Merge tag 'pull-request-2023-02-14' of https://gitlab.com/thuth/qemu
> > into staging (20
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
---
docs/devel/fuzzing.rst | 22 ++
1 file changed, 2 insertions(+), 20 deletions(-)
diff --git a/docs/devel/fuzzing.rst b/docs/devel/fuzzing.rst
index 715330c856..3bfcb33fc4 100644
--- a/docs/devel/fuzzing.rst
+++ b
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
---
tests/qtest/fuzz/virtio_blk_fuzz.c | 51 --
1 file changed, 7 insertions(+), 44 deletions(-)
diff --git a/tests/qtest/fuzz/virtio_blk_fuzz.c
b/tests/qtest/fuzz/virtio_blk_fuzz.c
index a9fb9ecf6c..651fd4f
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
---
tests/qtest/fuzz/generic_fuzz.c | 114 ++--
1 file changed, 22 insertions(+), 92 deletions(-)
diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuzz.c
index 7326f6840b..f4acfa45cc 10
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
---
tests/qtest/fuzz/i440fx_fuzz.c | 27 +--
1 file changed, 1 insertion(+), 26 deletions(-)
diff --git a/tests/qtest/fuzz/i440fx_fuzz.c b/tests/qtest/fuzz/i440fx_fuzz.c
index b17fc725df..155fe018f8 100644
--- a/
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
---
tests/qtest/fuzz/virtio_scsi_fuzz.c | 51 -
1 file changed, 7 insertions(+), 44 deletions(-)
diff --git a/tests/qtest/fuzz/virtio_scsi_fuzz.c
b/tests/qtest/fuzz/virtio_scsi_fuzz.c
index b3220ef6cb..b6268
Fork-fuzzing provides a few pros, but our implementation prevents us
from using fuzzers other than libFuzzer, and may be causing issues such
as coverage-failure builds on OSS-Fuzz. It is not a great long-term
solution as it depends on internal implementation details of libFuzzer
(which is no longer
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
---
tests/qtest/fuzz/virtio_net_fuzz.c | 54 +++---
1 file changed, 5 insertions(+), 49 deletions(-)
diff --git a/tests/qtest/fuzz/virtio_net_fuzz.c
b/tests/qtest/fuzz/virtio_net_fuzz.c
index c2c15f07f0..e239875
As we are converting most fuzzers to rely on reboots to reset state,
introduce an API to make sure reboots are invoked in a consistent
manner.
Signed-off-by: Alexander Bulekov
---
tests/qtest/fuzz/fuzz.c | 6 ++
tests/qtest/fuzz/fuzz.h | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
We use sparse-mem for fuzzing. For long-running fuzzing processes, we
eventually end up with many allocated sparse-mem pages. To avoid this,
clear the allocated pages on system-reset.
Signed-off-by: Alexander Bulekov
Reviewed-by: Darren Kenny
Reviewed-by: Philippe Mathieu-Daudé
---
hw/mem/spar
As we have repplaced fork-based fuzzing, with reboots - we can no longer
use a timeout+exit() to avoid slow inputs. Libfuzzer has its own timer
that it uses to catch slow inputs, however these timeouts are usually
seconds-minutes long: more than enough to bog-down the fuzzing process.
However, I fo
Hi Peter,
The following changes since commit 6dffbe36af79e26a4d23f94a9a1c1201de99c261:
Merge tag 'migration-20230215-pull-request' of
https://gitlab.com/juan.quintela/qemu into staging (2023-02-16 13:09:51 +)
are available in the Git repository at:
https://gitlab.com/a1xndr/qemu/ tags/p
在 2023/2/17 11:35, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 09:14:54PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 21:14:54 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
cache topo in CPUID.04H
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zha
On 230213 1426, Darren Kenny wrote:
> Hi Alex,
>
> On Saturday, 2023-02-04 at 23:29:44 -05, Alexander Bulekov wrote:
> > Signed-off-by: Alexander Bulekov
> > ---
> > tests/qtest/fuzz/generic_fuzz.c | 106 +++-
> > 1 file changed, 23 insertions(+), 83 deletions(-)
> >
On 230213 1438, Darren Kenny wrote:
> Hi Alex,
>
> On Saturday, 2023-02-04 at 23:29:45 -05, Alexander Bulekov wrote:
> > As we have repplaced fork-based fuzzing, with reboots - we can no longer
> > use a timeout+exit() to avoid slow inputs. Libfuzzer has its own timer
> > that it uses to catch slo
在 2023/2/17 11:35, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 09:14:54PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 21:14:54 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
cache topo in CPUID.04H
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zha
From: Sittisak Sinprem
Device 24C64 the size is 64 kilobits = 8kilobyte
Device 24C02 the size is 2 kilobits = 256byte
Signed-off-by: Sittisak Sinprem
---
hw/arm/aspeed.c | 36
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a/hw/arm/aspeed.c b
- hw/at24c : modify at24c to support 1 byte address mode
- aspeed/fuji : correct the eeprom size
Sittisak Sinprem (2):
hw/at24c : modify at24c to support 1 byte address mode
aspeed/fuji : correct the eeprom size
hw/arm/aspeed.c | 36
hw/nvram/eepr
From: Sittisak Sinprem
Signed-off-by: Sittisak Sinprem
---
hw/nvram/eeprom_at24c.c | 28 +---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index 3328c32814..64259cde67 100644
--- a/hw/nvram/eeprom_at24c.
On Thu, Feb 16, 2023 at 02:38:55PM +0100, Thomas Huth wrote:
> Date: Thu, 16 Feb 2023 14:38:55 +0100
> From: Thomas Huth
> Subject: Re: [RFC 20/52] s390x: Replace MachineState.smp access with
> topology helpers
>
> On 13/02/2023 10.50, Zhao Liu wrote:
> > From: Zhao Liu
> >
> > When MachineSta
On Thu, Feb 16, 2023 at 09:14:54PM +0800, wangyanan (Y) wrote:
> Date: Thu, 16 Feb 2023 21:14:54 +0800
> From: "wangyanan (Y)"
> Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
> cache topo in CPUID.04H
>
> 在 2023/2/13 17:36, Zhao Liu 写道:
> > From: Zhao Liu
> >
> > The p
the rebase auto merge failure, I will resend patches again.
On Fri, Feb 17, 2023 at 10:12 AM ~ssinprem wrote:
>
> From: Sittisak Sinprem
>
> Signed-off-by: Sittisak Sinprem
> ---
> hw/nvram/eeprom_at24c.c | 46 +
> 1 file changed, 33 insertions(+), 13 de
the rebase auto merge failure, I will resend patches again.
On Fri, Feb 17, 2023 at 10:13 AM ~ssinprem wrote:
>
> From: Sittisak Sinprem
>
> Device 24C64 the size is 64 kilobits = 8kilobyte
> Device 24C02 the size is 2 kilobits = 256byte
>
> Signed-off-by: Sittisak Sinprem
> ---
> hw/arm/asp
On Thu, Feb 16, 2023 at 08:28:37PM +0800, wangyanan (Y) wrote:
> Date: Thu, 16 Feb 2023 20:28:37 +0800
> From: "wangyanan (Y)"
> Subject: Re: [RFC 42/52] hw/machine: Add hybrid_supported in generic topo
> properties
>
> 在 2023/2/15 10:53, Zhao Liu 写道:
> > On Tue, Feb 14, 2023 at 09:46:50AM +0800
On Thu, Feb 16, 2023 at 08:15:23PM +0800, wangyanan (Y) wrote:
> Date: Thu, 16 Feb 2023 20:15:23 +0800
> From: "wangyanan (Y)"
> Subject: Re: [RFC 41/52] machine: Introduce core_type() hook
>
> Hi Zhao,
>
> 在 2023/2/13 17:50, Zhao Liu 写道:
> > From: Zhao Liu
> >
> > Since supported core types a
On Thu, Feb 16, 2023 at 06:46:30PM +0800, wangyanan (Y) wrote:
> Date: Thu, 16 Feb 2023 18:46:30 +0800
> From: "wangyanan (Y)"
> Subject: Re: [RFC 23/52] arm: Replace MachineState.smp access with topology
> helpers
>
> 在 2023/2/13 17:50, Zhao Liu 写道:
> > From: Zhao Liu
> >
> > When MachineStat
From: Sittisak Sinprem
Signed-off-by: Sittisak Sinprem
---
hw/nvram/eeprom_at24c.c | 46 +
1 file changed, 33 insertions(+), 13 deletions(-)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index 3328c32814..0cb650d635 100644
--- a/hw/nvram
From: Sittisak Sinprem
Device 24C64 the size is 64 kilobits = 8kilobyte
Device 24C02 the size is 2 kilobits = 256byte
Signed-off-by: Sittisak Sinprem
---
hw/arm/aspeed.c | 36
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a/hw/arm/aspeed.c b
On Thu, Feb 16, 2023 at 05:31:11PM +0800, wangyanan (Y) wrote:
> Date: Thu, 16 Feb 2023 17:31:11 +0800
> From: "wangyanan (Y)"
> Subject: Re: [RFC 12/52] hw/acpi: Replace MachineState.smp access with
> topology helpers
>
> Hi Zhao,
>
> 在 2023/2/13 17:49, Zhao Liu 写道:
> > From: Zhao Liu
> >
>
On Thu, Feb 16, 2023 at 04:38:38PM +0800, wangyanan (Y) wrote:
> Date: Thu, 16 Feb 2023 16:38:38 +0800
> From: "wangyanan (Y)"
> Subject: Re: [RFC 08/52] machine: Add helpers to get cpu topology info from
> MachineState.topo
>
> Hi Zhao,
>
> 在 2023/2/13 17:49, Zhao Liu 写道:
> > From: Zhao Liu
>
On 2023/2/14 9:09, Bin Meng wrote:
At present seed CSR is not reported in the CSR XML hence gdb cannot
access it.
Fix it by addding a debugger check in its predicate() routine.
Signed-off-by: Bin Meng
---
target/riscv/csr.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/r
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-by: Daniel Henrique Barboza
---
target
On 2023/2/14 9:09, Bin Meng wrote:
At present user timer and counter CSRs are not reported in the
CSR XML hence gdb cannot access them.
Fix it by addding a debugger check in their predicate() routine.
Signed-off-by: Bin Meng
---
target/riscv/csr.c | 4
1 file changed, 4 insertions(+
ping.
On 2022-12-18 3:22 a.m., Brad Smith wrote:
Make use of pthread_set_name_np() to be able to set the threads name
on OpenBSD.
Signed-off-by: Brad Smith
---
meson.build | 12
util/qemu-thread-posix.c | 9 -
2 files changed, 20 insertions(+), 1 deletion
On 2023/2/14 2:02, Bin Meng wrote:
It's worth noting that the vector CSR predicate() has a similar
run-time check logic to the FPU CSR. With the previous patch our
gdbstub can correctly report these vector CSRs via the CSR xml.
Commit 719d3561b269 ("target/riscv: gdb: support vector registers
On 2023/2/14 2:02, Bin Meng wrote:
Since commit 94452ac4cf26 ("target/riscv: remove fflags, frm, and fcsr from
riscv-*-fpu.xml")
the 3 FPU CSRs are removed from the XML target decription. The
original intent of that commit was based on the assumption that
the 3 FPU CSRs will show up in the ris
On 2023/2/14 2:02, Bin Meng wrote:
At present the odd-numbered PMP configuration registers for RV64 are
reported in the CSR XML by QEMU gdbstub. However these registers do
not exist on RV64 so trying to access them from gdb results in 'E14'.
Move the pmpcfgX index check from the actual read/wr
On 2023/2/17 05:55, Daniel Henrique Barboza wrote:
At this moment, and apparently since ever, we have no way of enabling
RISCV_FEATURE_MISA. This means that all the code from write_misa(), all
the nuts and bolts that handles how to write this CSR, has always been a
no-op as well because write_m
On 2023/2/17 05:55, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-by: Daniel Henrique Barboza
Reviewed
On 2023/2/14 2:02, Bin Meng wrote:
Use env_archcpu() to get RISCVCPU pointer from env directly.
Signed-off-by: Bin Meng
---
target/riscv/csr.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
On 2023/2/14 2:02, Bin Meng wrote:
Use the register index that has already been calculated in the
pmpcfg_csr_{read,write} call.
Signed-off-by: Bin Meng
---
target/riscv/csr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
in
On 2023/2/14 2:02, Bin Meng wrote:
The read_only variable is currently declared as an 'int', but it
should really be a 'bool'.
Signed-off-by: Bin Meng
---
target/riscv/csr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index c
On 2023/2/14 2:02, Bin Meng wrote:
Fix various places that violate QEMU coding style:
- correct multi-line comment format
- indent to opening parenthesis
Signed-off-by: Bin Meng
---
target/riscv/csr.c | 62 --
1 file changed, 32 insertions(+),
On 2023/2/14 2:02, Bin Meng wrote:
There is no need to generate the CSR XML if the Zicsr extension
is not enabled.
Signed-off-by: Bin Meng
---
target/riscv/gdbstub.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.
On 2023/2/14 2:01, Bin Meng wrote:
Use a variable 'base_reg' to represent cs->gdb_num_regs so that
the call to ricsv_gen_dynamic_vector_xml() can be placed in one
single line for better readability.
Signed-off-by: Bin Meng
---
target/riscv/gdbstub.c | 4 ++--
1 file changed, 2 insertions(
On 2023/2/17 9:50, LIU Zhiwei wrote:
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-
On 2023/2/14 2:01, Bin Meng wrote:
The priority policy of riscv_csrrw_check() was once adjusted in
commit eacaf4401956 ("target/riscv: Fix priority of csr related check in
riscv_csrrw_check")
whose commit message says the CSR existence check should come
before the access control check, but the
On 2023/2/14 2:01, Bin Meng wrote:
The gdbstub CSR XML is dynamically generated according to the result
of the CSR predicate() result. This has been working fine until
commit 7100fe6c2441 ("target/riscv: Enable privileged spec version 1.12")
introduced the privilege spec version check in riscv_
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
The attribute is no longer used since we can retrieve all the enabled
features in the hart by using cpu->cfg instead.
Remove env->feature, riscv_feature() and riscv_set_feature(). We also
need to bump vmstate_riscv_cpu version_id and minimal_ve
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
RISCV_FEATURE_MMU is set whether cpu->cfg.mmu is set, so let's just use
the flag directly instead.
With this change the enum is also removed. It is worth noticing that
this enum, and all the RISCV_FEATURES_* that were contained in it,
predates
[PATCH v1 0/6] hw/arm/virt: Support dirty ring
The patches work well on my arm Ampere host.
The test results are as expected.
Testing
===
(1) kvm-unit-tests/its-pending-migration,
kvm-unit-tests/its-migrate-unmapped-collection
and kvm-unit-tests/its-migration with dirty ring or normal dir
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
Read cpu_ptr->cfg.mmu directly. As a bonus, use cpu_ptr in
riscv_isa_string().
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Reviewed-by: Bin Meng
Reviewed-by: Andrew Jones
---
hw/riscv/virt.c | 7 ---
1 file changed,
Hi Palmer,
On Fri, Feb 17, 2023 at 12:40 AM Palmer Dabbelt wrote:
>
> On Tue, 14 Feb 2023 18:22:21 PST (-0800), Bin Meng wrote:
> > On Tue, Feb 14, 2023 at 10:59 PM weiwei wrote:
> >>
> >>
> >> On 2023/2/14 22:27, Bin Meng wrote:
> >> > At present the envcfg CSRs predicate() routines are generic
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
RISCV_FEATURE_PMP is being set via riscv_set_feature() by mirroring the
cpu->cfg.pmp flag. Use the flag instead.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Reviewed-by: Bin Meng
Reviewed-by: Andrew Jones
---
target/risc
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
RISCV_FEATURE_EPMP is always set to the same value as the cpu->cfg.epmp
flag. Use the flag directly.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Reviewed-by: Bin Meng
Reviewed-by: Andrew Jones
---
target/riscv/cpu.c | 10
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
Instead of silently ignoring the EPMP setting if there is no PMP
available, error out informing the user that EPMP depends on PMP
support:
$ ./qemu-system-riscv64 -cpu rv64,pmp=false,x-epmp=true
qemu-system-riscv64: Invalid configuration: EPMP
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
RISCV_FEATURE_DEBUG will always follow the value defined by
cpu->cfg.debug flag. Read the flag instead.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Reviewed-by: Bin Meng
Reviewed-by: Andrew Jones
---
target/riscv/cpu.c
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-by: Daniel Henrique Barboza
---
targ
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-by: Daniel Henrique Barboza
---
targ
On 2023/2/17 5:55, Daniel Henrique Barboza wrote:
At this moment, and apparently since ever, we have no way of enabling
RISCV_FEATURE_MISA. This means that all the code from write_misa(), all
the nuts and bolts that handles how to write this CSR, has always been a
no-op as well because write_mi
On 9/21/2022 10:51 PM, Dr. David Alan Gilbert wrote:
* Wang, Lei (lei4.w...@intel.com) wrote:
The new CPU model mostly inherits features from Icelake-Server, while
adding new features:
- AMX (Advance Matrix eXtensions)
- Bus Lock Debug Exception
and new instructions:
- AVX VNNI (Vector Neu
On Fri, Feb 17, 2023 at 8:45 AM Bin Meng wrote:
>
> On Fri, Feb 17, 2023 at 5:57 AM Daniel Henrique Barboza
> wrote:
> >
> > We're going to do changes that requires accessing the RISCVCPUConfig
> > struct from the RISCVCPU, having access only to a CPURISCVState 'env'
> > pointer. Add a helper to
On Fri, Feb 17, 2023 at 5:57 AM Daniel Henrique Barboza
wrote:
>
> We're going to do changes that requires accessing the RISCVCPUConfig
> struct from the RISCVCPU, having access only to a CPURISCVState 'env'
> pointer. Add a helper to make the code easier to read.
>
> Signed-off-by: Daniel Henriqu
Warner Losh writes:
> When building with clang, -no-pie gives a warning on every single build,
> so remove it.
>
> Signed-off-by: Warner Losh
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
/* resend with fixed to: and cc: */
On 16/02/2023 18:22, Juan Quintela wrote:
"Michael S. Tsirkin" wrote:
On Thu, Feb 16, 2023 at 11:11:22AM -0500, Michael S. Tsirkin wrote:
On Thu, Feb 16, 2023 at 03:14:05PM +0100, Juan Quintela wrote:
Anton Kuchin wrote:
Now any vhost-user-fs device make
cap_memory - Caps the memory to just below MAXINT
scale_to_guest_pages - Account for difference in host / guest page size
h2g_long_sat - converts a int64_t to a int32_t, saturating at max / min values
h2g_ulong_sat - converts a uint64_t to a uint32_t, saturating at max value
Signed-off-by: Warner
From: Juergen Lock
Intercept some syscalls that we need to translate (like the archiecture
we're running on) and translate them. These are only the simplest ones
so far.
Signed-off-by: Juergen Lock
Co-Authored-by: Stacey Son
Signed-off-by: Stacey Son
Co-Authored-by: Warner Losh
Signed-off-by
h2g_old_sysctl does the byte swapping in the data to return it to the
target for the 'well known' types. For most of the types, either the
data is returned verbatim (strings, byte size, opaque we don't know
about) or it's returned with byte swapping (for all the integer
types). However, for ABI32 t
From: Juergen Lock
do_freebsd_sysctl_oid filters out some of the binary and special sysctls
where host != target. None of the sysctls that have to be translated from
host to target are handled here.
Signed-off-by: Juergen Lock
Co-Authored-by: Stacey Son
Signed-off-by: Stacey Son
Co-Authored-b
From: Juergen Lock
Helper functions for sysctl implementations. sysctl_name2oid and
sysctl_oidfmt convert oids between host and targets
Signed-off-by: Juergen Lock
Reviewed-by: Warner Losh
Signed-off-by: Warner Losh
Reviewed-by: Richard Henderson
---
bsd-user/freebsd/os-sys.c | 18 +
From: Doug Rabson
System call return values on FreeBSD are in a register (which is spelled
abi_long in qemu). This was being assigned into an int variable which
causes problems for 64bit targets.
Resolves: https://github.com/qemu-bsd-user/qemu-bsd-user/issues/40
Signed-off-by: Doug Rabson
Revie
When building with clang, -no-pie gives a warning on every single build,
so remove it.
Signed-off-by: Warner Losh
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 64960c6000f..eb284ccf308 100755
--- a/configure
+++ b/configure
@@ -1313
From: Stacey Son
oidfmt uses undocumented system call to get the type of the sysctl.
Co-Authored-by: Sean Bruno
Signed-off-by: Sean Bruno
Co-Authored-by: Juergen Lock
Signed-off-by: Juergen Lock
Co-Authored-by: Raphael Kubo da Costa
Signed-off-by: Raphael Kubo da Costa
Signed-off-by: Stace
From: Kyle Evans
do_freebsd_sysctlbyname needs to translate the 'name' back down to a OID
so we can intercept the special ones. Do that and call the common wrapper
do_freebsd_sysctl_oid.
Signed-off-by: Kyle Evans
Reviewed-by: Warner Losh
Signed-off-by: Warner Losh
Reviewed-by: Richard Henders
On 16/02/2023 18:22, Juan Quintela wrote:
"Michael S. Tsirkin" wrote:
On Thu, Feb 16, 2023 at 11:11:22AM -0500, Michael S. Tsirkin wrote:
On Thu, Feb 16, 2023 at 03:14:05PM +0100, Juan Quintela wrote:
Anton Kuchin wrote:
Now any vhost-user-fs device makes VM unmigratable, that also prevents
From: Stacey Son
Connect up the sysarch system call.
Signed-off-by: Juergen Lock
Co-authored-by: Juergen Lock
Signed-off-by: Stacey Son
Reviewed-by: Warner Losh
Signed-off-by: Warner Losh
Reviewed-by: Richard Henderson
---
bsd-user/freebsd/os-syscall.c | 7 +++
1 file changed, 7 inser
From: Kyle Evans
Implement the wrapper function for sysctl(2). This puts the oid
arguments into a standard form and calls the common
do_freebsd_sysctl_oid.
Signed-off-by: Kyle Evans
Co-Authored-by: Juergen Lock
Signed-off-by: Juergen Lock
Co-Authored-by: Stacey Son
Signed-off-by: Stacey Son
[ letter edited -- need reviews for these hunks
bsd-user: Helper routines h2g_old_sysctl
bsd-user: various helper routines for sysctl
]
This group of patches gets the basic framework for sysctl upstreamed. There's a
lot more to translate far too many binary blobs the kernel publishes via
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