Hi Bin,
> > > According to priviledged spec, if [sm]tval is written with a nonzero
> > > value when a breakpoint exception occurs, then [sm]tval will contain
> > > the faulting virtual address. Set tval to hit address when breakpoint
> > > exception is triggered by hardware watchpoint.
> > >
> > >
On 30/01/2023 18.42, Alex Bennée wrote:
Thomas Huth writes:
There is only one job depending on the build-gprof-gcov job, so
there is no real need for keeping this separate. It likely only
has been split since the complete runtime is more than 60 minutes,
but that can be better handled with a
On Mon, 30 Jan 2023 15:49:36 +0800, Jason Wang wrote:
> On Mon, Jan 30, 2023 at 1:32 PM Michael S. Tsirkin wrote:
> >
> > On Mon, Jan 30, 2023 at 10:15:12AM +0800, Xuan Zhuo wrote:
> > > On Sun, 29 Jan 2023 07:15:47 -0500, "Michael S. Tsirkin"
> > > wrote:
> > > > On Sun, Jan 29, 2023 at 08:03:
On 2023/01/31 8:58, BALATON Zoltan wrote:
On Sat, 28 Jan 2023, Akihiko Odaki wrote:
On 2023/01/23 8:28, BALATON Zoltan wrote:
On Thu, 19 Jan 2023, Akihiko Odaki wrote:
On 2023/01/15 3:11, BALATON Zoltan wrote:
On Sat, 14 Jan 2023, Akihiko Odaki wrote:
On 2023/01/13 22:43, BALATON Zoltan wrot
On Tue, 31 Jan 2023 11:27:42 +0800, Jason Wang wrote:
> On Mon, Jan 30, 2023 at 6:26 PM Xuan Zhuo wrote:
> >
> > On Mon, 30 Jan 2023 16:40:08 +0800, Jason Wang wrote:
> > > On Mon, Jan 30, 2023 at 4:03 PM Xuan Zhuo
> > > wrote:
> > > >
> > > > On Mon, 30 Jan 2023 15:49:36 +0800, Jason Wang
>
On 30/01/2023 23.52, Ilya Leoshkevich wrote:
Add the missing meson infrastructure bits for the new libdw
dependency. Model them after the existing capstone knobs.
Fixes: 7c10cb38ccb8 ("accel/tcg: Add debuginfo support")
Reported-by: Thomas Huth
Signed-off-by: Ilya Leoshkevich
---
meson.build
When vfio-pci devices are attached to the downstream, pcie acs
capability may be needed, Consistent with physical machine.
It has been tested in our environment, and pcie acs capability
is required in some scenarios.
Claim ACS support in the downstream port to allow
passthrough of individual func
ping.
As requested in the wiki, here's the patchew link:
https://patchew.org/QEMU/20230116013421.3149183-1-jeb.st...@gmail.com/
On Mon, Jan 30, 2023 at 6:26 PM Xuan Zhuo wrote:
>
> On Mon, 30 Jan 2023 16:40:08 +0800, Jason Wang wrote:
> > On Mon, Jan 30, 2023 at 4:03 PM Xuan Zhuo
> > wrote:
> > >
> > > On Mon, 30 Jan 2023 15:49:36 +0800, Jason Wang
> > > wrote:
> > > > On Mon, Jan 30, 2023 at 1:32 PM Michael S. Tsirki
On 30-01-23, 23:03, Akihiko Odaki wrote:
> vhost_dev_cleanup(), called from vu_gpio_disconnect(), clears vhost_dev
> so vhost-user-gpio must set the members of vhost_dev each time
> connecting.
>
> do_vhost_user_cleanup() should also acquire the pointer to vqs directly
> from VHostUserGPIO instead
We found a case where the source passed to flatview_write_continue() may
overlap with the destination when fuzzing igb, a new proposed network
device with sanitizers.
igb uses pci_dma_map() to get Tx packet, and pci_dma_write() to write Rx
buffer. While pci_dma_write() is usually used to write dat
The expiration time provided for timer_mod() can overflow if a
ridiculously large value is set to the comparator register. The
resulting value can represent a past time after rounded, forcing the
timer to fire immediately. If the timer is configured as periodic, it
will rearm the timer again, and f
On 2023/01/31 0:47, Michael S. Tsirkin wrote:
On Tue, Jan 31, 2023 at 12:36:38AM +0900, Akihiko Odaki wrote:
On 2023/01/31 0:12, Michael S. Tsirkin wrote:
On Mon, Jan 30, 2023 at 10:47:07PM +0900, Akihiko Odaki wrote:
filter-dump specifiees Ethernet as PCAP LinkType, which does not expect
virt
On 2023/1/31 3:03, Richard Henderson wrote:
On 1/29/23 22:41, LIU Zhiwei wrote:
On 2023/1/30 13:43, Richard Henderson wrote:
On 1/29/23 16:03, LIU Zhiwei wrote:
Thanks. It's a bug. We should load all memory addresses to local
TCG temps first.
Do you think we should probe all the memory a
On Tue, Jan 31, 2023 at 8:59 AM Alistair Francis wrote:
>
> On Mon, Jan 30, 2023 at 8:08 PM Sergey Matyukevich wrote:
> >
> > From: Sergey Matyukevich
> >
> > According to priviledged spec, if [sm]tval is written with a nonzero
> > value when a breakpoint exception occurs, then [sm]tval will con
On Tue, Jan 31, 2023 at 1:16 AM Daniel Henrique Barboza
wrote:
>
>
>
> On 1/29/23 02:45, Bin Meng wrote:
> > On Thu, Jan 26, 2023 at 9:54 PM Daniel Henrique Barboza
> > wrote:
> >>
> >> As it is now, riscv_compute_fdt_addr() is receiving a dram_base, a
> >> mem_size (which is defaulted to Machine
On Mon, Jan 30, 2023 at 8:08 PM Sergey Matyukevich wrote:
>
> From: Sergey Matyukevich
>
> According to priviledged spec, if [sm]tval is written with a nonzero
> value when a breakpoint exception occurs, then [sm]tval will contain
> the faulting virtual address. Set tval to hit address when break
On Mon, Jan 30, 2023 at 8:08 PM Sergey Matyukevich wrote:
>
> From: Sergey Matyukevich
>
> According to priviledged spec, if [sm]tval is written with a nonzero
> value when a breakpoint exception occurs, then [sm]tval will contain
> the faulting virtual address. Set tval to hit address when break
On 31/1/23 00:33, Richard Henderson wrote:
On 1/30/23 13:14, Philippe Mathieu-Daudé wrote:
On 30/1/23 20:19, Richard Henderson wrote:
But I do question whether we need to support 64-bit guests on 32-bit
hosts at all.
Retaining 32-bit on 32-bit allows arm32 to emulate i686, which I
suspect, bu
On Sat, 28 Jan 2023, Akihiko Odaki wrote:
On 2023/01/23 8:28, BALATON Zoltan wrote:
On Thu, 19 Jan 2023, Akihiko Odaki wrote:
On 2023/01/15 3:11, BALATON Zoltan wrote:
On Sat, 14 Jan 2023, Akihiko Odaki wrote:
On 2023/01/13 22:43, BALATON Zoltan wrote:
On Thu, 5 Jan 2023, BALATON Zoltan wrot
On 30/1/23 21:59, Richard Henderson wrote:
TCG internals will want to be able to allocate and reuse
explicitly life-limited temporaries.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 28
1 file changed, 28 insertions(+)
Reviewed-by: Philippe Mathieu-
On 30/1/23 21:59, Richard Henderson wrote:
All of these have obvious and quite local scope.
Signed-off-by: Richard Henderson
---
tcg/tcg-op-gvec.c | 270 +++---
tcg/tcg-op.c | 258 ++--
tcg/tcg.c |
On 30/1/23 21:59, Richard Henderson wrote:
Guest front-ends now get temps that span the lifetime of
the translation block by default, which avoids accidentally
using the temp across branches and invalidating the data.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 8
1 fil
On 230130 1528, Peter Xu wrote:
> On Mon, Jan 30, 2023 at 03:03:00PM -0500, Alexander Bulekov wrote:
> > On 230130 2251, Akihiko Odaki wrote:
> > > We found a case where the source passed to flatview_write_continue() may
> > > overlap with the destination when fuzzing igb, a new proposed network
>
On 30/1/23 21:59, Richard Henderson wrote:
These symbols are now unused.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op.h | 2 --
include/tcg/tcg.h| 28
tcg/tcg.c| 16
3 files changed, 46 deletions(-)
Reviewed-by: Ph
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new_i32 is now identical, use that.
Signed-off-by: Richard Henderson
---
include/exec/gen-icount.h | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new_* is now identical, use those.
Signed-off-by: Richard Henderson
---
target/xtensa/translate.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new_* is now identical, use those.
Signed-off-by: Richard Henderson
---
target/arm/translate-sve.c | 6 +++---
target/arm/translate.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Da
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new is now identical, use that.
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 6 +++---
target/cris/translate_v10.c.inc | 10 +-
2 files changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: Philip
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new_* is now identical, use those.
Signed-off-by: Richard Henderson
---
target/hexagon/idef-parser/README.rst | 4 ++--
target/hexagon/gen_tcg.h| 4 ++--
target/hexagon/genptr.c | 16 ++
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new is now identical, use that.
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 6 +++---
target/ppc/translate/spe-impl.c.inc | 8
target/ppc/translate/vmx-impl.c.inc | 4 ++--
3 files changed, 9
On 30/1/23 21:59, Richard Henderson wrote:
Since tcg_temp_new is now identical, use that.
Signed-off-by: Richard Henderson
---
target/mips/tcg/translate.c | 57 ++--
target/mips/tcg/nanomips_translate.c.inc | 4 +-
2 files changed, 16 insertions(+), 45 dele
On 30/1/23 21:59, Richard Henderson wrote:
This wasn't actually used at all, just some unused
macro re-definitions.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 3 ---
1 file changed, 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 30/1/23 21:59, Richard Henderson wrote:
Here we are creating a temp whose value needs to be replaced,
but always storing NULL into CPUState.plugin_mem_cbs.
Use tcg_constant_ptr(0) explicitly.
Signed-off-by: Richard Henderson
---
accel/tcg/plugin-gen.c | 9 +++--
1 file changed, 3 inse
On 30/1/23 21:59, Richard Henderson wrote:
While the argument can only be TEMP_EBB or TEMP_TB,
it's more obvious this way.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 18 +-
tcg/tcg.c | 8
2 files changed, 13 insertions(+), 13 deletions(-)
Re
On 30/1/23 21:59, Richard Henderson wrote:
TEMP_NORMAL is a subset of TEMP_EBB. Promote single basic
block temps to single extended basic block.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 2 --
tcg/tcg.c | 19 +++
2 files changed, 3 insertions(+), 18
On 30/1/23 21:59, Richard Henderson wrote:
Use TEMP_TB as that is more explicit about the default
lifetime of the data. While "global" and "local" used
to be contrasting, we have more lifetimes than that now.
Do not yet rename tcg_temp_local_new_*, just the enum.
Signed-off-by: Richard Henders
On 1/30/23 13:14, Philippe Mathieu-Daudé wrote:
On 30/1/23 20:19, Richard Henderson wrote:
But I do question whether we need to support 64-bit guests on 32-bit hosts at
all.
Retaining 32-bit on 32-bit allows arm32 to emulate i686, which I suspect, but have no
proof, is the limit of what users
On 30/1/23 21:59, Richard Henderson wrote:
Change the temps_in_use check to use assert not fprintf.
Move the assert for double-free before the check for count,
since that is the more immediate problem.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 12 +---
1 file changed, 5 insert
On 30/1/23 22:48, Richard Henderson wrote:
Use tcg_gen_atomic_cmpxchg_i128 for the atomic case,
and tcg_gen_qemu_ld/st_i128 otherwise.
Signed-off-by: Richard Henderson
---
Cc: Paolo Bonzini
Cc: Eduardo Habkost
---
target/i386/helper.h | 4 ---
target/i386/tcg/mem_helper.c | 69 ---
On 30/1/23 22:48, Richard Henderson wrote:
Use tcg_gen_atomic_cmpxchg_i64 for the atomic case,
and tcg_gen_nonatomic_cmpxchg_i64 otherwise.
Signed-off-by: Richard Henderson
---
Cc: Paolo Bonzini
Cc: Eduardo Habkost
---
target/i386/helper.h | 2 --
target/i386/tcg/mem_helper.c | 57
On 30/1/23 20:19, Richard Henderson wrote:
But I do question whether we need to support 64-bit guests on 32-bit
hosts at all.
Retaining 32-bit on 32-bit allows arm32 to emulate i686, which I
suspect, but have no proof, is the limit of what users actually want.
I presume you implicitly restric
On 30/1/23 14:51, Akihiko Odaki wrote:
We found a case where the source passed to flatview_write_continue() may
overlap with the destination when fuzzing igb, a new proposed network
device with sanitizers.
igb uses pci_dma_map() to get Tx packet, and pci_dma_write() to write Rx
buffer. While pci
On 30/1/23 14:50, Akihiko Odaki wrote:
The expiration time provided for timer_mod() can overflow if a
ridiculously large value is set to the comparator register. The
resulting value can represent a past time after rounded, forcing the
timer to fire immediately. If the timer is configured as perio
Add the missing meson infrastructure bits for the new libdw
dependency. Model them after the existing capstone knobs.
Fixes: 7c10cb38ccb8 ("accel/tcg: Add debuginfo support")
Reported-by: Thomas Huth
Signed-off-by: Ilya Leoshkevich
---
meson.build | 11 +++
meson_optio
On Mon, Jan 30, 2023 at 06:45:20AM +0100, Juan Quintela wrote:
> Peter Xu wrote:
> > When a ramblock is backed by hugetlbfs and the user specified using
> > double-map feature, we trap the faults on these regions using minor mode.
> > Teach QEMU about that.
> >
> > Add some sanity check on the fau
On 30/1/23 11:44, Thomas Huth wrote:
Let's safe some CI minutes by merging these two jobs. We can now
also drop "--disable-capstone" since the capstone submodule has
been removed a while ago. We should rather tes --disable-fdt now
"test"
to test a compilation without the "dtc" submodule (for
On 30/1/23 11:44, Thomas Huth wrote:
We are also compile-testing ppc64-softmmu with clang in the "tsan-build"
job, and ppc64-softmmu covers pretty much the same code as ppc-softmmu,
so we should not lose much test coverage here by removing ppc-softmmu
from the "clang-system" job.
Signed-off-by:
On Mon, Jan 30, 2023 at 06:24:20AM +0100, Juan Quintela wrote:
> Peter Xu wrote:
> > Add a RAMBlock.host_mirror for all the hugetlbfs backed guest memories.
> > It'll be used to remap the same region twice and it'll be used to service
> > page faults using UFFDIO_CONTINUE.
> >
> > To make sure all
On 1/30/23 12:20, Helge Deller wrote:
Add output for the missing 4th parameter (size_t sigsetsize).
Signed-off-by: Helge Deller
---
v2: Use %u instead of %d, as suggested by Laurent Vivier
Reviewed-by: Richard Henderson
r~
On 1/30/23 08:49, Bernhard Beschow wrote:
The dcblc instruction is used by u-boot in mpc85xx/start.S. Without it,
an illegal istruction exception is generated very early in the boot
process where the processor is not yet able to handle exceptions. See:
https://github.com/u-boot/u-boot/blob/v2023
Add output for the missing 4th parameter (size_t sigsetsize).
Signed-off-by: Helge Deller
---
v2: Use %u instead of %d, as suggested by Laurent Vivier
diff --git a/linux-user/strace.c b/linux-user/strace.c
index 3157e4b420..f0f6ada8cb 100644
--- a/linux-user/strace.c
+++ b/linux-user/strace.c
@
On 1/30/23 10:26, Laurent Vivier wrote:
Le 27/01/2023 à 21:58, Helge Deller a écrit :
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller
---
v2: Use regpairs_aligned() and target_offset64(), noticed by Laurent Vivier
diff --git a/linux-user/strace.c b/linux-user/st
On Mon, Jan 30, 2023 at 06:05:47AM +0100, Juan Quintela wrote:
> Peter Xu wrote:
> > We do proper page size alignment for file backed mmap()s for ramblocks.
> > Even if it's as simple as that, cache the value because it'll be used in
> > multiple places.
> >
> > Since at it, drop size for file_ram
When a write request is converted into a write zeroes request by the
detect-zeroes= feature, it is no longer associated with an I/O buffer.
The BDRV_REQ_REGISTERED_BUF flag doesn't make sense without an I/O
buffer and must be cleared because bdrv_co_do_pwrite_zeroes() fails with
-EINVAL when it's s
The blk_register_buf() API is an optimization hint that allows some
block drivers to avoid I/O buffer housekeeping or bounce buffers.
Add an -r option to register the I/O buffer so that qemu-io can be used
to test the blk_register_buf() API. The next commit will add a test that
uses the new option
The block layer APIs use BdrvRequestFlags while qemu-io code uses int.
Although the code compiles and runs fine, BdrvRequestFlags is clearer
because it differentiates between other types of flags like bdrv_open()
flags.
This is purely refactoring.
Reviewed-by: Eric Blake
Signed-off-by: Stefan Ha
This regression test demonstrates that detect-zeroes works with
registered buffers. Bug details:
https://gitlab.com/qemu-project/qemu/-/issues/1404
Reviewed-by: Eric Blake
Signed-off-by: Stefan Hajnoczi
---
.../tests/detect-zeroes-registered-buf| 58 +++
.../tests/detect
v2:
- Add comment explaining unbalanced error code path in
qemu_io_alloc_from_file() [Eric]
- List options alphabetically in help output [Eric]
- Add Tested-by/Reviewed-by
- CC qemu-stable on the fix
The first patch fixes a regression in QEMU 7.2 where detect-zeroes breaks with
virtio-blk device
Signed-off-by: Richard Henderson
---
Cc: David Hildenbrand
Cc: Ilya Leoshkevich
---
target/s390x/helper.h| 2 --
target/s390x/tcg/insn-data.h.inc | 2 +-
target/s390x/tcg/mem_helper.c| 52 --
target/s390x/tcg/translate.c | 55 +++
Pack the quotient and remainder into a single uint64_t.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
v2: Fix operand ordering; use tcg_extr32_i64.
---
target/s390x/helper.h | 2 +-
target/s390x/tcg/int_helper.c | 26 ++
Use tcg_gen_atomic_cmpxchg_i128 for the atomic case,
and tcg_gen_qemu_ld/st_i128 otherwise.
Signed-off-by: Richard Henderson
---
Cc: Paolo Bonzini
Cc: Eduardo Habkost
---
target/i386/helper.h | 4 ---
target/i386/tcg/mem_helper.c | 69
target/i386/
These will be used by some hosts, both 32 and 64-bit, to pass and
return i128. Not yet used, because allocation is not yet enabled.
Signed-off-by: Richard Henderson
---
tcg/tcg-internal.h | 3 +
tcg/tcg.c | 135 -
2 files changed, 135 inser
Replace the flat array tcg_target_call_oarg_regs[] with
a function call including the TCGCallReturnKind.
Extend the set of registers for ARM to r0-r3 to match the ABI:
https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#result-return
Reviewed-by: Alex Bennée
Reviewed-by: Daniel
When allocating a temp to the stack frame, consider the
base type and allocate all parts at once.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 34 ++
1 file changed, 26 insertions(+), 8 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
Many hosts pass and return 128-bit quantities like sequential
64-bit quantities. Treat this just like we currently break
down 64-bit quantities for a 32-bit host.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 37 +
1 file changed,
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-Id: <20221112042555.2622152-3-richard.hender...@linaro.org>
---
target/arm/helper-a64.h| 2 --
target/arm/helper-a64.c| 43 ---
target/arm/translate-a64.c | 61 +++
Use tcg_gen_atomic_cmpxchg_i64 for the atomic case,
and tcg_gen_nonatomic_cmpxchg_i64 otherwise.
Signed-off-by: Richard Henderson
---
Cc: Paolo Bonzini
Cc: Eduardo Habkost
---
target/i386/helper.h | 2 --
target/i386/tcg/mem_helper.c | 57
target/i
Add code generation functions for data movement between
TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract).
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op.h | 4
tcg/tcg-internal.h | 13 +
tcg/tcg-op.
These are not yet considering atomicity of the 16-byte value;
this is a direct replacement for the current target code which
uses a pair of 8-byte operations.
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst.h | 10 +++
include/tcg/tcg-op.h| 2 +
accel/tcg/cputlb.c | 112 ++
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-Id: <20221112042555.2622152-2-richard.hender...@linaro.org>
---
target/arm/helper-a64.h| 6 ---
target/arm/helper-a64.c| 104 -
target/arm/translate-a64.c | 60 -
Normally this is automatically handled by the CF_PARALLEL checks
with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special
case of !PREFIX_LOCK where it always wants the non-atomic version.
Split these out so that x86 does not have to roll its own.
Signed-off-by: Richard Henderson
---
incl
Acked-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
v2: Fix SPEC_in1_x1.
---
target/s390x/helper.h| 32 ++--
target/s390x/tcg/insn-data.h.inc | 30 +--
target/s390x/tcg/fpu_helper.c| 88 ++--
target/s390x/tcg/translate.c
This will allow targets to avoid rolling their own.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 11 +
include/tcg/tcg-op.h | 5 +++
tcg/tcg-op.c | 85 +++
accel/tcg/atomic
Fill in the parameters for the host ABI for Int128 for
those backends which require no extra modification.
Reviewed-by: Alex Bennée
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 ++
tcg/arm/tcg-target.h | 2 ++
tcg/loongarch6
Acked-by: Ilya Leoshkevich
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 2 +-
target/s390x/tcg/mem_helper.c | 7 +++
target/s390x/tcg/translate.c | 7 +--
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/target/s
This case is trivial to implement inline.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 9ea28b3e52..ac5bd98f04 100644
--- a
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/i386/tcg/translate.c | 48 -
1 file changed, 31 insertions(+), 17 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 7e0b2a709a..a82131d635
Acked-by: Ilya Leoshkevich
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tests/tcg/s390x/long-double.c | 24
tests/tcg/s390x/Makefile.target | 1 +
2 files changed, 25 insertions(+)
create mode 100644 tests/tcg/s390x/long-double.c
diff --
From: Ilya Leoshkevich
Add a basic test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
Message-Id: <2022110300.2539919-1-...@linux.ibm.com>
Signed-off-by: Richard Henderson
---
tests/tcg/s390x/div.c | 40 +
tests/tcg/s390x/Makefile.target
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 2 +-
target/s390x/tcg/mem_helper.c | 11 ---
target/s390x/tcg/translate.c | 8 ++--
3 files changed, 11 insertions(+), 10 deletions(-)
diff --git
Fill in the parameters for the host ABI for Int128.
Adjust tcg_target_call_oarg_reg for _WIN64, and
tcg_out_call for i386 sysv. Allow TCG_TYPE_V128
stores without AVX enabled.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 10 ++
tcg/i386/tcg-
From: Ilya Leoshkevich
Add a basic test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
Message-Id: <20221025213008.2209006-2-...@linux.ibm.com>
Signed-off-by: Richard Henderson
---
tests/tcg/s390x/clst.c | 82 +
tests/tcg/s390x/Makefile.target
Note that the previous direct reference to reserve_val,
- tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode
-? offsetof(CPUPPCState, reserve_val2)
-: offsetof(CPUPPCState, reserve_val)));
was incorrect because all references should have go
We expect the backend to require register pairs in
host-endian ordering, thus for big-endian the first
register of a pair contains the high part.
We were forcing R0 to contain the low part for calls.
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
-
Begin staging in support for TCGv_i128 with Int128.
Define the type enumerator, the typedef, and the
helper-head.h macros.
This cannot yet be used, because you can't allocate
temporaries of this new type.
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hender
This enables allocation of i128. The type is not yet
usable, as we have not yet added data movement ops.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 32 +
tcg/tcg.c | 60 +--
Make a copy of wout_x1 before modifying it, as wout_x1_P
emphasizing that it operates on the out/out2 pair. The insns
that use x1_P are data movement that will not change to Int128.
Acked-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/tcg/insn-data.h.inc | 12 ++
Implement the function for arm, i386, and s390x, which will use it.
Add stubs for all other backends.
Reviewed-by: Alex Bennée
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Richard Henderson
---
tcg/tcg.c| 2 ++
tcg/aarch64/tcg-target.c.inc | 7 +++
tcg/
Acked-by: David Hildenbrand
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
v2: Remove extraneous return_low128.
---
target/s390x/helper.h| 22 +++---
target/s390x/tcg/insn-data.h.inc | 20 ++---
target/s390x/tcg/fpu_helper.c| 29
We are about to allow passing Int128 to/from tcg helper functions,
but libffi doesn't support __int128_t, so use the structure.
In order for atomic128.h to continue working, we must provide
a mechanism to frob between real __int128_t and the structure.
Provide a new union, Int128Alias, for this.
Pack the quotient and remainder into a single Int128.
Use the divu128 primitive to remove the cpu_abort on
32-bit hosts.
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
v2: Extended div test case to cover these insns.
---
target/s390x/helper.
Acked-by: Ilya Leoshkevich
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 2 +-
target/s390x/tcg/mem_helper.c | 7 +++
target/s390x/tcg/translate.c | 6 --
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/s3
Fill in the parameters for libffi for Int128.
Adjust the interpreter to allow for 16-byte return values.
Adjust tcg_out_call to record the return value length.
Call parameters are no longer all the same size, so we
cannot reuse the same call_slots array for every function.
Compute it each time now
This will be used by _WIN64 to return i128. Not yet used,
because allocation is not yet enabled.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/tcg-internal.h | 1 +
tcg/tcg.c | 19 +++
2 files changed, 20 insertions(+)
diff --git a/tcg/tcg-interna
Branch: https://gitlab.com/rth7680/qemu/-/tree/tcg-i128
Based-on: 20230124020507.3732200-1-richard.hender...@linaro.org
("[PULL v2 00/15] tcg patch queue")
Changes for v6:
* R-b applied.
Patches lacking review:
05-tcg-Add-TCG_CALL_-RET-ARG-_BY_REF.patch
15-tcg-Add-guest-load-store-primitive
On 1/30/23 00:44, Thomas Huth wrote:
int main(int argc, char **argv)
{
-const char *arch = qtest_get_arch();
+const char *devices[] = {
+"cirrus-vga",
static const char * const devices[]
Otherwise,
Reviewed-by: Richard Henderson
r~
Since tcg_temp_new is now identical, use that.
In some cases we can avoid a copy from A0 or T0.
Signed-off-by: Richard Henderson
---
target/i386/tcg/translate.c | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i
These symbols are now unused.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op.h | 2 --
include/tcg/tcg.h| 28
tcg/tcg.c| 16
3 files changed, 46 deletions(-)
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 66
Reusing TEMP_TB interferes with detecting whether the
temp can be adjusted to TEMP_EBB.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 2 +-
tcg/tcg.c | 101 --
2 files changed, 53 insertions(+), 50 deletions(-)
diff --git a/includ
1 - 100 of 494 matches
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