Re: [PATCH v4 3/5] hw/nvram/eeprom_at24c: Add init_rom field and at24c_eeprom_init_rom helper

Hello Ninad, On 1/25/23 17:53, Ninad S Palsule wrote: Signed-off-by: Peter Delevoryas pe...@pjd.dev Reviewed-by: Joel Stanley j...@jms.id.au Tested-by: Ninad Palsule ninadpals...@us.ibm.com Hi Peter, I applied y

Re: [PATCH v2 0/7] hw/cxl: RAS error emulation and injection

he cleanup patches. I was not sure if you wanted me to re-roll them or just send fixes patches. But I'd like to move forward with the fixes submitted if that is ok. Those are all minor issues which don't affect the behavior much at this point. [*] https://lore.kernel.org/all/2023

[PATCH 1/2] hw/cxl: Fix event log time stamp fields

CXL 3.0 8.2.9.4.2 Set Timestamp and 8.2.9.4.1 Get Timestamp define the way for software to set and get the time stamp of a device. Events should use a time stamp consistent with the Get Timestamp mailbox command. In addition avoid setting the time stamp twice. Fixes: fb64c5661d5f ("hw/cxl/events

[PATCH 0/2] hw/cxl: CXL Event processing fixups

ommit: bb3f9b2853f9723c11a38c6b7bca7368677f2b43 change-id: 20230125-ira-cxl-events-fixups-2023-01-11-337953e87f5d Best regards, -- Ira Weiny

[PATCH 2/2] hw/cxl: Remove check for g_new0() failure

g_new0() will terminate the application if it fails. Remove the check. Fixes: fb64c5661d5f ("hw/cxl/events: Wire up get/clear event mailbox commands") Reported-by: Jonathan Cameron Signed-off-by: Ira Weiny --- hw/cxl/cxl-events.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/hw/cxl/

Re: [QEMU][PATCH v4 07/10] hw/xen/xen-hvm-common: Use g_new and error_setg_errno

Il giorno mer 25 gen 2023 alle ore 22:07 Stefano Stabellini ha scritto: > > On Wed, 25 Jan 2023, Vikram Garhwal wrote: > > Replace g_malloc with g_new and perror with error_setg_errno. > > error_setg_errno -> error_report ? Also in the title > > Signed-off-by: Vikram Garhwal Frediano

[PATCH v5 3/4] checkpatch: add qemu_bh_new/aio_bh_new checks

Advise authors to use the _guarded versions of the APIs, instead. Signed-off-by: Alexander Bulekov --- scripts/checkpatch.pl | 8 1 file changed, 8 insertions(+) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 6ecabfb2b5..61bb4b0a19 100755 --- a/scripts/checkpatch.pl +

[PATCH v5 4/4] hw: replace most qemu_bh_new calls with qemu_bh_new_guarded

This protects devices from bh->mmio reentrancy issues. Reviewed-by: Stefan Hajnoczi Signed-off-by: Alexander Bulekov --- hw/9pfs/xen-9p-backend.c| 4 +++- hw/block/dataplane/virtio-blk.c | 3 ++- hw/block/dataplane/xen-block.c | 5 +++-- hw/block/virtio-blk.c | 5 +++-- hw/ch

[PATCH v5 2/4] async: Add an optional reentrancy guard to the BH API

Devices can pass their MemoryReentrancyGuard (from their DeviceState), when creating new BHes. Then, the async API will toggle the guard before/after calling the BH call-back. This prevents bh->mmio reentrancy issues. Signed-off-by: Alexander Bulekov --- docs/devel/multiple-iothreads.txt | 7 ++

[PATCH v5 0/4] memory: prevent dma-reentracy issues

These patches aim to solve two types of DMA-reentrancy issues: 1.) mmio -> dma -> mmio case To solve this, we track whether the device is engaged in io by checking/setting a reentrancy-guard within APIs used for MMIO access. 2.) bh -> dma write -> mmio case This case is trickier, since we dont ha

[PATCH v5 1/4] memory: prevent dma-reentracy issues

Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA. This flag is set/checked prior to calling a device's MemoryRegion handlers, and set when device code initiates DMA. The purpose of this flag is to prevent two types of DMA-based reentrancy issues: 1.) mmio -> dma -> mmio cas

[PATCH v5 0/4] memory: prevent dma-reentracy issues

These patches aim to solve two types of DMA-reentrancy issues: 1.) mmio -> dma -> mmio case To solve this, we track whether the device is engaged in io by checking/setting a reentrancy-guard within APIs used for MMIO access. 2.) bh -> dma write -> mmio case This case is trickier, since we dont ha

[PATCH v5 1/4] memory: prevent dma-reentracy issues

Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA. This flag is set/checked prior to calling a device's MemoryRegion handlers, and set when device code initiates DMA. The purpose of this flag is to prevent two types of DMA-based reentrancy issues: 1.) mmio -> dma -> mmio cas

Re: [PATCH v4 1/3] memory: prevent dma-reentracy issues

On 230120 1447, Peter Maydell wrote: > On Fri, 20 Jan 2023 at 14:42, Darren Kenny wrote: > > Generally, this looks good, but I do have a comment below... > > > > On Thursday, 2023-01-19 at 02:00:02 -05, Alexander Bulekov wrote: > > > Add a flag to the DeviceState, when a device is engaged in PIO/M

[PATCH v5 06/36] tcg: Introduce tcg_target_call_oarg_reg

Replace the flat array tcg_target_call_oarg_regs[] with a function call including the TCGCallReturnKind. Extend the set of registers for ARM to r0-r3 to match the ABI: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#result-return Reviewed-by: Alex Bennée Reviewed-by: Daniel

[PATCH v5 09/36] tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128

Fill in the parameters for the host ABI for Int128. Adjust tcg_target_call_oarg_reg for _WIN64, and tcg_out_call for i386 sysv. Allow TCG_TYPE_V128 stores without AVX enabled. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 10 ++ tcg/i386/tcg-target.c.inc | 30

[PATCH v5 36/36] target/i386: Inline cmpxchg16b

Use tcg_gen_atomic_cmpxchg_i128 for the atomic case, and tcg_gen_qemu_ld/st_i128 otherwise. Signed-off-by: Richard Henderson --- Cc: Paolo Bonzini Cc: Eduardo Habkost --- target/i386/helper.h | 4 --- target/i386/tcg/mem_helper.c | 69 target/i386/

[PATCH v5 07/36] tcg: Add TCG_CALL_RET_BY_VEC

This will be used by _WIN64 to return i128. Not yet used, because allocation is not yet enabled. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 1 + tcg/tcg.c | 19 +++ 2 files changed, 20 insertions(+) diff --git a/tcg/tcg-interna

[PATCH v5 08/36] include/qemu/int128: Use Int128 structure for TCI

We are about to allow passing Int128 to/from tcg helper functions, but libffi doesn't support __int128_t, so use the structure. In order for atomic128.h to continue working, we must provide a mechanism to frob between real __int128_t and the structure. Provide a new union, Int128Alias, for this.

[PATCH v5 27/36] target/s390x: Use Int128 for return from CKSM

Acked-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 +- target/s390x/tcg/mem_helper.c | 7 +++ target/s390x/tcg/translate.c | 6 -- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/target/s3

[PATCH v5 32/36] target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG

Signed-off-by: Richard Henderson --- Cc: David Hildenbrand Cc: Ilya Leoshkevich --- target/s390x/helper.h| 2 -- target/s390x/tcg/insn-data.h.inc | 2 +- target/s390x/tcg/mem_helper.c| 52 --- target/s390x/tcg/translate.c | 60 --

[PATCH v5 26/36] target/s390x: Use Int128 for return from CLST

Reviewed-by: Philippe Mathieu-Daudé Acked-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 +- target/s390x/tcg/mem_helper.c | 11 --- target/s390x/tcg/translate.c | 8 ++-- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git

[PATCH v5 00/36] tcg: Support for Int128 with helpers

Branch: https://gitlab.com/rth7680/qemu/-/tree/tcg-i128 Based-on: 20230124020507.3732200-1-richard.hender...@linaro.org ("[PULL v2 00/15] tcg patch queue") Changes for v5: * Rebase, minor conflicts fixed. Patches lacking review: common: 03-tcg-Allocate-objects-contiguously-in-temp_allocat

[PATCH v5 05/36] tcg: Add TCG_CALL_{RET,ARG}_BY_REF

These will be used by some hosts, both 32 and 64-bit, to pass and return i128. Not yet used, because allocation is not yet enabled. Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 3 + tcg/tcg.c | 135 - 2 files changed, 135 inser

[PATCH v5 28/36] target/s390x: Use Int128 for return from TRE

Acked-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 +- target/s390x/tcg/mem_helper.c | 7 +++ target/s390x/tcg/translate.c | 7 +-- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/target/s

[PATCH v5 02/36] tcg: Handle dh_typecode_i128 with TCG_CALL_{RET, ARG}_NORMAL

Many hosts pass and return 128-bit quantities like sequential 64-bit quantities. Treat this just like we currently break down 64-bit quantities for a 32-bit host. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tcg.c | 37 + 1 file changed,

[PATCH v5 04/36] tcg: Introduce tcg_out_addi_ptr

Implement the function for arm, i386, and s390x, which will use it. Add stubs for all other backends. Reviewed-by: Alex Bennée Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/tcg.c| 2 ++ tcg/aarch64/tcg-target.c.inc | 7 +++ tcg/

[PATCH v5 34/36] target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- Cc: Paolo Bonzini Cc: Eduardo Habkost --- target/i386/tcg/translate.c | 48 - 1 file changed, 31 insertions(+), 17 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/t

[PATCH v5 24/36] target/s390x: Use a single return for helper_divs32/u32

Pack the quotient and remainder into a single uint64_t. Signed-off-by: Richard Henderson --- v2: Fix operand ordering; use tcg_extr32_i64. Cc: David Hildenbrand Cc: Ilya Leoshkevich --- target/s390x/helper.h | 2 +- target/s390x/tcg/int_helper.c | 26 +- target

[PATCH v5 13/36] tcg: Add temp allocation for TCGv_i128

This enables allocation of i128. The type is not yet usable, as we have not yet added data movement ops. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 32 + tcg/tcg.c | 60 +--

[PATCH v5 21/36] tests/tcg/s390x: Add div.c

From: Ilya Leoshkevich Add a basic test to prevent regressions. Signed-off-by: Ilya Leoshkevich Message-Id: <2022110300.2539919-1-...@linux.ibm.com> Signed-off-by: Richard Henderson --- tests/tcg/s390x/div.c | 40 + tests/tcg/s390x/Makefile.target

[PATCH v5 22/36] tests/tcg/s390x: Add clst.c

From: Ilya Leoshkevich Add a basic test to prevent regressions. Signed-off-by: Ilya Leoshkevich Message-Id: <20221025213008.2209006-2-...@linux.ibm.com> Signed-off-by: Richard Henderson --- tests/tcg/s390x/clst.c | 82 + tests/tcg/s390x/Makefile.target

[PATCH v5 20/36] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX

Note that the previous direct reference to reserve_val, - tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode -? offsetof(CPUPPCState, reserve_val2) -: offsetof(CPUPPCState, reserve_val))); was incorrect because all references should have go

[PATCH v5 29/36] target/s390x: Copy wout_x1 to wout_x1_P

Make a copy of wout_x1 before modifying it, as wout_x1_P emphasizing that it operates on the out/out2 pair. The insns that use x1_P are data movement that will not change to Int128. Acked-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/insn-data.h.inc | 12 ++

[PATCH v5 25/36] target/s390x: Use a single return for helper_divs64/u64

Pack the quotient and remainder into a single Int128. Use the divu128 primitive to remove the cpu_abort on 32-bit hosts. Reviewed-by: Philippe Mathieu-Daudé Acked-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- v2: Extended div test case to cover these insns. --- target/s390x/helper.

[PATCH v5 17/36] tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}

Normally this is automatically handled by the CF_PARALLEL checks with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special case of !PREFIX_LOCK where it always wants the non-atomic version. Split these out so that x86 does not have to roll its own. Signed-off-by: Richard Henderson --- incl

[PATCH v5 14/36] tcg: Add basic data movement for TCGv_i128

Add code generation functions for data movement between TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract). Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg-op.h | 4 tcg/tcg-internal.h | 13 + tcg/tcg-op.c | 20 +++

[PATCH v5 35/36] target/i386: Inline cmpxchg8b

Use tcg_gen_atomic_cmpxchg_i64 for the atomic case, and tcg_gen_nonatomic_cmpxchg_i64 otherwise. Signed-off-by: Richard Henderson --- Cc: Paolo Bonzini Cc: Eduardo Habkost --- target/i386/helper.h | 2 -- target/i386/tcg/mem_helper.c | 57 target/i

[PATCH v5 16/36] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128

This will allow targets to avoid rolling their own. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 11 + include/tcg/tcg-op.h | 5 +++ tcg/tcg-op.c | 85 +++ accel/tcg/atomic_common.c.inc | 45 ++

[PATCH v5 01/36] tcg: Define TCG_TYPE_I128 and related helper macros

Begin staging in support for TCGv_i128 with Int128. Define the type enumerator, the typedef, and the helper-head.h macros. This cannot yet be used, because you can't allocate temporaries of this new type. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Hender

[PATCH v5 19/36] target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP

Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20221112042555.2622152-3-richard.hender...@linaro.org> --- target/arm/helper-a64.h| 2 -- target/arm/helper-a64.c| 43 --- target/arm/translate-a64.c | 61 +++

[PATCH v5 12/36] tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128

Fill in the parameters for the host ABI for Int128 for those backends which require no extra modification. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 2 ++ tcg/arm/tcg-target.h | 2 ++ tcg/loongarch64/tcg-target.h | 2 ++ tcg

[PATCH v5 10/36] tcg/tci: Fix big-endian return register ordering

We expect the backend to require register pairs in host-endian ordering, thus for big-endian the first register of a pair contains the high part. We were forcing R0 to contain the low part for calls. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tci.c | 21 +++

[PATCH v5 30/36] target/s390x: Use Int128 for returning float128

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Remove extraneous return_low128. Cc: David Hildenbrand Cc: Ilya Leoshkevich --- target/s390x/helper.h| 22 +++--- target/s390x/tcg/insn-data.h.inc | 20 ++--- target/s390x/tcg/fpu_helper.c

[PATCH v5 03/36] tcg: Allocate objects contiguously in temp_allocate_frame

When allocating a temp to the stack frame, consider the base type and allocate all parts at once. Signed-off-by: Richard Henderson --- tcg/tcg.c | 30 ++ 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index ffddda96ed..ff30f5e141

[PATCH v5 23/36] tests/tcg/s390x: Add long-double.c

Acked-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tests/tcg/s390x/long-double.c | 24 tests/tcg/s390x/Makefile.target | 1 + 2 files changed, 25 insertions(+) create mode 100644 tests/tcg/s390x/long-double.c diff --

[PATCH v5 33/36] target/s390x: Implement CC_OP_NZ in gen_op_calc_cc

This case is trivial to implement inline. Signed-off-by: Richard Henderson --- Cc: David Hildenbrand Cc: Ilya Leoshkevich --- target/s390x/tcg/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 0dafa27dab..b8cb21

[PATCH v5 15/36] tcg: Add guest load/store primitives for TCGv_i128

These are not yet considering atomicity of the 16-byte value; this is a direct replacement for the current target code which uses a pair of 8-byte operations. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 10 +++ include/tcg/tcg-op.h| 2 + accel/tcg/cputlb.c | 112 ++

[PATCH v5 11/36] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128

Fill in the parameters for libffi for Int128. Adjust the interpreter to allow for 16-byte return values. Adjust tcg_out_call to record the return value length. Call parameters are no longer all the same size, so we cannot reuse the same call_slots array for every function. Compute it each time now

[PATCH v5 18/36] target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXP

Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20221112042555.2622152-2-richard.hender...@linaro.org> --- target/arm/helper-a64.h| 6 --- target/arm/helper-a64.c| 104 - target/arm/translate-a64.c | 60 -

[PATCH v5 31/36] target/s390x: Use Int128 for passing float128

Signed-off-by: Richard Henderson --- v2: Fix SPEC_in1_x1. Cc: David Hildenbrand Cc: Ilya Leoshkevich --- target/s390x/helper.h| 32 ++-- target/s390x/tcg/insn-data.h.inc | 30 +-- target/s390x/tcg/fpu_helper.c| 88 ++-- target/s390x/tc

Re: [PATCH v4 2/3] async: Add an optional reentrancy guard to the BH API

On 230125 1624, Stefan Hajnoczi wrote: > On Thu, Jan 19, 2023 at 02:03:07AM -0500, Alexander Bulekov wrote: > > Devices can pass their MemoryReentrancyGuard (from their DeviceState), > > when creating new BHes. Then, the async API will toggle the guard > > before/after calling the BH call-back. Thi

Re: [PATCH v4 06/36] tcg: Introduce tcg_target_call_oarg_reg

On 1/25/23 11:09, Alex Bennée wrote: -static const int tcg_target_call_oarg_regs[2] = { -TCG_REG_R0, TCG_REG_R1 -}; + +static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) +{ +tcg_debug_assert(kind == TCG_CALL_RET_NORMAL); +tcg_debug_assert(slot >= 0 && slot <= 3);

Re: [PATCH qemu 1/1] Remove a stray "@end table" marker

On 1/25/23 16:12, ~gurjeet wrote: From: Gurjeet Singh Signed-off-by: Gurjeet Singh --- docs/system/cpu-models-x86.rst.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/system/cpu-models-x86.rst.inc b/docs/system/cpu-models-x86.rst.inc index 7f6368f999..261da6e21d

Re: ARM: ptw.c:S1_ptw_translate

On 1/25/23 13:27, Sid Manning wrote: On 7.2 VA to PA mappings are not consistent: Thread 10 "vp" hit Breakpoint 1, tlb_add_large_page (env=0xeb7ac0, mmu_idx=0x2, vaddr=0xff809977f000, size=0x1000) at ../../../../../../src/qemu/accel/tcg/cputlb.c:1090 tlb_set_page_full: vaddr=ff809977

Re: [QEMU][PATCH v4 09/10] hw/arm: introduce xenpvh machine

Hi Stefano, On 1/25/23 2:20 PM, Stefano Stabellini wrote: On Wed, 25 Jan 2023, Vikram Garhwal wrote: Add a new machine xenpvh which creates a IOREQ server to register/connect with Xen Hypervisor. Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a TPM emulator and co

Re: [QEMU][PATCH v4 01/10] hw/i386/xen/: move xen-mapcache.c to hw/xen/

Hi Philippe, On 1/25/23 2:59 PM, Philippe Mathieu-Daudé wrote: On 25/1/23 09:53, Vikram Garhwal wrote: xen-mapcache.c contains common functions which can be used for enabling Xen on aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it accessible for both aarch64 an

Re: [PATCH v8 09/13] vfio/migration: Implement VFIO migration protocol v2

On Sun, 22 Jan 2023 12:31:33 +0200 Avihai Horon wrote: > On 21/01/2023 1:07, Alex Williamson wrote: > > External email: Use caution opening links or attachments > > > > > > On Mon, 16 Jan 2023 16:11:31 +0200 > > Avihai Horon wrote: > > > >> Implement the basic mandatory part of VFIO migration

Re: [PATCH v2 34/35] cpu-exec: assert that plugin_mem_cbs is NULL after execution

On 24/1/23 19:01, Alex Bennée wrote: From: Emilio Cota Fixes: #1381 Signed-off-by: Emilio Cota Message-Id: <20230108165107.62488-1-c...@braap.org> [AJB: manually applied follow-up fix] Signed-off-by: Alex Bennée --- include/qemu/plugin.h | 4 accel/tcg/cpu-exec.c | 2 ++ 2 files ch

RE: ARM: ptw.c:S1_ptw_translate

> -Original Message- > From: qemu-devel-bounces+sidneym=quicinc@nongnu.org devel-bounces+sidneym=quicinc@nongnu.org> On Behalf Of Sid > Manning > Sent: Thursday, January 5, 2023 7:08 PM > To: 'Richard Henderson' ; qemu- > de...@nongnu.org > Cc: phi...@linaro.org; Mark Burton > S

Re: [PATCH v2 35/35] plugins: Iterate on cb_lists in qemu_plugin_user_exit

On 24/1/23 19:01, Alex Bennée wrote: From: Richard Henderson Rather than iterate over all plugins for all events, iterate over plugins that have registered a given event. Signed-off-by: Richard Henderson Message-Id: <20230117035701.168514-4-richard.hender...@linaro.org> (Missing Alex's S-o-

Re: [PATCH v2 23/35] semihosting: Write back semihosting data before completion callback

On 24/1/23 19:01, Alex Bennée wrote: From: Keith Packard 'lock_user' allocates a host buffer to shadow a target buffer, 'unlock_user' copies that host buffer back to the target and frees the host memory. If the completion function uses the target buffer, it must be called after unlock_user to e

Re: [XEN PATCH v2 0/3] Configure qemu upstream correctly by default for igd-passthru

On 1/25/2023 6:37 AM, Anthony PERARD wrote: > On Tue, Jan 10, 2023 at 02:32:01AM -0500, Chuck Zmudzinski wrote: > > I call attention to the commit message of the first patch which points > > out that using the "pc" machine and adding the xen platform device on > > the qemu upstream command line is

Re: [PATCH 4/4] hw/ppc/e500.c: Attach eSDHC unimplemented region to ccsr_addr_space

On 25/1/23 14:00, Bernhard Beschow wrote: Makes the unimplemented region move together with the CCSR address space if moved by a bootloader. Moving the CCSR address space isn't implemented yet but this patch is a preparation for it. Signed-off-by: Bernhard Beschow --- hw/ppc/e500.c | 10 +

Re: [PATCH 3/3] util/userfaultfd: Support /dev/userfaultfd

On 25/1/23 23:40, Peter Xu wrote: Teach QEMU to use /dev/userfaultfd when it existed and fallback to the system call if either it's not there or doesn't have enough permission. Firstly, as long as the app has permission to access /dev/userfaultfd, it always have the ability to trap kernel faults

Re: [PATCH 2/3] util/userfaultfd: Add uffd_open()

On 25/1/23 23:40, Peter Xu wrote: Add a helper to create the uffd handle. Signed-off-by: Peter Xu --- include/qemu/userfaultfd.h | 1 + migration/postcopy-ram.c | 11 +-- tests/qtest/migration-test.c | 3 ++- util/userfaultfd.c | 13 +++-- 4 files changed

Re: [QEMU][PATCH v4 01/10] hw/i386/xen/: move xen-mapcache.c to hw/xen/

On 25/1/23 09:53, Vikram Garhwal wrote: xen-mapcache.c contains common functions which can be used for enabling Xen on aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it accessible for both aarch64 and x86. Signed-off-by: Vikram Garhwal Signed-off-by: Stefano Stabe

Re: [PATCH v4 34/36] target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b

On 8/1/23 03:37, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 48 - 1 file changed, 31 insertions(+), 17 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

[PATCH 0/3] util/userfaultfd: Support /dev/userfaultfd

The new /dev/userfaultfd handle is superior to the system call with a better permission control and also works for a restricted seccomp environment. The new device was only introduced in v6.1 so we need a header update. Please have a look, thanks. Peter Xu (3): linux-headers: Update to v6.1

[PATCH 2/3] util/userfaultfd: Add uffd_open()

Add a helper to create the uffd handle. Signed-off-by: Peter Xu --- include/qemu/userfaultfd.h | 1 + migration/postcopy-ram.c | 11 +-- tests/qtest/migration-test.c | 3 ++- util/userfaultfd.c | 13 +++-- 4 files changed, 19 insertions(+), 9 deletions(-) diff

[PATCH 1/3] linux-headers: Update to v6.1

Signed-off-by: Peter Xu --- include/standard-headers/drm/drm_fourcc.h | 34 - include/standard-headers/linux/ethtool.h | 63 +++- include/standard-headers/linux/fuse.h | 6 +- .../linux/input-event-codes.h | 1 + include/standard-headers/linux/virtio

[PATCH 3/3] util/userfaultfd: Support /dev/userfaultfd

Teach QEMU to use /dev/userfaultfd when it existed and fallback to the system call if either it's not there or doesn't have enough permission. Firstly, as long as the app has permission to access /dev/userfaultfd, it always have the ability to trap kernel faults which QEMU mostly wants. Meanwhile,

Re: [QEMU][PATCH v4 04/10] xen-hvm: reorganize xen-hvm and move common function to xen-hvm-common

Hi Stefano, On 1/25/23 1:55 PM, Stefano Stabellini wrote: On Wed, 25 Jan 2023, Vikram Garhwal wrote: From: Stefano Stabellini This patch does following: 1. creates arch_handle_ioreq() and arch_xen_set_memory(). This is done in preparation for moving most of xen-hvm code to an arch-neutra

Re: [PATCH v4 3/3] hw: replace most qemu_bh_new calls with qemu_bh_new_guarded

On Thu, Jan 19, 2023 at 02:03:08AM -0500, Alexander Bulekov wrote: > This protects devices from bh->mmio reentrancy issues. > > Signed-off-by: Alexander Bulekov > --- > hw/9pfs/xen-9p-backend.c| 4 +++- > hw/block/dataplane/virtio-blk.c | 3 ++- > hw/block/dataplane/xen-block.c | 5 +++-

Re: [QEMU][PATCH v4 09/10] hw/arm: introduce xenpvh machine

On Wed, 25 Jan 2023, Vikram Garhwal wrote: > Add a new machine xenpvh which creates a IOREQ server to register/connect with > Xen Hypervisor. > > Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a > TPM emulator and connects to swtpm running on host machine via chardev

Re: [PATCH v4 3/3] hw: replace most qemu_bh_new calls with qemu_bh_new_guarded

On Thu, Jan 19, 2023 at 02:03:08AM -0500, Alexander Bulekov wrote: > This protects devices from bh->mmio reentrancy issues. > > Signed-off-by: Alexander Bulekov > --- > hw/9pfs/xen-9p-backend.c| 4 +++- > hw/block/dataplane/virtio-blk.c | 3 ++- > hw/block/dataplane/xen-block.c | 5 +++-

Re: [PATCH v4 5/5] hw/nvram/eeprom_at24c: Make reset behavior more like hardware

On Wed, Jan 25, 2023 at 03:41:30PM -0600, Corey Minyard wrote: > On Tue, Jan 17, 2023 at 06:42:14PM -0800, Peter Delevoryas wrote: > > EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM, > > I would expect the I2C state machine to be reset to default values, but I > > wouldn'

Re: [QEMU][PATCH v4 07/10] hw/xen/xen-hvm-common: Use g_new and error_setg_errno

On Wed, 25 Jan 2023, Vikram Garhwal wrote: > Replace g_malloc with g_new and perror with error_setg_errno. > > Signed-off-by: Vikram Garhwal > --- > hw/xen/xen-hvm-common.c | 12 ++-- > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen

Re: [PATCH v4 3/5] hw/nvram/eeprom_at24c: Add init_rom field and at24c_eeprom_init_rom helper

On Wed, Jan 25, 2023 at 03:36:23PM -0600, Corey Minyard wrote: > On Tue, Jan 17, 2023 at 06:42:12PM -0800, Peter Delevoryas wrote: > > Allows users to specify binary data to initialize an EEPROM, allowing users > > to > > emulate data programmed at manufacturing time. > > > > - Added init_rom and

Re: [QEMU][PATCH v4 06/10] hw/xen/xen-hvm-common: skip ioreq creation on ioreq registration failure

On Wed, 25 Jan 2023, Vikram Garhwal wrote: > From: Stefano Stabellini > > On ARM it is possible to have a functioning xenpv machine with only the > PV backends and no IOREQ server. If the IOREQ server creation fails continue > to the PV backends initialization. > > Also, moved the IOREQ registra

Re: [QEMU][PATCH v4 05/10] include/hw/xen/xen_common: return error from xen_create_ioreq_server

On Wed, 25 Jan 2023, Vikram Garhwal wrote: > From: Stefano Stabellini > > This is done to prepare for enabling xenpv support for ARM architecture. > On ARM it is possible to have a functioning xenpv machine with only the > PV backends and no IOREQ server. If the IOREQ server creation fails, > con

Re: [QEMU][PATCH v4 04/10] xen-hvm: reorganize xen-hvm and move common function to xen-hvm-common

On Wed, 25 Jan 2023, Vikram Garhwal wrote: > From: Stefano Stabellini > > This patch does following: > 1. creates arch_handle_ioreq() and arch_xen_set_memory(). This is done in > preparation for moving most of xen-hvm code to an arch-neutral location, > move the x86-specific portion of xe

Re: [PATCH v4 00/36] tcg: Support for Int128 with helpers

Richard Henderson writes: > Changes for v4: > * About half of the v3 series has been merged, > * AArch64 host requires even argument register. > * target/{arm,ppc,s390x,i386} uses included here. Have you got a branch or a new re-base? I tried applying but got messy conflicts I couldn't c

Re: [PATCH v4 5/5] hw/nvram/eeprom_at24c: Make reset behavior more like hardware

On Tue, Jan 17, 2023 at 06:42:14PM -0800, Peter Delevoryas wrote: > EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM, > I would expect the I2C state machine to be reset to default values, but I > wouldn't really expect the memory to change at all. Yes, I agree, I was actua

Re: [PATCH v4 4/5] hw/arm/aspeed: Add aspeed_eeprom.c

On Tue, Jan 17, 2023 at 06:42:13PM -0800, Peter Delevoryas wrote: > - Create aspeed_eeprom.c and aspeed_eeprom.h > - Include aspeed_eeprom.c in CONFIG_ASPEED meson source files > - Include aspeed_eeprom.h in aspeed.c > - Add fby35_bmc_fruid data > - Use new at24c_eeprom_init_rom helper to initializ

Re: [PATCH v4 1/5] hw/arm: Extract at24c_eeprom_init helper from Aspeed and Nuvoton boards

On Tue, Jan 17, 2023 at 06:42:10PM -0800, Peter Delevoryas wrote: > This helper is useful in board initialization because lets users initialize > and > realize an EEPROM on an I2C bus with a single function call. This is a good improvement. Reviewed-by: Corey Minyard > > Signed-off-by: Peter

Re: [PATCH v4 2/5] hw/arm/aspeed: Replace aspeed_eeprom_init with at24c_eeprom_init

On Tue, Jan 17, 2023 at 06:42:11PM -0800, Peter Delevoryas wrote: > aspeed_eeprom_init is an exact copy of at24c_eeprom_init, not needed. Reviewed-by: Corey Minyard > > Signed-off-by: Peter Delevoryas > Reviewed-by: Cédric Le Goater > Reviewed-by: Philippe Mathieu-Daudé > Reviewed-by: Joel St

Re: [PATCH v4 3/5] hw/nvram/eeprom_at24c: Add init_rom field and at24c_eeprom_init_rom helper

On Tue, Jan 17, 2023 at 06:42:12PM -0800, Peter Delevoryas wrote: > Allows users to specify binary data to initialize an EEPROM, allowing users to > emulate data programmed at manufacturing time. > > - Added init_rom and init_rom_size attributes to TYPE_AT24C_EE > - Added at24c_eeprom_init_rom hel

Re: [PATCH v4 2/3] async: Add an optional reentrancy guard to the BH API

On Thu, Jan 19, 2023 at 02:03:07AM -0500, Alexander Bulekov wrote: > Devices can pass their MemoryReentrancyGuard (from their DeviceState), > when creating new BHes. Then, the async API will toggle the guard > before/after calling the BH call-back. This prevents bh->mmio reentrancy > issues. > > S

Re: [PATCH v4 07/36] tcg: Add TCG_CALL_RET_BY_VEC

Richard Henderson writes: > This will be used by _WIN64 to return i128. Not yet used, > because allocation is not yet enabled. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v4 1/3] memory: prevent dma-reentracy issues

On Thu, Jan 19, 2023 at 02:03:06AM -0500, Alexander Bulekov wrote: > Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA. > This flag is set/checked prior to calling a device's MemoryRegion > handlers, and set when device code initiates DMA. The purpose of this > flag is to pre

Re: [PATCH v4 06/36] tcg: Introduce tcg_target_call_oarg_reg

Richard Henderson writes: > Replace the flat array tcg_target_call_oarg_regs[] with > a function call including the TCGCallReturnKind. > > Reviewed-by: Daniel Henrique Barboza > Signed-off-by: Richard Henderson > --- > tcg/tcg.c| 9 ++--- > tcg/aarch64/tcg-target

Re: [PATCH v4 3/5] hw/nvram/eeprom_at24c: Add init_rom field and at24c_eeprom_init_rom helper

Signed-off-by: Peter Delevoryas pe...@pjd.dev Reviewed-by: Joel Stanley j...@jms.id.au Tested-by: Ninad Palsule ninadpals...@us.ibm.com Hi Peter, I applied your patches and made sure that different EEPROM images can be l

Re: [XEN PATCH v2 0/3] Configure qemu upstream correctly by default for igd-passthru

On 1/25/2023 6:37 AM, Anthony PERARD wrote: > On Tue, Jan 10, 2023 at 02:32:01AM -0500, Chuck Zmudzinski wrote: > > I call attention to the commit message of the first patch which points > > out that using the "pc" machine and adding the xen platform device on > > the qemu upstream command line is

Re: [PATCH] vhost-user-fs: add capability to allow migration

On Sun, Jan 15, 2023 at 07:09:03PM +0200, Anton Kuchin wrote: > Now any vhost-user-fs device makes VM unmigratable, that also prevents > qemu update without stopping the VM. In most cases that makes sense > because qemu has no way to transfer FUSE session state. > > But we can give an option to or

Re: [PATCH v4 3/5] hw/nvram/eeprom_at24c: Add init_rom field and at24c_eeprom_init_rom helper

On Wed, Jan 25, 2023 at 04:53:20PM +, Ninad S Palsule wrote: > Signed-off-by: Peter Delevoryas pe...@pjd.dev > Reviewed-by: Joel Stanley j...@jms.id.au > > Tested-by: Ninad Palsule > ninadpals...@us.ibm.com > > Hi P

Re: [PATCH 00/40] x86: fixing and cleaning up ACPI PCI code part 3

On Wed, Jan 25, 2023 at 06:02:09PM +0100, Igor Mammedov wrote: > On Thu, 12 Jan 2023 15:02:32 +0100 > Igor Mammedov wrote: > > ping, > > Michael can you take a look at this series and queue it > if it looks acceptable to you. Yes it's tagged already. RSN. > > PS: > I'm waiting on this being m

[PATCH] docs/s390x/pcidevices: document pci devices on s390x

Add some documentation about the zpci device and how to use it with pci devices on s390x. Used source: Cornelia Huck's blog post https://people.redhat.com/~cohuck/2018/02/19/notes-on-pci-on-s390x.html Signed-off-by: Sebastian Mitterle --- docs/system/s390x/pcidevices.rst | 34 ++

Re: [PATCH 00/40] x86: fixing and cleaning up ACPI PCI code part 3

On Thu, 12 Jan 2023 15:02:32 +0100 Igor Mammedov wrote: ping, Michael can you take a look at this series and queue it if it looks acceptable to you. PS: I'm waiting on this being merged, to send acpi-index support on non-hotpluggable ports (due to heavy dependency on this refactoring). After w

Re: [PATCH 0/7] ACPI controller cleanup

On Sun, 22 Jan 2023 18:07:17 +0100 Bernhard Beschow wrote: > This series brings the PIIX4 PM device closer to reality and resolves some > redundant code along the way. I'm done with this series review > > Testing done: > - `make check` > - Starting a live CD under pc and q35 machines and check

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