On Tue, Jun 28, 2022 at 11:30 PM Michael S. Tsirkin wrote:
>
> On Tue, Jun 28, 2022 at 05:15:05PM +0100, Daniel P. Berrangé wrote:
> > FYI, the reason much of this is intentionally NOT under the /qemu-project
> > gitlab namespace is that we did not want to be responsible for distributing
> > arbit
In xen_pt_config_reg_init(), there is an error in the merging of the
emulated data with the host value. With the current Qemu, instead of
merging the emulated bits with the host bits as defined by emu_mask,
the emulated bits are merged with the host bits as defined by the
inverse of emu_mask. In so
Currently we are creating a register group for the Intel IGD OpRegion
for every device we pass through, but the XEN_PCI_INTEL_OPREGION
register group is only valid for an Intel IGD. Add a check to make
sure the device is an Intel IGD and a check that the administrator has
enabled gfx_passthru in th
jianchunfu writes:
> Add error reporting before return when opening file fails.
>
> Signed-off-by: jianchunfu
> ---
> target/ppc/kvm.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index dc93b99189..ef9a871411 100644
> --- a/target/ppc/kvm.c
>
On Wed, Jun 29, 2022 at 9:27 AM Bin Meng wrote:
>
> Hi Rahul,
>
> On Wed, Jun 29, 2022 at 10:07 AM Rahul Pathak
> wrote:
> >
> > Hi Alistair
> >
> > My fix patch needs to be dropped since Anup took care of this issue
> > in his yesterdays series update in this patch -
> > [PATCH v8 4/4] target/r
The fby35 machine includes 4 server boards, each of which has a "bridge
interconnect" (BIC). This chip abstracts the pinout for the server board
into a single endpoint that the baseboard management controller (BMC)
can talk to using IPMB.
The codename for this board is oby35-cl, which means "OpenB
Hi Rahul,
On Wed, Jun 29, 2022 at 10:07 AM Rahul Pathak wrote:
>
> Hi Alistair
>
> My fix patch needs to be dropped since Anup took care of this issue
> in his yesterdays series update in this patch -
> [PATCH v8 4/4] target/riscv: Force disable extensions if priv spec
> version does not match
I
The Intel Management Engine is an IPMI endpoint that responds to various
IPMI commands. In this commit, I've added some very basic functionality that
will respond back with a respond code of zero (success), while also setting
an appropriate response NetFN (request NetFN + 1), a matching command ID
This introduces a really basic PECI controller that responses to
commands by always setting the response code to success and then raising
an interrupt to indicate the command is done. This helps avoid getting
hit with constant errors if the driver continuously attempts to send a
command and keeps t
fby35 machines have 1 BMC on a baseboard and 2-4 server boards with BIC's.
There are also CPLD's on each of the boards, one type of CPLD on the
baseboard and another type on each of the server boards. This commit adds an
implementation of some of the logic performed by the server board CPLD,
which
Signed-off-by: Peter Delevoryas
---
hw/i2c/pmbus_device.c| 5 +
hw/sensor/isl_pmbus_vr.c | 31 +++
include/hw/i2c/pmbus_device.h| 1 +
include/hw/sensor/isl_pmbus_vr.h | 1 +
4 files changed, 38 insertions(+)
diff --git a/hw/i2c/pmbus_de
From: Klaus Jensen
Allow slaves to master the bus by registering a bottom halve. If the bus
is busy, the bottom half is queued up. When a slave has succesfully
mastered the bus, the bottom half is scheduled.
Signed-off-by: Klaus Jensen
[ clg : - fixed typos in commit log ]
Message-Id: <20220601
This commit adds support for DMA RX in slave mode while using the new
register set in the AST2600 and AST1030. This patch also pretty much
assumes packet mode is enabled, I'm not sure if this will work in DMA
step mode.
This is particularly useful for testing IPMB exchanges between Zephyr
and exte
From: Klaus Jensen
Add an asynchronous version of i2c_send() that requires the slave to
explicitly acknowledge on the bus with i2c_ack().
The current master must use the new i2c_start_send_async() to indicate
that it wants to do an asynchronous transfer. This allows the i2c core
to check if the
Hey Cedric,
I've gone over the patch series and reordered it a little better.
Changes since v1:
- Replaced printf's with qemu_log_mask or trace events.
- Added more detailed commit messages to several commits.
- Removed one unnecessary patch through reordering intel-me before oby35-cl.
- Replaced
When a pmbus device switches pages, it should clears its output buffer so
that the next transaction doesn't emit data from the previous page.
Fixes: 3746d5c15e70570b ("hw/i2c: add support for PMBus”)
Signed-off-by: Peter Delevoryas
---
hw/i2c/pmbus_device.c | 1 +
1 file changed, 1 insertion(+)
aspeed_i2c_bus_is_master is checking if master mode is enabled in the I2C
bus controller's function-control register, not that slave mode is enabled
or something. The error here is that the guest is trying to trigger an I2C
master mode command while master mode is not enabled.
Fixes: ba2cccd64e90
From: Klaus Jensen
Add slave mode functionality for the Aspeed I2C controller in old
register mode. This is implemented by realizing an I2C slave device
owned by the I2C controller and attached to its own bus.
The I2C slave device only implements asynchronous sends on the bus, so
slaves not supp
I noticed i2c rx transfers were getting shortened to "1" on Zephyr. It
seems to be because the Zephyr i2c driver sets the RX DMA len with the
RX field write-enable bit set (bit 31) to avoid a read-modify-write. [1]
/* 0x1C : I2CM Master DMA Transfer Length Register */
I think we should be check
Very minor, doesn't effect functionality, but this is supposed to be
R_I2CC_FUN_CTRL (new-mode, not old-mode).
Fixes: ba2cccd64e9 ("aspeed: i2c: Add new mode support")
Signed-off-by: Peter Delevoryas
---
hw/i2c/aspeed_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i
Add error reporting before return when opening file fails.
Signed-off-by: jianchunfu
---
target/ppc/kvm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index dc93b99189..ef9a871411 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1798,6 +1798,7
On Tue, 28 Jun 2022 at 16:55, Cédric Le Goater wrote:
>
> Coverity warns that "ssi_transfer(s->spi, 0U) << 8 * i" might overflow
> because the expression is evaluated using 32-bit arithmetic and then
> used in a context expecting a uint64_t.
Would it make sense to also place a limit on "size"?
a
Damien Le Moal 于2022年6月29日周三 10:32写道：
>
> On 6/29/22 10:50, Sam Li wrote:
> >>> +rep_size = sizeof(struct blk_zone_report) + nrz * sizeof(struct
> >>> blk_zone);
> >>> +g_autofree struct blk_zone_report *rep = g_new(struct
> >>> blk_zone_report, nrz);
> >>
> >> g_
On 6/29/22 10:50, Sam Li wrote:
>>> +rep_size = sizeof(struct blk_zone_report) + nrz * sizeof(struct
>>> blk_zone);
>>> +g_autofree struct blk_zone_report *rep = g_new(struct
>>> blk_zone_report, nrz);
>>
>> g_new() looks incorrect. There should be 1 struct blk_zon
The motivation of adding vhost-user vhost_dev_start support is to
improve backend configuration speed and reduce live migration VM
downtime.
Today VQ configuration is issued one by one. For virtio net with
multi-queue support, backend needs to update RSS (Receive side
scaling) on every rx queue en
This patch is part of adding vhost-user vhost_dev_start support. The
motivation is to improve backend configuration speed and reduce live
migration VM downtime.
Moving the device start routines after finishing all the necessary device
and VQ configuration, further aligning to the virtio specificat
The motivation of adding vhost-user vhost_dev_start support is to
improve backend configuration speed and reduce live migration VM
downtime.
Today VQ configuration is issued one by one. For virtio net with
multi-queue support, backend needs to update RSS (Receive side
scaling) on every rx queue en
On Mon, Jun 13, 2022 at 10:10 PM Jason A. Donenfeld wrote:
>
> If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
> initialize early. Set this using the usual guest random number
> generation function. This is confirmed to successfully initialize the
> RNG on Linux 5.19-rc2.
Hi Alistair
My fix patch needs to be dropped since Anup took care of this issue
in his yesterdays series update in this patch -
[PATCH v8 4/4] target/riscv: Force disable extensions if priv spec
version does not match
Thanks
Rahul
On Wed, Jun 29, 2022 at 7:32 AM Alistair Francis wrote:
>
> On T
On Tue, Jun 28, 2022 at 3:03 AM Rahul Pathak wrote:
>
> mhartid csr is not available in user-mode code path and
> user-mode build fails because of its reference in
> riscv_cpu_realize function
>
> Commit causing the issue is currently in Alistair's
> riscv-to-apply.next branch and need to be squas
Damien Le Moal 于2022年6月29日周三 09:43写道：
>
> On 6/28/22 19:23, Sam Li wrote:
> > Damien Le Moal 于2022年6月28日周二 17:05写道：
> >>
> >> On 6/28/22 17:05, Sam Li wrote:
> >>> Stefan Hajnoczi 于2022年6月28日周二 14:52写道：
>
> On Mon, Jun 27, 2022 at 08:19:13AM +0800, Sam Li wrote:
> > diff --git a/bl
On 6/28/22 19:23, Sam Li wrote:
> Damien Le Moal 于2022年6月28日周二 17:05写道：
>>
>> On 6/28/22 17:05, Sam Li wrote:
>>> Stefan Hajnoczi 于2022年6月28日周二 14:52写道：
On Mon, Jun 27, 2022 at 08:19:13AM +0800, Sam Li wrote:
> diff --git a/block/block-backend.c b/block/block-backend.c
> index e
On 6/28/22 19:08, Max Filippov wrote:
On Tue, Jun 28, 2022 at 4:43 AM Richard Henderson
wrote:
This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.
Remove the xtensa custom console handing and rely on the
generic -se
Max Filippov writes:
> Hello,
>
> there used to be an option to run tcg tests for a softmmu target with
> make check-tcg
> but since the commit 5377a1000192 ("tests/tcg: list test targets in
> Makefile.prereqs")
> it is no longer working for me.
>
> Is it supposed to be working and was broken b
Le 06/05/2022 à 18:31, Tong Zhang a écrit :
assert(dbs->acb) is meant to check the return value of io_func per
documented in commit 6bee44ea34 ("dma: the passed io_func does not
return NULL"). However, there is a chance that after calling
aio_context_release(dbs->ctx); the dma_blk_cb function is
Le 26/06/2022 à 11:46, Bernhard Beschow a écrit :
xen_piix_pci_write_config_client() is implemented in the xen sub tree and
uses PIIX constants internally, thus creating a direct dependency on
PIIX. Now that xen_set_pci_link_route() is stubbable, the logic of
xen_piix_pci_write_config_client() ca
Le 26/06/2022 à 11:46, Bernhard Beschow a écrit :
The only user of xen_set_pci_link_route() is
xen_piix_pci_write_config_client() which implements PIIX-specific logic in
the xen namespace. This makes xen-hvm depend on PIIX which could be
avoided if xen_piix_pci_write_config_client() was implement
Frederic Barrat writes:
> On 28/06/2022 17:12, Alex Bennée wrote:
>> Frederic Barrat writes:
>>
>>> On 28/06/2022 13:25, Matheus K. Ferst wrote:
On 27/06/2022 15:25, Frederic Barrat wrote:
> [ Resending as it was meant for the qemu-ppc list ]
>
> Hello,
>
> I've been
On Tue, Jun 28, 2022 at 8:23 PM Anup Patel wrote:
>
> The minimum priv spec versino for mcountinhibit to v1.11 so that it
> is not available for v1.10 (or lower).
>
> Fixes: eab4776b2bad ("target/riscv: Add support for hpmcounters/hpmevents")
> Signed-off-by: Anup Patel
Reviewed-by: Alistair Fra
On Tue, 28 Jun 2022, B wrote:
> Am 26. Juni 2022 09:46:54 UTC schrieb Bernhard Beschow :
> >hw/i386/xen/xen-hvm.c contains logic which is PIIX-specific. This makes
> >xen-hvm.c depend on PIIX which can be avoided if PIIX logic was isolated in
> >PIIX itself.
> >
> >
> >
> >Bernhard Beschow (2):
>
Am 26. Juni 2022 09:46:54 UTC schrieb Bernhard Beschow :
>hw/i386/xen/xen-hvm.c contains logic which is PIIX-specific. This makes
>xen-hvm.c depend on PIIX which can be avoided if PIIX logic was isolated in
>PIIX itself.
>
>
>
>Bernhard Beschow (2):
>
> hw/i386/xen/xen-hvm: Allow for stubbing
All ppc CPUs represent hardware that exists in the real world, i.e.: we
do not have a "max" CPU with all possible emulated features enabled.
Return the default CPU type for the machine because that has greater
chance of being useful as the "max" CPU.
Resolves: https://gitlab.com/qemu-project/qemu/
On 6/28/22 20:28, Emanuele Giuseppe Esposito wrote:
Am 28/06/2022 um 17:26 schrieb Vladimir Sementsov-Ogievskiy:
On 6/28/22 18:22, Vladimir Sementsov-Ogievskiy wrote:
On 6/28/22 16:04, Emanuele Giuseppe Esposito wrote:
Ok so far I did the following:
- duplicated each public function as stat
On 6/27/22, Jason A. Donenfeld wrote:
> On 6/27/22, Peter Maydell wrote:
>> On Mon, 27 Jun 2022 at 17:07, Jason A. Donenfeld wrote:
>>>
>>> In 60592cfed2 ("hw/arm/virt: dt: add kaslr-seed property"), the
>>> kaslr-seed property was added, but the equally as important rng-seed
>>> property was fo
On Tue, Jun 28, 2022 at 05:15:05PM +0100, Daniel P. Berrangé wrote:
> FYI, the reason much of this is intentionally NOT under the /qemu-project
> gitlab namespace is that we did not want to be responsible for distributing
> arbitrary binary blobs/images. That in turn makes the QEMU project responsi
Am 28/06/2022 um 17:26 schrieb Vladimir Sementsov-Ogievskiy:
> On 6/28/22 18:22, Vladimir Sementsov-Ogievskiy wrote:
>> On 6/28/22 16:04, Emanuele Giuseppe Esposito wrote:
> Ok so far I did the following:
>
> - duplicated each public function as static {function}_locked()
They s
On Tue, Jun 28, 2022 at 9:49 AM wrote:
>
> From: Marc-André Lureau
>
> Hi,
>
> As reported earlier by Richard Henderson ("virgl avocado hang" thread),
> avocado
> tests may hang when QEMU exits before the QMP connection is established.
>
> My proposal to fix the problem here is to do both accept
* Leonardo Bras Soares Passos (leob...@redhat.com) wrote:
> On Tue, Jun 28, 2022 at 10:52 AM Dr. David Alan Gilbert
> wrote:
> >
> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > > On Tue, Jun 28, 2022 at 09:32:04AM -0300, Leonardo Bras Soares Passos
> > > wrote:
> > > > On Tue, Jun 28, 2
Coverity warns that "ssi_transfer(s->spi, 0U) << 8 * i" might overflow
because the expression is evaluated using 32-bit arithmetic and then
used in a context expecting a uint64_t.
Fixes: Coverity CID 1487244
Signed-off-by: Cédric Le Goater
---
hw/ssi/aspeed_smc.c | 4 ++--
1 file changed, 2 inse
On Tue, Jun 28, 2022 at 10:52 AM Dr. David Alan Gilbert
wrote:
>
> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > On Tue, Jun 28, 2022 at 09:32:04AM -0300, Leonardo Bras Soares Passos wrote:
> > > On Tue, Jun 28, 2022 at 4:53 AM Daniel P. Berrangé
> > > wrote:
> > > >
> > > > On Mon, Jun
Hello,
there used to be an option to run tcg tests for a softmmu target with
make check-tcg
but since the commit 5377a1000192 ("tests/tcg: list test targets in
Makefile.prereqs")
it is no longer working for me.
Is it supposed to be working and was broken by accident? Or what is the correct
way to
On [2022 Jun 28] Tue 17:52:50, Cédric Le Goater wrote:
> Alistair, Francisco,
>
> On 6/22/22 11:45, Francisco Iglesias wrote:
> > On [2022 Jun 21] Tue 13:24:27, Iris Chen wrote:
> > > From: Iris Chen
> > >
> > > Signed-off-by: Iris Chen
> >
> > Reviewed-by: Francisco Iglesias
>
> I am planni
On Thu, 19 Sept 2019 at 22:39, wrote:
>
> From: Corey Minyard
>
> Signed-off-by: Corey Minyard
> ---
Very old patch, but Coverity has decided it doesn't like something
in this function that's still basically the same in the current codebase
(CID 1487146):
> +static int ipmi_write_data(SMBusDev
On 28/06/2022 17:12, Alex Bennée wrote:
Frederic Barrat writes:
On 28/06/2022 13:25, Matheus K. Ferst wrote:
On 27/06/2022 15:25, Frederic Barrat wrote:
[ Resending as it was meant for the qemu-ppc list ]
Hello,
I've been looking at why our qemu powernv model is so slow when booting
a
> On Jun 28, 2022, at 8:47 AM, Cédric Le Goater wrote:
>
> Signed-off-by: Cédric Le Goater
Also a nice change.
Reviewed-by: Peter Delevoryas
> ---
> hw/misc/aspeed_scu.c | 2 ++
> hw/misc/trace-events | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/hw/misc/aspeed_scu.c b/hw/misc/
On Tue, Jun 28, 2022 at 09:24:34PM +0530, Ani Sinha wrote:
> On Tue, Jun 28, 2022 at 6:09 PM Thomas Huth wrote:
> >
> > On 28/06/2022 13.14, Michael S. Tsirkin wrote:
> > > On Tue, Jun 28, 2022 at 12:50:06PM +0200, Thomas Huth wrote:
> > [...]
> > >>> Come on, this is just a test. We *really* don'
> On Jun 28, 2022, at 8:47 AM, Cédric Le Goater wrote:
>
> Using a 'stop' string seems more appropriate than 'normal'.
Ha yes! This is an understatement, the change is much appreciated.
I've seen that trace and never realized it was referring to ‘stop’.
Reviewed-by: Peter Delevoryas
>
> S
On Tue, Jun 28, 2022 at 6:09 PM Thomas Huth wrote:
>
> On 28/06/2022 13.14, Michael S. Tsirkin wrote:
> > On Tue, Jun 28, 2022 at 12:50:06PM +0200, Thomas Huth wrote:
> [...]
> >>> Come on, this is just a test. We *really* don't care if an ISO
> >>> we use to test ACPI is using an exploitable vers
On Tue, 28 Jun 2022 at 16:47, Peter Maydell wrote:
>
> In the M-profile Arm ARM, rule R_CVJS defines when an interrupt should
> be set to the Pending state:
> A) when the input line is high and the interrupt is not Active
> B) when the input line transitions from low to high and the interrupt
>
Using a 'stop' string seems more appropriate than 'normal'.
Signed-off-by: Cédric Le Goater
---
hw/i2c/aspeed_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 37ae1f2e04bd..9b41bc38964f 100644
--- a/hw/i2c/aspeed_i2c.c
+++
Alistair, Francisco,
On 6/22/22 11:45, Francisco Iglesias wrote:
On [2022 Jun 21] Tue 13:24:27, Iris Chen wrote:
From: Iris Chen
Signed-off-by: Iris Chen
Reviewed-by: Francisco Iglesias
I am planning to include this patch in the next aspeed PR if that's
OK with you.
Thanks,
C.
---
From: Joel Stanley
In order to correctly report secure boot running firmware the values
of certain registers must be set.
We don't yet have documentation from ASPEED on what they mean. The
meaning is inferred from u-boot's use of them.
Introduce properties so the settings can be configured per-
Signed-off-by: Cédric Le Goater
---
hw/misc/aspeed_scu.c | 2 ++
hw/misc/trace-events | 1 +
2 files changed, 3 insertions(+)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 19b03471fc4e..83353649064a 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -270,6 +270,7 @@
Hello,
I was preparing a PR and I realized that these small patches had never
seen the light. Here they are.
Thanks,
C.
Cédric Le Goater (2):
aspeed/scu: Add trace events for read ops
aspeed/i2c: Change trace event for NORMAL_STOP states
Joel Stanley (1):
aspeed: sbc: Allow per-machine s
In the M-profile Arm ARM, rule R_CVJS defines when an interrupt should
be set to the Pending state:
A) when the input line is high and the interrupt is not Active
B) when the input line transitions from low to high and the interrupt
is Active
(Note that the first of these is an ongoing condit
Hi,
Pretty much as the subject says, see the full listing for details:
https://careers.linaro.org/jobs/1693998-qemu-and-virtualization-developer
[This job ad is in line with qemu-devel policy which allows occasional
brief ads if posted by list regulars]
--
Alex Bennée
On 6/28/22 13:38, Igor Mammedov wrote:
> On Mon, 20 Jun 2022 19:13:46 +0100
> Joao Martins wrote:
>
>> On 6/20/22 17:36, Joao Martins wrote:
>>> On 6/20/22 15:27, Igor Mammedov wrote:
On Fri, 17 Jun 2022 14:33:02 +0100
Joao Martins wrote:
> On 6/17/22 13:32, Igor Mammedov wr
On 6/28/22 18:22, Vladimir Sementsov-Ogievskiy wrote:
On 6/28/22 16:04, Emanuele Giuseppe Esposito wrote:
Ok so far I did the following:
- duplicated each public function as static {function}_locked()
They shouldn't be duplicates: function without _locked suffix should
take the mutex.
By "dup
On 6/28/22 16:04, Emanuele Giuseppe Esposito wrote:
Ok so far I did the following:
- duplicated each public function as static {function}_locked()
They shouldn't be duplicates: function without _locked suffix should
take the mutex.
By "duplicate" I mean same function name, with just _locked su
On 6/28/22 16:08, Emanuele Giuseppe Esposito wrote:
Am 24/06/2022 um 20:22 schrieb Vladimir Sementsov-Ogievskiy:
I've already acked this (honestly, because Stefan do), but still, want
to clarify:
On 6/16/22 16:18, Emanuele Giuseppe Esposito wrote:
job mutex will be used to protect the job st
Frederic Barrat writes:
> On 28/06/2022 13:25, Matheus K. Ferst wrote:
>> On 27/06/2022 15:25, Frederic Barrat wrote:
>>> [ Resending as it was meant for the qemu-ppc list ]
>>>
>>> Hello,
>>>
>>> I've been looking at why our qemu powernv model is so slow when booting
>>> a compressed linux ker
On Tue, Jun 28, 2022 at 5:10 AM Michael S. Tsirkin wrote:
> git submodules are awkward basically because they are an automated wget.
> I don't think an explicit wget is much better ... but
> looks like I'm alone in this. Oh well.
>
submodules are 90% of the hassles I have in upstreaming and upd
On Tue, Jun 28, 2022 at 02:39:31PM +0200, Thomas Huth wrote:
> On 28/06/2022 13.14, Michael S. Tsirkin wrote:
> > On Tue, Jun 28, 2022 at 12:50:06PM +0200, Thomas Huth wrote:
> [...]
> > > > Come on, this is just a test. We *really* don't care if an ISO
> > > > we use to test ACPI is using an explo
On Tue, Jun 28, 2022 at 06:52:55PM +0530, Ani Sinha wrote:
> So why burden everyone by having bios-tables-test when it only affects
> acpi/smbios developers?
No it doesn't. Any change in qemu can break ACPI - it's enough to
register an MR overlapping the ACPI registers. So we have a basic test
ma
On Tue, Jun 28, 2022 at 01:55:48PM +0100, Daniel P. Berrangé wrote:
> On Tue, Jun 28, 2022 at 06:06:19PM +0530, Ani Sinha wrote:
> > On Tue, Jun 28, 2022 at 5:40 PM Peter Maydell
> > wrote:
> > >
> > > On Tue, 28 Jun 2022 at 12:50, Michael S. Tsirkin wrote:
> > > > I think the main difference is
On Thu, 23 Jun 2022 16:59:29 +0200
Brice Goglin wrote:
maybe add a description of what you are testing
something along:
machine with X numa nodes configured like this or that ...
> expected HMAT:
>
> [000h 4]Signature : "HMAT"[Heterogeneous
> Memory Attribu
Le 28/06/2022 à 16:19, Igor Mammedov a écrit :
On Thu, 23 Jun 2022 16:58:28 +0200
Brice Goglin wrote:
The "Memory Proximity Domain Attributes" structure of the ACPI HMAT
has a "Processor Proximity Domain Valid" flag that is currently
always set because Qemu -numa requires an initiator=X value
On Tue, Jun 28, 2022 at 05:49:37PM +0400, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Hi,
>
> As reported earlier by Richard Henderson ("virgl avocado hang" thread),
> avocado
> tests may hang when QEMU exits before the QMP connection is established.
>
> My proposal to fix
On Thu, 23 Jun 2022 16:59:01 +0200
Brice Goglin wrote:
> .. which will be used by follow up hmat-noinitiator test-case.
>
> Signed-off-by: Brice Goglin
Acked-by: Igor Mammedov
> ---
> tests/data/acpi/q35/APIC.acpihmat-noinitiator | 0
> tests/data/acpi/q35/DSDT.acpihmat-noinitiator | 0
>
On Thu, 23 Jun 2022 16:56:58 +0200
Brice Goglin wrote:
here should be a brief introduction to series
[and changelog if it's not the first revision]
> Brice Goglin (4):
>hmat acpi: Don't require initiator value in -numa
>tests: acpi: add and whitelist *.hmat-noinitiator expected blobs
>
On Thu, 23 Jun 2022 16:58:28 +0200
Brice Goglin wrote:
> The "Memory Proximity Domain Attributes" structure of the ACPI HMAT
> has a "Processor Proximity Domain Valid" flag that is currently
> always set because Qemu -numa requires an initiator=X value
> when hmat=on. Unsetting this flag allows t
On Tue, Jun 28, 2022 at 05:49:39PM +0400, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> QMP accept is currently synchronous. If qemu dies before the connection
> is established, it will wait there. Instead turn the code to do
> concurrently accept() and wait(). Returns when the
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> The different migration test cases are using a variety of settings
> to ensure convergance/non-convergance. Introduce two helpers to
> extra the common functionality and ensure consistency.
>
> * Non-convergance: 1ms downtime, 30mbs bandwidth
>
On Tue, Jun 28, 2022 at 03:08:29PM +0100, Dr. David Alan Gilbert wrote:
> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > When moving into the convergance phase, the precopy tests will first
> > look for a STOP event and once found will look for migration completion
> > status. If the test VM
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> When moving into the convergance phase, the precopy tests will first
> look for a STOP event and once found will look for migration completion
> status. If the test VM is not converging, the test suite will be waiting
> for the STOP event forever.
* Peter Xu (pet...@redhat.com) wrote:
> This fixes a bug with the cleanup patch. Should be squashed into the patch
> in subject.
Yep, that one is already in; thanks.
Dave
> Cc: Daniel P. Berrange
> Signed-off-by: Peter Xu
> ---
> migration/qemu-file.c | 2 +-
> 1 file changed, 1 insertion(+)
Check if the number and size of Radix levels are valid on
POWER9/POWER10 CPUs, according to the supported Radix Tree
Configurations described in their User Manuals.
Signed-off-by: Leandro Lupori
---
target/ppc/mmu-radix64.c | 49 +++-
1 file changed, 38 insert
According to PowerISA 3.1B, Book III 6.7.6 programming note, the
page directory base addresses are expected to be aligned to their
size. Real hardware seems to rely on that and will access the
wrong address if they are misaligned. This results in a
translation failure even if the page tables seem t
Check if partition and process tables are properly aligned, in
their size, according to PowerISA 3.1B, Book III 6.7.6 programming
note. Hardware and KVM also raise an exception in these cases.
Signed-off-by: Leandro Lupori
Reviewed-by: Fabiano Rosas
---
hw/ppc/spapr.c | 5 +
hw
Changes from v2:
- Improved comments on patch 2
- Improved commit message on patch 3
- Now emulating CPU behavior on misaligned page table base addresses
Leandro Lupori (3):
ppc: Check partition and process table alignment
target/ppc: Improve Radix xlate level validation
target/ppc: Check pa
On Tue, 28 Jun 2022 at 14:53, Ani Sinha wrote:
>
>
>
> On Tue, Jun 28, 2022 at 19:15 Peter Maydell wrote:
>>
>> On Tue, 28 Jun 2022 at 14:23, Ani Sinha wrote:
>> > On Tue, Jun 28, 2022 at 6:25 PM Daniel P. Berrangé
>> > wrote:
>> > > This proposed biosbits test also involves a considerable dow
On Tue, Jun 28, 2022 at 19:15 Peter Maydell
wrote:
> On Tue, 28 Jun 2022 at 14:23, Ani Sinha wrote:
> > On Tue, Jun 28, 2022 at 6:25 PM Daniel P. Berrangé
> wrote:
> > > This proposed biosbits test also involves a considerable download.
> >
> > I do not think 50 MB is "considerable" . Last time
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Tue, Jun 28, 2022 at 09:32:04AM -0300, Leonardo Bras Soares Passos wrote:
> > On Tue, Jun 28, 2022 at 4:53 AM Daniel P. Berrangé
> > wrote:
> > >
> > > On Mon, Jun 27, 2022 at 10:09:09PM -0300, Leonardo Bras wrote:
> > > > Some errors, like t
From: Marc-André Lureau
QMP accept is currently synchronous. If qemu dies before the connection
is established, it will wait there. Instead turn the code to do
concurrently accept() and wait(). Returns when the first task is
completed to determine whether a connection was established.
Signed-off
From: Marc-André Lureau
Hi,
As reported earlier by Richard Henderson ("virgl avocado hang" thread), avocado
tests may hang when QEMU exits before the QMP connection is established.
My proposal to fix the problem here is to do both accept() and wait()
concurrently by turning some code async. Obv
From: Marc-André Lureau
The following patch is going to wait for both subprocess and accept
tasks concurrently. Switch to using asyncio for subprocess handling.
Signed-off-by: Marc-André Lureau
---
python/qemu/machine/machine.py | 47 ++
1 file changed, 31 inser
On Tue, 28 Jun 2022 at 14:23, Ani Sinha wrote:
> On Tue, Jun 28, 2022 at 6:25 PM Daniel P. Berrangé
> wrote:
> > This proposed biosbits test also involves a considerable download.
>
> I do not think 50 MB is "considerable" . Last time I tried to run
> avocado tests, my laptop ran out of disk spa
On Tue, Jun 28, 2022 at 4:43 AM Richard Henderson
wrote:
>
> Changes for v5:
> * Rebase on master.
>
> r~
>
>
> Richard Henderson (2):
> target/xtensa: Use an exception for semihosting
> target/xtensa: Use semihosting/syscalls.h
>
> target/xtensa/cpu.h | 3 +-
> target/xtensa/help
On Tue, Jun 28, 2022 at 4:43 AM Richard Henderson
wrote:
>
> This separates guest file descriptors from host file descriptors,
> and utilizes shared infrastructure for integration with gdbstub.
> Remove the xtensa custom console handing and rely on the
> generic -semihosting-config handling of cha
On Tue, Jun 28 2022, Thomas Huth wrote:
> It looks nicer if we separate the run_ccw() from the IPL_assert()
> statement, and the error message should talk about "virtio device"
> instead of "block device", since this code is nowadays used for
> non-block (i.e. network) devices, too.
>
> Signed-of
1 - 100 of 321 matches
Mail list logo
