[PATCH v2] ui/cocoa: Create menus in iothread

Commit 0439c5a4623d674efa0c72abd62ca6e98bb7cf87 introduced an assertion that blk_all_next is called in the main thread. The function is called in the following chain: - blk_all_next - qmp_query_block - addRemovableDevicesMenuItems - main This change moves the menu creation to the iothread. This al

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

Typo in patch title: s/extenstion/extension/g Regards, Frank Chang On Sat, Feb 26, 2022 at 3:45 PM Frank Chang wrote: > > > Atish Patra 於 2022年2月23日 週三 上午6:39寫道： > >> The Linux kernel parses the ISA extensions from "riscv,isa" DT >> property. It used to parse only the single letter base extens

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

On Sun, Mar 6, 2022 at 2:12 PM Atish Kumar Patra wrote: > > > On Sat, Mar 5, 2022 at 9:36 PM Frank Chang wrote: > >> On Sun, Mar 6, 2022 at 7:42 AM Atish Kumar Patra >> wrote: >> >>> >>> >>> On Sat, Mar 5, 2022 at 10:05 AM Heiko Stuebner wrote: >>> Hi, Am Donnerstag, 3. März 202

[PATCH] coreaudio: Always return 0 in handle_voice_change

MacOSX.sdk/System/Library/Frameworks/CoreAudio.framework/Headers/AudioHardware.h says: > The return value is currently unused and should always be 0. Signed-off-by: Akihiko Odaki --- audio/coreaudio.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/audio/coreaudio.c b/a

[PATCH] ui/cocoa: Create menus in iothread

Commit 0439c5a4623d674efa0c72abd62ca6e98bb7cf87 introduced an assertion that blk_all_next is called in the main thread. The function is called in the following chain: - blk_all_next - qmp_query_block - addRemovableDevicesMenuItems - main This change moves the menu creation to the iothread. This al

[PATCH] audio: Log context for audio bug

Without this change audio_bug aborts when the bug condition is met, which discards following useful logs. Call abort after such logs. Signed-off-by: Akihiko Odaki --- audio/audio.c | 25 - audio/audio_template.h | 27 --- 2 files changed,

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

On Sat, Mar 5, 2022 at 9:36 PM Frank Chang wrote: > On Sun, Mar 6, 2022 at 7:42 AM Atish Kumar Patra > wrote: > >> >> >> On Sat, Mar 5, 2022 at 10:05 AM Heiko Stuebner wrote: >> >>> Hi, >>> >>> Am Donnerstag, 3. März 2022, 19:58:38 CET schrieb Atish Patra: >>> > On Fri, Feb 25, 2022 at 11:46 PM

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

On Sun, Mar 6, 2022 at 11:06 AM Frank Chang wrote: > > On Sun, Mar 6, 2022 at 7:42 AM Atish Kumar Patra wrote: >> >> >> >> On Sat, Mar 5, 2022 at 10:05 AM Heiko Stuebner wrote: >>> >>> Hi, >>> >>> Am Donnerstag, 3. März 2022, 19:58:38 CET schrieb Atish Patra: >>> > On Fri, Feb 25, 2022 at 11:46

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

On Sun, Mar 6, 2022 at 7:42 AM Atish Kumar Patra wrote: > > > On Sat, Mar 5, 2022 at 10:05 AM Heiko Stuebner wrote: > >> Hi, >> >> Am Donnerstag, 3. März 2022, 19:58:38 CET schrieb Atish Patra: >> > On Fri, Feb 25, 2022 at 11:46 PM Frank Chang >> wrote: >> > > Atish Patra 於 2022年2月23日 週三 上午6:3

Re: [PATCH 0/2] accel|target: Remove pointless CPUArchState casts

On 3/5/22 13:34, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Now than we can use the abstract CPUArchState, let's clean up. Based-on:<20220214183144.27402-1-f4...@amsat.org> target: Use ArchCPU & CPUArchState as abstract interface to target CPU Philippe Mathieu-Daudé (2): acc

Re: [PATCH v2 00/12] GL & D-Bus display related fixes

On 2022/02/18 1:11, Akihiko Odaki wrote: You missed only one thing: - that console_select and register_displaychangelistener may not call dpy_gfx_switch and call dpy_gl_scanout_texture instead. It is incompatible with non-OpenGL displays displaychangelistener_display_console always has to call

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

On Sat, Mar 5, 2022 at 10:05 AM Heiko Stuebner wrote: > Hi, > > Am Donnerstag, 3. März 2022, 19:58:38 CET schrieb Atish Patra: > > On Fri, Feb 25, 2022 at 11:46 PM Frank Chang > wrote: > > > Atish Patra 於 2022年2月23日 週三 上午6:39寫道： > > >> > > >> The Linux kernel parses the ISA extensions from "ris

[PATCH 2/2] target/i386: Remove pointless CPUArchState casts

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hax/hax-all.c | 4 ++-- target/i386/nvmm/nvmm-all.c | 14 +++--- target/i386/whpx/whpx-all.c | 18 +- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/target/i386/hax/ha

[PATCH 1/2] accel/tcg: Remove pointless CPUArchState casts

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cpu-exec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index c68270f794..c997c2e8e0 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec

[PATCH 0/2] accel|target: Remove pointless CPUArchState casts

From: Philippe Mathieu-Daudé Now than we can use the abstract CPUArchState, let's clean up. Based-on: <20220214183144.27402-1-f4...@amsat.org> target: Use ArchCPU & CPUArchState as abstract interface to target CPU Philippe Mathieu-Daudé (2): accel/tcg: Remove pointless CPUArchState casts ta

Re: [PATCH v2 4/5] Replace qemu_gettimeofday() with g_get_real_time()

On Sat, Mar 5, 2022 at 1:18 AM wrote: > > From: Marc-André Lureau > > GLib g_get_real_time() is an alternative to gettimeofday() which allows > to simplify our code. > > For semihosting, a few bits are lost on POSIX host, but this shouldn't > be a big concern. > > Signed-off-by: Marc-André Lureau

Re: [PULL v2 00/21] tcg patch queue

On Fri, 4 Mar 2022 at 19:09, Richard Henderson wrote: > > Version 2: Drop signed 32-bit guest patches while CI failure examined. > > > > The following changes since commit 3d1fbc59665ff8a5d74b0fd30583044fe99e1117: > > Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' > int

Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree

Hi, Am Donnerstag, 3. März 2022, 19:58:38 CET schrieb Atish Patra: > On Fri, Feb 25, 2022 at 11:46 PM Frank Chang wrote: > > Atish Patra 於 2022年2月23日 週三 上午6:39寫道： > >> > >> The Linux kernel parses the ISA extensions from "riscv,isa" DT > >> property. It used to parse only the single letter base

[PATCH v3 10/10] esp: recreate ESPState current_req after migration

Since PDMA reads/writes are driven by the guest, it is possible that migration can occur whilst a SCSIRequest is still active. Fortunately active SCSIRequests are already included in the migration stream and restarted post migration but this still leaves the reference in ESPState uninitialised. Im

[PATCH v3 09/10] esp: include the current PDMA callback in the migration stream

This involves (re)adding a PDMA-specific subsection to hold the reference to the current PDMA callback. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier --- hw/scsi/esp.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/

[PATCH v3 08/10] esp: convert ESPState pdma_cb from a function pointer to an integer

This prepares for the inclusion of the current PDMA callback in the migration stream since the callback is referenced by an integer instead of a function pointer. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/scsi/esp.c | 44

[PATCH v3 07/10] esp: introduce esp_pdma_cb() function

This function is to be used to execute the current PDMA callback rather than dereferencing the ESPState pdma_cb function pointer directly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/scsi/esp.c | 9 +++-- 1 file changed, 7 insertio

[PATCH v3 06/10] esp: introduce esp_set_pdma_cb() function

This function is to be used to set the current PDMA callback rather than accessing the ESPState pdma_cb function pointer directly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/scsi/esp.c | 19 --- 1 file changed, 12 inse

[PATCH v3 02/10] macfb: don't use special irq_state and irq_mask variables in MacfbState

The current IRQ state and IRQ mask are handled exactly the same as standard register accesses, so store these values directly in the regs array rather than having separate variables for them. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw

[PATCH v3 04/10] macfb: add VMStateDescription fields for display type and VBL timer

These fields are required in the migration stream to restore macfb state correctly. Note this is a migration break, but since there are upcoming incompatible changes for the q800 machine (and migration does not even succeed without these patches) then this is not an issue. Signed-off-by: Mark Ca

[PATCH v3 05/10] macfb: set initial value of mode control registers in macfb_common_realize()

If booting Linux directly in the q800 machine using -kernel rather than using a MacOS toolbox ROM, the mode control registers are never initialised, causing macfb_mode_write() to fail to determine the current resolution after migration. Resolve this by always setting the initial values of the mode

[PATCH v3 03/10] macfb: increase number of registers saved in MacfbState

The MacOS toolbox ROM accesses a number of addresses between 0x0 and 0x200 during initialisation and resolution changes. Whilst the function of many of these registers is unknown, it is worth the minimal cost of saving these extra values as part of migration to help future-proof the migration str

[PATCH v3 01/10] macfb: add VMStateDescription for MacfbNubusState and MacfbSysBusState

Currently when QEMU tries to migrate the macfb framebuffer it crashes randomly because the opaque provided by the DeviceClass vmsd property for both devices is set to MacfbState rather than MacfbNubusState or MacfbSysBusState as appropriate. Resolve the issue by adding new VMStateDescriptions for

[PATCH v3 00/10] q800: migration fixes

This patchset contains fixes for the macfb and esp devices which enable migration of the q800 machine to succeed here in local testing. Patches 1-5 contain fixes and improvements for migrating the macfb device whilst patches 6-9 change the ESPState pdma_cb field from being a function pointer to an

[PATCH v4 10/12] mac_via: make SCSI_DATA (DRQ) bit live rather than latched

The VIA2 on the Q800 machine is not a separate chip as in older Macs but instead is integrated into the on-board logic. From analysing the SCSI routines in the MacOS toolbox ROM (and to a lesser extent NetBSD and Linux) the expectation seems to be that the SCSI_DATA (DRQ) bit is live on the Q800 a

[PATCH v4 08/12] mos6522: add "info via" HMP command for debugging

This displays detailed information about the device registers and timers to aid debugging problems with timers and interrupts. Currently the QAPI generators for HumanReadableText don't work correctly if used in qapi/target-misc.json when a non-specified target is built, so for now manually add a h

[PATCH v4 11/12] mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQs

The mos6522 datasheet describes how the control lines IRQs are edge-triggered according to the configuration in the PCR register. Implement the logic according to the datasheet so that the interrupt bits in IFR are latched when the edge is detected, and cleared when reading portA/portB or writing

[PATCH v4 12/12] macio/pmu.c: remove redundant code

Now that the logic related to edge-triggered interrupts is all contained within the mos6522 device the redundant implementation for the mac99 PMU device can be removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/misc/macio/pmu.c | 33 -

[PATCH v4 04/12] mos6522: switch over to use qdev gpios for IRQs

For historical reasons each mos6522 instance implements its own setting and update of the IFR flag bits using methods exposed by MOS6522DeviceClass. As of today this is no longer required, and it is now possible to implement the mos6522 IRQs as standard qdev gpios. Switch over to use qdev gpios fo

[PATCH v4 03/12] mac_via: use IFR bit flag constants for VIA2 IRQs

This allows us to easily see how the physical control lines are mapped to the IFR bit flags. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé --- include/hw/misc/mac_via.h | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-)

[PATCH v4 02/12] mac_via: use IFR bit flag constants for VIA1 IRQs

This allows us to easily see how the physical control lines are mapped to the IFR bit flags. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- include/hw/misc/mac_via.h | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/include/hw/misc/mac_v

[PATCH v4 07/12] mos6522: add register names to register read/write trace events

This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/mos6522.c | 13 ++--- hw/misc/trace-events | 4 ++-- inclu

[PATCH v4 09/12] mos6522: record last_irq_levels in mos6522_set_irq()

To detect edge-triggered IRQs it is necessary to store the last state of each IRQ in a last_irq_levels bitmap. Note: this is a migration break for machines which use mos6522 instances which are g3beige/mac99 (PPC) and q800 (m68k). Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier ---

[PATCH v4 00/12] mos6522: switch to gpios, add control line edge-triggering and extra debugging

Here is another patchset taken from my series to enable MacOS to boot on the q800 machine. Patches 1-3 define the IFR bit flags in terms of the physical control lines and update mac_via to use them. Patch 4 does the main switch from custom methods in MOS6522DeviceClass to using standard gpios wh

[PATCH v4 06/12] mos6522: use device_class_set_parent_reset() to propagate reset to parent

Switch from using a legacy approach to the more formal approach for propagating device reset to the parent. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier --- hw/misc/mac_via.c| 7 +-- hw/misc/macio/cuda.c | 3 ++- hw/misc/macio/pmu.c | 3 ++- h

[PATCH v4 05/12] mos6522: remove update_irq() and set_sr_int() methods from MOS6522DeviceClass

Now that the mos6522 IRQs are managed using standard qdev gpios these methods are no longer required. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier --- hw/misc/mos6522.c | 9 - include/hw/misc/mos6522.h | 2 -- 2 files changed, 11 deleti

[PATCH v4 01/12] mos6522: add defines for IFR bit flags

These are intended to make it easier to see how the physical control lines are wired for each instance. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé --- include/hw/misc/mos6522.h | 22 +++--- 1 file changed, 15 insertions(+), 7

Re: [PATCH v3 00/12] mos6522: switch to gpios, add control line edge-triggering and extra debugging

On 05/03/2022 14:51, Mark Cave-Ayland wrote: On 05/03/2022 14:34, Philippe Mathieu-Daudé wrote: On 5/3/22 15:10, Mark Cave-Ayland wrote: Here is another patchset taken from my series to enable MacOS to boot on the q800 machine. v3: - Rebase onto master - Add R-B tags from Laurent It see

Re: [PATCH v3 00/12] mos6522: switch to gpios, add control line edge-triggering and extra debugging

On 05/03/2022 14:34, Philippe Mathieu-Daudé wrote: On 5/3/22 15:10, Mark Cave-Ayland wrote: Here is another patchset taken from my series to enable MacOS to boot on the q800 machine. v3: - Rebase onto master - Add R-B tags from Laurent It seems you missed all my R-b... Apologies Phil, l

Re: [PULL 00/50] Block layer patches

On Fri, 4 Mar 2022 at 16:47, Kevin Wolf wrote: > > The following changes since commit 6629bf78aac7e53f83fd0bcbdbe322e2302dfd1f: > > Merge remote-tracking branch > 'remotes/pmaydell/tags/pull-target-arm-20220302' into staging (2022-03-03 > 14:46:48 +) > > are available in the Git repository

Re: [PATCH v3 00/12] mos6522: switch to gpios, add control line edge-triggering and extra debugging

On 5/3/22 15:10, Mark Cave-Ayland wrote: Here is another patchset taken from my series to enable MacOS to boot on the q800 machine. v3: - Rebase onto master - Add R-B tags from Laurent It seems you missed all my R-b... - Introduce MOS6522_NUM_REGS in patch 7 as suggested by Phil v2: - Up

Re: [PATCH v2 07/12] mos6522: add register names to register read/write trace events

On 5/3/22 15:17, Mark Cave-Ayland wrote: On 24/02/2022 14:04, Philippe Mathieu-Daudé wrote: On 24/2/22 12:59, Mark Cave-Ayland wrote: This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell ---   hw/misc/mos65

Re: [PATCH 2/3] nsis installer: Suppress "ANSI targets are deprecated" warning

Am 05.03.22 um 11:57 schrieb Peter Maydell: When we build our Windows installer, it emits the warning: warning 7998: ANSI targets are deprecated Fix this by making our installer a Unicode installer instead. These won't work on Win95/98/ME, but we already do not support those. See https:/

Re: [PATCH v2 07/12] mos6522: add register names to register read/write trace events

On 24/02/2022 14:04, Philippe Mathieu-Daudé wrote: On 24/2/22 12:59, Mark Cave-Ayland wrote: This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell ---   hw/misc/mos6522.c    | 10 --   hw/misc/trace-eve

[PATCH v3 11/12] mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQs

The mos6522 datasheet describes how the control lines IRQs are edge-triggered according to the configuration in the PCR register. Implement the logic according to the datasheet so that the interrupt bits in IFR are latched when the edge is detected, and cleared when reading portA/portB or writing

[PATCH v3 10/12] mac_via: make SCSI_DATA (DRQ) bit live rather than latched

The VIA2 on the Q800 machine is not a separate chip as in older Macs but instead is integrated into the on-board logic. From analysing the SCSI routines in the MacOS toolbox ROM (and to a lesser extent NetBSD and Linux) the expectation seems to be that the SCSI_DATA (DRQ) bit is live on the Q800 a

[PATCH v3 12/12] macio/pmu.c: remove redundant code

Now that the logic related to edge-triggered interrupts is all contained within the mos6522 device the redundant implementation for the mac99 PMU device can be removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/misc/macio/pmu.c | 33 -

Re: starting to look at qemu savevm performance, a first regression detected

On 3/5/22 2:20 PM, Claudio Fontana wrote: > > Hello all, > > I have been looking at some reports of bad qemu savevm performance in large > VMs (around 20+ Gb), > when used in libvirt commands like: > > > virsh save domain /dev/null > > > > I have written a simple test to run in a Linux cent

[PATCH v3 08/12] mos6522: add "info via" HMP command for debugging

This displays detailed information about the device registers and timers to aid debugging problems with timers and interrupts. Currently the QAPI generators for HumanReadableText don't work correctly if used in qapi/target-misc.json when a non-specified target is built, so for now manually add a h

[PATCH v3 06/12] mos6522: use device_class_set_parent_reset() to propagate reset to parent

Switch from using a legacy approach to the more formal approach for propagating device reset to the parent. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier --- hw/misc/mac_via.c| 7 +-- hw/misc/macio/cuda.c | 3 ++- hw/misc/macio/pmu.c | 3 ++- h

[PATCH v3 05/12] mos6522: remove update_irq() and set_sr_int() methods from MOS6522DeviceClass

Now that the mos6522 IRQs are managed using standard qdev gpios these methods are no longer required. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier --- hw/misc/mos6522.c | 9 - include/hw/misc/mos6522.h | 2 -- 2 files changed, 11 deleti

[PATCH v3 07/12] mos6522: add register names to register read/write trace events

This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/mos6522.c | 13 ++--- hw/misc/trace-events | 4 ++-- inclu

[PATCH v3 09/12] mos6522: record last_irq_levels in mos6522_set_irq()

To detect edge-triggered IRQs it is necessary to store the last state of each IRQ in a last_irq_levels bitmap. Note: this is a migration break for machines which use mos6522 instances which are g3beige/mac99 (PPC) and q800 (m68k). Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier ---

[PATCH v3 03/12] mac_via: use IFR bit flag constants for VIA2 IRQs

This allows us to easily see how the physical control lines are mapped to the IFR bit flags. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- include/hw/misc/mac_via.h | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/include/hw/misc/mac_via

[PATCH v3 00/12] mos6522: switch to gpios, add control line edge-triggering and extra debugging

Here is another patchset taken from my series to enable MacOS to boot on the q800 machine. Patches 1-3 define the IFR bit flags in terms of the physical control lines and update mac_via to use them. Patch 4 does the main switch from custom methods in MOS6522DeviceClass to using standard gpios wh

[PATCH v3 02/12] mac_via: use IFR bit flag constants for VIA1 IRQs

This allows us to easily see how the physical control lines are mapped to the IFR bit flags. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- include/hw/misc/mac_via.h | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/include/hw/misc/mac_v

[PATCH v3 04/12] mos6522: switch over to use qdev gpios for IRQs

For historical reasons each mos6522 instance implements its own setting and update of the IFR flag bits using methods exposed by MOS6522DeviceClass. As of today this is no longer required, and it is now possible to implement the mos6522 IRQs as standard qdev gpios. Switch over to use qdev gpios fo

[PATCH v3 01/12] mos6522: add defines for IFR bit flags

These are intended to make it easier to see how the physical control lines are wired for each instance. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- include/hw/misc/mos6522.h | 22 +++--- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/include/h

Re: [PATCH 1/3] nsis installer: List emulators in alphabetical order

Am 05.03.22 um 11:57 schrieb Peter Maydell: We currently list the emulators in the Windows installer's dialog in an essentially random order (it's whatever glob.glob() returns them to, which is filesystem-implementation-dependent). Add a call to sorted() so they appear in alphabetical order. Si

[PATCH] ui/gtk: Ignore 2- and 3-button press events

GTK already produces corresponding GDK_BUTTON_PRESS events alongside 2BUTTON and 3BUTTON_PRESS events. The 2BUTTON and 3BUTTON_PRESS events were incorrectly being interpreted and passed to guests as button release events. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/558 Signed-off-by: K

starting to look at qemu savevm performance, a first regression detected

Hello all, I have been looking at some reports of bad qemu savevm performance in large VMs (around 20+ Gb), when used in libvirt commands like: virsh save domain /dev/null I have written a simple test to run in a Linux centos7-minimal-2009 guest, which allocates and touches 20G mem. With

Re: [PATCH v3] i386/sev: Ensure attestation report length is valid before retrieving

On 4/3/22 21:11, Tyler Fanelli wrote: The length of the attestation report buffer is never checked to be valid before allocation is made. If the length of the report is returned to be 0, the buffer to retrieve the attestation buffer is allocated with length 0 and passed to the kernel to fill with

Re: [PATCH 3/3] nsis installer: Fix mouse-over descriptions for emulators

On 5/3/22 11:57, Peter Maydell wrote: We use the nsis.py script to write out an installer script Section for each emulator executable, so the exact set of Sections depends on which executables were built. However the part of qemu.nsi which specifies mouse-over descriptions for each Section still

Re: [PATCH 1/3] nsis installer: List emulators in alphabetical order

On 5/3/22 11:57, Peter Maydell wrote: We currently list the emulators in the Windows installer's dialog in an essentially random order (it's whatever glob.glob() returns them to, which is filesystem-implementation-dependent). Add a call to sorted() so they appear in alphabetical order. Signed-of

Re: [PATCH 2/3] nsis installer: Suppress "ANSI targets are deprecated" warning

On 5/3/22 11:57, Peter Maydell wrote: When we build our Windows installer, it emits the warning: warning 7998: ANSI targets are deprecated Fix this by making our installer a Unicode installer instead. These won't work on Win95/98/ME, but we already do not support those. See https://nsis.s

[PULL 04/13] tests/tcg/ppc64le: drop __int128 usage in bcdsub

From: Matheus Ferst Using __int128 with inline asm constraints like "v" generates incorrect code when compiling with LLVM/Clang (e.g., only one doubleword of the VSR is loaded). Instead, use a GPR pair to pass the 128-bits value and load the VSR with mtvsrd/xxmrghd. Reviewed-by: Richard Henderso

[PULL 03/13] target/ppc: change xs[n]madd[am]sp to use float64r32_muladd

From: Matheus Ferst Change VSX Scalar Multiply-Add/Subtract Type-A/M Single Precision helpers to use float64r32_muladd. This method should correctly handle all rounding modes, so the workaround for float_round_nearest_even can be dropped. Reviewed-by: Richard Henderson Signed-off-by: Matheus Fe

[PULL 13/13] target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16

From: Víctor Colombo Fixes: 3909ff1fac ("target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions") Signed-off-by: Víctor Colombo Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson Message-Id: <20220304175156.2012315-8-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goat

[PULL 12/13] target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINC

From: Víctor Colombo Fixes: da499405aa ("target/ppc: Refactor VSX_MAX_MINC helper") Signed-off-by: Víctor Colombo Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson Message-Id: <20220304175156.2012315-7-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goater --- target/ppc/fp

[PULL 08/13] target/ppc: use ext32u and deposit in do_vx_vmulhw_i64

From: Matheus Ferst Fixes: 29e9dfcf755e ("target/ppc: vmulh* instructions without helpers") Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson Message-Id: <20220304175156.2012315-3-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goater --- target/ppc/translate/vmx-impl.c.inc

[PULL 02/13] tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsf

From: Matheus Ferst LLVM/Clang does not support __builtin_mtfsf. Acked-by: Alex Bennée Reviewed-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20220304165417.1981159-2-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goater --- tests/tcg/ppc64le/mtfsf.c | 19

[PULL 06/13] tests/tcg/ppc64le: Use Altivec register names in clobber list

From: Matheus Ferst LLVM/Clang doesn't know the VSX registers when compiling with -mabi=elfv1. Use only registers >= 32 and list them with their Altivec name. Reviewed-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20220304165417.1981159-6-matheus.fe...@eldorado.org.br> Signed

[PULL 07/13] target/ppc: Fix vmul[eo]* instructions marked 2.07

From: "Lucas Mateus Castro (alqotel)" Some ISA v2.03 Vector Multiply instructions marked to be ISA v2.07 only. This patch fixes it. Fixes: 80eca687c851 ("target/ppc: moved vector even and odd multiplication to decodetree") Reported-by: Howard Spoelstra Suggested-by: Fabiano Rosas Signed-off-b

[PULL 10/13] target/ppc: use andc in vrlqmi

From: Matheus Ferst Fixes: 7e5947df6e94 ("target/ppc: implement vrlqmi") Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson Message-Id: <20220304175156.2012315-5-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goater --- target/ppc/translate/vmx-impl.c.inc | 6 ++ 1 file

[PULL 09/13] target/ppc: use extract/extract2 to create vrlqnm mask

From: Matheus Ferst Fixes: 4e272668406b ("target/ppc: implement vrlqnm") Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson Message-Id: <20220304175156.2012315-4-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goater --- target/ppc/translate/vmx-impl.c.inc | 10 +++--- 1

[PULL 01/13] Use long endian options for ppc64

From: Miroslav Rezanina GCC options pairs -mlittle/-mlittle-endian and -mbig/-mbig-endian are equivalent on ppc64 architecture. However, Clang supports only long version of the options. Use longer form in configure to properly support both GCC and Clang compiler. In addition, fix this issue in t

[PULL 05/13] tests/tcg/ppc64le: emit bcdsub with .long when needed

From: Matheus Ferst Based on GCC docs[1], we use the '-mpower8-vector' flag at config-time to detect the toolchain support to the bcdsub instruction. LLVM/Clang supports this flag since version 3.6[2], but the instruction and related builtins were only added in LLVM 14[3]. In the absence of other

[PULL 11/13] target/ppc: split XXGENPCV macros for readability

From: Matheus Ferst Fixes: b090f4f1e3c9 ("target/ppc: Implement xxgenpcv[bhwd]m instruction") Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson Message-Id: <20220304175156.2012315-6-matheus.fe...@eldorado.org.br> Signed-off-by: Cédric Le Goater --- target/ppc/int_helper.c

[PULL 00/13] ppc queue

The following changes since commit 3d1fbc59665ff8a5d74b0fd30583044fe99e1117: Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging (2022-03-04 15:31:23 +) are available in the Git repository at: https://github.com/legoater/qemu/ tags/pull-pp

[PATCH 3/3] nsis installer: Fix mouse-over descriptions for emulators

We use the nsis.py script to write out an installer script Section for each emulator executable, so the exact set of Sections depends on which executables were built. However the part of qemu.nsi which specifies mouse-over descriptions for each Section still has a hard-coded and very outdated list

[PATCH 2/3] nsis installer: Suppress "ANSI targets are deprecated" warning

When we build our Windows installer, it emits the warning: warning 7998: ANSI targets are deprecated Fix this by making our installer a Unicode installer instead. These won't work on Win95/98/ME, but we already do not support those. See https://nsis.sourceforge.io/Docs/Chapter4.html#aunicode

[PATCH 0/3] windows installer: Fix warnings, mouse-over descriptions, item order

When we build our Windows installer, there are some warnings generated: warning 7998: ANSI targets are deprecated warning 6000: unknown variable/constant "{Section_i386}" detected, ignoring (macro:_==:1) warning 6000: unknown variable/constant "{Section_i386w}" detected, ignoring (macro:_==:1

[PATCH 1/3] nsis installer: List emulators in alphabetical order

We currently list the emulators in the Windows installer's dialog in an essentially random order (it's whatever glob.glob() returns them to, which is filesystem-implementation-dependent). Add a call to sorted() so they appear in alphabetical order. Signed-off-by: Peter Maydell --- scripts/nsis.p

Re: [PULL 00/35] Kraxel 20220304 patches

On Fri, 4 Mar 2022 at 14:21, Gerd Hoffmann wrote: > > The following changes since commit 6629bf78aac7e53f83fd0bcbdbe322e2302dfd1f: > > Merge remote-tracking branch > 'remotes/pmaydell/tags/pull-target-arm-20220302' into staging (2022-03-03 > 14:46:48 +) > > are available in the Git reposit

Re: [PATCH v2] hw/arm/virt: Fix gic-version=max when CONFIG_ARM_GIC_TCG is unset

On 3/4/22 7:36 PM, Peter Maydell wrote: > On Fri, 4 Mar 2022 at 17:46, Eric Auger wrote: >> In TCG mode, if gic-version=max we always select GICv3 even if >> CONFIG_ARM_GIC_TCG is unset. We shall rather select GICv2. >> This also brings the benefit of fixing qos tests errors for tests >> using

Re: [PATCH v3 0/5] tests/tcg/ppc64le: fix the build of TCG tests with Clang

On 3/4/22 17:54, matheus.fe...@eldorado.org.br wrote: From: Matheus Ferst As the configuration scripts used -mbig and -mlittle, building PPC tests with Clang was silently skipped. With the patch to fix these options[1], "make check-tcg" fails because of build and runtime errors. This patch seri

Re: [PATCH 0/7] target/ppc: Vector/VSX instruction batch fixes

On 3/4/22 18:51, matheus.fe...@eldorado.org.br wrote: From: Matheus Ferst Some fixes to the insns of our last patch series. Lucas Mateus Castro (alqotel) (1): target/ppc: Fix vmul[eo]* instructions marked 2.07 Matheus Ferst (4): target/ppc: use ext32u and deposit in do_vx_vmulhw_i64

Re: [PATCH] hw/block: m25p80: Add support for w25q01jvq

On 3/4/22 20:47, Michael Walle wrote: Am 2022-03-04 20:30, schrieb Philippe Mathieu-Daudé: On 4/3/22 19:09, Patrick Williams wrote: The w25q01jvq is a 128MB part.  Support is being added to the kernel[1] and the two have been tested together. 1. https://lore.kernel.org/lkml/2022022209.2310