在 2022/1/1 上午4:07, Richard Henderson 写道:
On 12/30/21 7:23 PM, Weiwei Li wrote:
+ if (reg_num != 0) {
+ switch (get_ol(ctx)) {
get_xl, not get_ol, two instances.
+#ifdef TARGET_RISCV32
+ {
+ TCGv_i64 t = ftemp_new(ctx);
+ tcg_gen_concat_i32_i64(t, cpu_gpr[reg_num
在 2022/1/1 上午4:06, Richard Henderson 写道:
On 12/30/21 7:23 PM, Weiwei Li wrote:
+ if (reg_num != 0) {
+ switch (get_ol(ctx)) {
Oh, you should be using get_xl here and elsewhere in this patch, not
get_ol.
Sorry. I don't know the difference between get_xl and get_ol. From gpr
regis
Thanks for your comments.
在 2022/1/1 上午3:56, Richard Henderson 写道:
On 12/30/21 7:23 PM, Weiwei Li wrote:
@@ -363,6 +363,10 @@ static void riscv_cpu_reset(DeviceState *dev)
env->misa_mxl = env->misa_mxl_max;
env->priv = PRV_M;
env->mstatus &= ~(MSTATUS_MIE | MSTATUS_MPRV);
+
On 12/31/21 20:06, Richard Henderson wrote:
> On 12/31/21 4:47 AM, Philippe Mathieu-Daudé wrote:
>> The following changes since commit
>> 69f153667fce723ee546d2f047d66d0cfa67c3cc:
>>
>> Machine core patches
>>
>> - Clarify qdev_conne
On 12/30/21 7:23 PM, Weiwei Li wrote:
+if (reg_num != 0) {
+switch (get_ol(ctx)) {
get_xl, not get_ol, two instances.
+#ifdef TARGET_RISCV32
+{
+TCGv_i64 t = ftemp_new(ctx);
+tcg_gen_concat_i32_i64(t, cpu_gpr[reg_num], cpu_gpr[reg_num + 1]);
+return t;
On 12/30/21 7:23 PM, Weiwei Li wrote:
From: liweiwei
- update extension check REQUIRE_ZHINX_OR_ZFH and
REQUIRE_ZFH_OR_ZFHMIN_OR_ZHINX_OR_ZHINXMIN
- update half float point register read/write
- disable nanbox_h check
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/r
On 12/30/21 7:23 PM, Weiwei Li wrote:
+if (reg_num != 0) {
+switch (get_ol(ctx)) {
Oh, you should be using get_xl here and elsewhere in this patch, not get_ol.
r~
On 12/30/21 7:23 PM, Weiwei Li wrote:
From: liweiwei
- update extension check REQUIRE_ZFINX_OR_F
- update single float point register read/write
- disable nanbox_s check
Co-authored-by: ardxwe
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/fpu_helper.c
On 12/30/21 7:23 PM, Weiwei Li wrote:
@@ -363,6 +363,10 @@ static void riscv_cpu_reset(DeviceState *dev)
env->misa_mxl = env->misa_mxl_max;
env->priv = PRV_M;
env->mstatus &= ~(MSTATUS_MIE | MSTATUS_MPRV);
+/* hardwire mstatus.FS to zero when enable zfinx */
+if (RISCV_C
Fixes the build on a mips64 host. Prior to the break, we identified
the arch via the __mips__ define; afterward we use meson's
host_machine.cpu_family(). Restore the previous combination.
Fixes: 823eb013452e ("configure, meson: move ARCH to meson.build")
Reported-by: Philippe Mathieu-Daudé
Sign
On 12/31/21 4:47 AM, Philippe Mathieu-Daudé wrote:
The following changes since commit 69f153667fce723ee546d2f047d66d0cfa67c3cc:
Merge tag 'memory-api-20211231' of https://github.com/philmd/qemu into
staging (2021-12-30 17:02:42 -0800)
are available in the Git repository at:
> On 31 Dec 2021, at 17:56, Alexander Orzechowski
> wrote:
>
>
> On 12/31/21 12:42, Carwyn Ellis wrote:
>> When switching between guest and host on a Mac using command-tab the
>> command key is sent to the guest which can trigger functionality in the
>> guest OS. Specifying left-command-key=
On 12/31/21 12:42, Carwyn Ellis wrote:
When switching between guest and host on a Mac using command-tab the
command key is sent to the guest which can trigger functionality in the
guest OS. Specifying left-command-key=off disables forwarding this key
to the guest. Defaults to enabled.
When swi
Ok cool, I’ll separate this out into 2 patches for the fullscreen and
left-command changes respectively.
Will aim to get this out at some point tomorrow.
Cheers
Carwyn
> On 31 Dec 2021, at 17:49, Alexander Orzechowski
> wrote:
>
>
> On 12/31/21 12:42, Carwyn Ellis wrote:
>> When switching
On 12/31/21 12:42, Carwyn Ellis wrote:
When switching between guest and host on a Mac using command-tab the
command key is sent to the guest which can trigger functionality in the
guest OS. Specifying left-command-key=off disables forwarding this key
to the guest. Defaults to enabled.
When swi
When switching between guest and host on a Mac using command-tab the
command key is sent to the guest which can trigger functionality in the
guest OS. Specifying left-command-key=off disables forwarding this key
to the guest. Defaults to enabled.
When switching between guest and host on a Mac with
Apologies for all the spam on what should be a simple change. Still
getting the hang of all of this. :/
Please disregard my earlier submissions. After further testing I
realised that the calls to cursor hide/unhide weren't balanced which
broke the hide/unhide behaviour. I've added an additional st
On 12/31/21 18:07, Richard Henderson wrote:
> On 12/31/21 4:47 AM, Philippe Mathieu-Daudé wrote:
>> The following changes since commit
>> 69f153667fce723ee546d2f047d66d0cfa67c3cc:
>>
>> Merge tag 'memory-api-20211231' ofhttps://github.com/philmd/qemu
>&
On 12/31/21 4:47 AM, Philippe Mathieu-Daudé wrote:
The following changes since commit 69f153667fce723ee546d2f047d66d0cfa67c3cc:
Merge tag 'memory-api-20211231' ofhttps://github.com/philmd/qemu into
staging (2021-12-30 17:02:42 -0800)
are available in the Git repository at:
Some of the instructions added by the FEAT_TLBIOS extension were forgotten
when the extension was originally added to QEMU.
Fixes: 7113d618505b ("target/arm: Add support for FEAT_TLBIOS")
Signed-off-by: Idan Horowitz
---
target/arm/helper.c | 32
1 file changed,
Having made the switch to an M1 Mac I needed to switch from VMware back
to QEMU in order to run some intel guests.
This patch addresses a couple of niggles with the cocoa UI, namely:
- Using command-tab to switch between the guest OS and MacOS sends the
command keypress to the guest which can
When switching between guest and host on a Mac using command-tab the
command key is sent to the guest which can trigger functionality in the
guest OS. Specifying left-command-key=off disables forwarding this key
to the guest. Defaults to enabled.
When switching between guest and host on a Mac with
From: Yanan Wang
The default value of the MachineClass members is 0, which
means we don't have to explicitly zero them. Also the value
of "mc->smp_props.prefer_sockets" will be taken care of by
smp_parse_test(), we don't necessarily need the statement
in machine_base_class_init() either.
Signed-
From: Yanan Wang
We have a description in qemu-options.hx for each CPU topology
parameter to explain what it exactly means, and also an extra
declaration for the target-specific one, e.g. "for PC only"
when describing "dies", and "for PC, it's on one die" when
describing "cores".
Now we are goin
From: Li Zhijian
Fujitsu's mail service has migrated to O365 months ago, the
lizhij...@cn.fujitsu.com address will stop working on 2022-06-01,
change it to my new email address lizhij...@fujitsu.com.
Signed-off-by: Li Zhijian
Acked-by: Zhang Chen
Message-Id: <20211231050901.360-1-lizhij...@cn.
From: Yanan Wang
The new Cluster-Aware Scheduling support has landed in Linux 5.16,
which has been proved to benefit the scheduling performance (e.g.
load balance and wake_affine strategy) on both x86_64 and AArch64.
So now in Linux 5.16 we have four-level arch-neutral CPU topology
definition li
All methods related to MachineState are prefixed with "machine_".
smp_parse() does not need to be an exception. Rename it and
const'ify the SMPConfiguration argument, since it doesn't need
to be modified.
Reviewed-by: Andrew Jones
Reviewed-by: Richard Henderson
Reviewed-by: Yanan Wang
Tested-by
Keep the common TYPE_MACHINE class initialization in
machine_base_class_init(), make it abstract, and move
the non-common code to a new class: "smp-generic-valid".
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yanan Wang
Message-Id: <20211216132015.815493-6-p
Declare structures const when we don't need to modify
them at runtime.
Reviewed-by: Andrew Jones
Reviewed-by: Richard Henderson
Reviewed-by: Yanan Wang
Tested-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211216132015.815493-8-phi...@redhat.com>
---
tests/unit/test-smp-
Avoid modifying the MachineClass internals by adding the
'smp-with-dies' machine, which inherits from TYPE_MACHINE.
Reviewed-by: Richard Henderson
Reviewed-by: Yanan Wang
Tested-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211216132015.815493-4-phi...@redhat.com>
---
te
From: Yanan Wang
I've built interests in the generic machine subsystem and
have also been working on projects related to this part,
self-recommand myself as a reviewer so that I can help to
review some patches familiar to me, and have a chance to
learn more continuously.
Signed-off-by: Yanan Wan
Avoid modifying the MachineClass internals by adding the
'smp-generic-invalid' machine, which inherits from TYPE_MACHINE.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yanan Wang
Message-Id: <20211216132015.815493-5-phi...@redhat.com>
---
tests/unit/test-smp
The phi...@redhat.com email address will stop working on
2022-01-01, change it to my personal email address.
Update .mailmap in case anyone wants to send me an email
because of some past commit I authored.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <2021123
Split the 'generic' test in two tests: 'valid' and 'invalid'.
This will allow us to remove the hack which modifies the
MachineClass internal state.
Reviewed-by: Richard Henderson
Reviewed-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211216132015.815493-3-phi...@redhat.com
From: Yanan Wang
Most machine types in test-smp-parse will be OK to have the default
MIN/MAX CPUs except "smp-generic-invalid", let's keep the default
values in machine_base_class_init which will be inherited. And if
we hope a different value for a specific machine, modify it in its
own initializ
We can simply use a local variable (and pass its pointer) instead
of a pointer to a compound literal.
Reviewed-by: Andrew Jones
Reviewed-by: Richard Henderson
Reviewed-by: Yanan Wang
Tested-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211216132015.815493-7-phi...@redhat
From: Philippe Mathieu-Daudé
@pin is an input where we connect a device output.
Rename it @input_pin to simplify the documentation.
Reviewed-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211218130437.1516929-5-f4...@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé
---
i
Use g_test_add_data_func() instead of g_test_add_func() so we can
pass the machine type to the tests (we will soon have different
machine types).
Reviewed-by: Richard Henderson
Reviewed-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211216132015.815493-2-phi...@redhat.com>
From: Yanan Wang
Add testcases for parsing of the four-level CPU topology hierarchy,
ie sockets/clusters/cores/threads, which will be supported on ARM
virt machines.
Signed-off-by: Yanan Wang
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211228092221.21068-5-wangyana...@huawei.com>
Signed
From: Philippe Mathieu-Daudé
Add empty lines to have a clearer distinction between different
functions declarations.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yanan Wang
Message-Id: <20211218130437.1516929-2-f4...@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-
From: Philippe Mathieu-Daudé
qdev_connect_gpio_out_named() is described as qdev_connect_gpio_out(),
and referring to itself in an endless loop, which is confusing. Fix.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yanan Wang
Message-Id: <20211218130437.1516929-4-f4...@amsat.org>
Signed-o
From: Philippe Mathieu-Daudé
qdev_init_gpio_out_named() is described as qdev_init_gpio_out(),
and referring to itself in an endless loop, which is confusing. Fix.
Reported-by: Yanan Wang
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yanan Wang
Message-Id: <20211218130437.1516929-3-f4...@
The following changes since commit 69f153667fce723ee546d2f047d66d0cfa67c3cc:
Merge tag 'memory-api-20211231' of https://github.com/philmd/qemu into
staging (2021-12-30 17:02:42 -0800)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/machine-core-202
> Philippe Mathieu-Daudé (8):
> tests/unit/test-smp-parse: Pass machine type as argument to tests
> tests/unit/test-smp-parse: Split the 'generic' test in valid / invalid
> tests/unit/test-smp-parse: Add 'smp-with-dies' machine type
> tests/unit/test-smp-parse: Add 'smp-generic-invalid' mac
On 12/18/21 14:04, Philippe Mathieu-Daudé wrote:
> Trivial patches clarifying qdev_connect_gpio_out() use,
> basically that the qemu_irq argument is an input.
>
> Since v1:
> - Addressed Yanan Wang and Peter Maydell comments:
> - Correct qdev_init_gpio_out_named() doc
> - Drop i8042_setup_a20_line
On 12/31/21 08:30, wangyanan (Y) wrote:
> Hi,
>
> On 2021/12/30 6:52, Philippe Mathieu-Daudé wrote:
>> qdev_get_gpio_out_connector() is called by sysbus_get_connected_irq()
>> which is only used by platform-bus.c; restrict it to hw/core/ by
>> adding a local "qdev-internal.h" header.
>>
>> Signed-
On 12/31/21 01:07, Philippe Mathieu-Daudé wrote:
> The phi...@redhat.com email address will stop working on
> 2022-01-01, change it to my personal email address.
>
> Update .mailmap in case anyone wants to send me an email
> because of some past commit I authored.
>
> Reviewed-by: Richard Henders
Hi,
On 12/31/21 06:09, Li Zhijian wrote:
> Fujitsu's mail service has migrated to O365 months ago, the
> lizhij...@cn.fujitsu.com address will stop working on 2022-06-01,
> change it to my new email address lizhij...@fujitsu.com.
>
> Signed-off-by: Li Zhijian
> ---
> MAINTAINERS | 2 +-
> 1 fil
On 12/28/21 10:22, Yanan Wang wrote:
> Hi,
>
> This series introduces the new CPU clusters topology parameter
> and enable the support for it on ARM virt machines.
> Yanan Wang (14):
> qemu-options: Improve readability of SMP related Docs
> hw/core/machine: Introduce CPU cluster topology supp
From: Pankaj Gupta >
Enable live migration support for virtio-pmem device.
Tested this: with live migration on same host.
Need suggestion on below points to support virtio-pmem live migration
between two separate host systems:
- There is still possibility of stale page cache page at the
destin
The 'resid' field is slightly confusing and could be
interpreted as some ID. Rename it as 'residual' which
is clearer to review. No logical change.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/scsi/scsi.h | 4 ++--
hw/scsi/megasas.c | 42 +-
The DMA API defines the dma_addr_t type for DMA addresses.
Some sizes related to the API also use this type, which is
a bit confusing when reviewing.
Add a similar 'dma_size_t' definition (and its format string).
Update the obvious places where dma_size_t should be used,
and adapt a pair of forma
Neither tools nor user-mode emulation require the PCI bus stub.
Signed-off-by: Philippe Mathieu-Daudé
---
stubs/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/stubs/meson.build b/stubs/meson.build
index 363f6fa785d..d359cbe1ad7 100644
--- a/stubs/meson.build
+++
User-mode emulation doesn't need the fw_cfg stub.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/nvram/meson.build | 6 --
stubs/meson.build| 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build
index 202a5466e63..f5ee9f6b88c 1006
Various APIs use 'pval' naming for 'pointer to val'.
rdma_pci_dma_map() uses 'plen' for 'PCI length', but since
'PCI' is already explicit in the function name, simplify
and rename the argument 'len'. No logical change.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/rdma/rdma_utils.h | 2 +-
hw/rd
Since the previous commit, dma_buf_rw() returns a MemTxResult
type. Do not discard it, return it to the caller.
Since both dma_buf_read/dma_buf_write functions were previously
returning the QEMUSGList size not consumed, add an extra argument
where the unconsummed size can be stored.
Update the fe
On 12/31/21 12:49, Philippe Mathieu-Daudé wrote:
> Since the previous commit, dma_buf_rw() returns a MemTxResult
> type. Do not discard it, return it to the caller.
>
> Since both dma_buf_read/dma_buf_write functions were previously
> returning the QEMUSGList size not consumed, add an extra argume
DMA API should not be included in user-mode emulation.
If so, build should fail. Remove the CONFIG_USER_ONLY check.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/dma.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index b3faef41b2f..
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 5b36334a28a..f0d707efb8c 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -876,6 +876,18 @@ PCI_DMA_DEF
Hi,
This series aims to clarify a bit the DMA API, in particular the
'size' argument which is not clear enough (as we use multiple types
for it). The clarification is trivial: add a dma_size_t typedef,
similar to the dma_addr_t one. This helps avoiding build failures
on 32-bit host [*] (and likely
Hi,
The CONFIG_USER_ONLY definition allows limiting user-mode
code to user emulation (in contrast to system emulation).
We often use it in common code.
Often the negative form (to *exclude* user-mode) is used.
This works fine with system emulation in mind, but it could
introduce subtle bugs when
This patchset implements virtual memory related RISC-V extensions: Svnapot
version 1.0, Svinval vesion 1.0, Svpbmt version 1.0.
Specification:
https://github.com/riscv/virtual-memory/tree/main/specs
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-virtmem-upstream-v2
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c| 1 +
target/riscv/cpu.h| 1 +
target/riscv/cpu_bits.h | 1 +
target/riscv/cpu_helper.c | 20
4 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/target/riscv/cpu.c
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 1 +
target/riscv/insn32.decode | 7 ++
target/riscv/insn_trans/trans_svinval.c.inc | 75 +
target/ri
It uses two PTE bits, but otherwise has no effect on QEMU, since QEMU is
sequentially consistent and doesn't model PMAs currently
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Tested-by: Heiko Stuebner
---
target/riscv/cpu.c| 1 +
target/riscv/cpu.h| 1 +
target/riscv/
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