RE: [PATCH v4 6/6] vfio: defer to commit kvm irq routing when enable msi/msix

> -Original Message- > From: Alex Williamson [mailto:alex.william...@redhat.com] > Sent: Friday, October 22, 2021 4:51 AM > To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.) > > Cc: pbonz...@redhat.com; qemu-devel@nongnu.org; k...@vger.kernel.org; Gonglei > (Arei) > Subje

Re: [PATCH v5 3/4] docs: (further further) remove non-reference uses of single backticks

On 02/11/2021 19.43, John Snow wrote: Signed-off-by: John Snow --- docs/devel/build-system.rst | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/docs/devel/build-system.rst b/docs/devel/build-system.rst index 7f106d2f1c..48e56d7ea9 100644 --- a/docs/d

Re: [PATCH v5 2/4] docs: (further) remove non-reference uses of single backticks

On 02/11/2021 19.43, John Snow wrote: The series rotted already. Here's the new changes. Please change the patch description for the final commit (looks ugly in the git log otherwise) Signed-off-by: John Snow --- docs/system/i386/sgx.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 de

Question on plugin or modules support on windows

Hi folks, I want to use plugins or modules on Windows. However, these features are still not supported  on cross build for Windows. Does someone know why it is not supported? I also want to look for some suggestions on how to implement it. Any advice is appreciated. Thanks, Zhiwei

Re: [PULL 00/12] Block layer patches

On 11/2/21 12:05 PM, Kevin Wolf wrote: The following changes since commit 8cb41fda78c7ebde0dd248c6afe1d336efb0de50: Merge remote-tracking branch 'remotes/philmd/tags/machine-20211101' into staging (2021-11-02 05:53:45 -0400) are available in the Git repository at: git://repo.or.cz/qemu/

Re: [PATCH v2 7/7] hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint()

On Sun, Oct 31, 2021 at 12:02 AM Bin Meng wrote: > > This is now used by RISC-V as well. Update the comments. > > Signed-off-by: Bin Meng > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > > --- > > (no changes since v1) > > include/hw/core/tcg-cpu-ops.h | 1 + > 1 fi

Re: [PATCH v2 4/7] target/riscv: cpu: Add a config option for native debug

On Sat, Oct 30, 2021 at 11:57 PM Bin Meng wrote: > > Add a config option to enable support for native M-mode debug. > This is disabled by default and can be enabled with 'debug=true'. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair > > --- > > Changes in v2: > - change the

Re: [PATCH v4 07/22] target/riscv: Add defines for AIA CSRs

On Mon, Nov 1, 2021 at 5:57 PM Anup Patel wrote: > > On Mon, Nov 1, 2021 at 12:26 PM Alistair Francis wrote: > > > > On Tue, Oct 26, 2021 at 5:01 PM Anup Patel wrote: > > > > > > The RISC-V AIA specification extends RISC-V local interrupts and > > > introduces new CSRs. This patch adds defines f

Re: [ PATCH v3 04/10] target/riscv: pmu: Make number of counters configurable

On Tue, Oct 26, 2021 at 6:41 AM Atish Patra wrote: > > The RISC-V privilege specification provides flexibility to implement > any number of counters from 29 programmable counters. However, the QEMU > implements all the counters. > > Make it configurable through pmu config parameter which now will

Re: [ PATCH v3 05/10] target/riscv: Implement mcountinhibit CSR

On Tue, Oct 26, 2021 at 6:05 AM Atish Patra wrote: > > As per the privilege specification v1.11, mcountinhibit allows to start/stop > a pmu counter selectively. > > Signed-off-by: Atish Patra Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.h | 2 ++ > target/riscv/cpu_b

Re: [ PATCH v3 03/10] target/riscv: pmu: Rename the counters extension to pmu

On Tue, Oct 26, 2021 at 6:03 AM Atish Patra wrote: > > The PMU counters are supported via cpu config "Counters" which doesn't > indicate the correct purpose of those counters. > > Rename the config property to pmu to indicate that these counters > are performance monitoring counters. This aligns w

Re: [ PATCH v3 02/10] target/riscv: Implement PMU CSR predicate function for

On Tue, Oct 26, 2021 at 5:56 AM Atish Patra wrote: > > Currently, the predicate function for PMU related CSRs only works if > virtualization is enabled. It also does not check mcounteren bits before > before cycle/minstret/hpmcounterx access. > > Support supervisor mode access in the predicate fun

Re: [ PATCH v3 01/10] target/riscv: Fix PMU CSR predicate function

On Tue, Oct 26, 2021 at 6:39 AM Atish Patra wrote: > > The predicate function calculates the counter index incorrectly for > hpmcounterx. Fix the counter index to reflect correct CSR number. > > Signed-off-by: Atish Patra Reviewed-by: Alistair Francis Alistair > --- > target/riscv/csr.c | 10

Re: [PATCH v2 1/2] virtio-gpu: splitting one extended mode guest fb into n-scanouts

On Tue, Nov 02, 2021 at 05:41:10PM -0700, Dongwon Kim wrote: > I double-checked the patch and also tried to build with --disable-opengl > but couldn't find any issue. Can you please give me some hint? Like > build errors you saw. What are changed by the patch are pretty much > limited to virtio-gpu

Re: [PATCH v4 02/22] target/riscv: Implement SGEIP bit in hip and hie CSRs

On Tue, Nov 2, 2021 at 4:22 PM Bin Meng wrote: > > On Tue, Nov 2, 2021 at 6:24 PM Anup Patel wrote: > > > > On Tue, Nov 2, 2021 at 12:22 PM Bin Meng wrote: > > > > > > On Tue, Oct 26, 2021 at 2:43 PM Anup Patel wrote: > > > > > > > > A hypervsior can optionally take guest external interrupts us

Re: [PATCH v5 06/26] arm: qemu: Add a devicetree file for qemu_arm64

Hi Simon Le mer. 3 nov. 2021 à 02:30, Simon Glass a écrit : > Hi Tom, > > On Tue, 2 Nov 2021 at 11:28, Tom Rini wrote: > > > > On Tue, Nov 02, 2021 at 09:00:53AM -0600, Simon Glass wrote: > > > Hi Tom, > > > > > > On Mon, 1 Nov 2021 at 12:07, Tom Rini wrote: > > > > > > > > On Mon, Nov 01, 202

Re: [PATCH v5 00/26] fdt: Make OF_BOARD a boolean option

Hi Simon Le mer. 3 nov. 2021 à 02:21, Simon Glass a écrit : > Hi François, > > On Wed, 27 Oct 2021 at 14:07, François Ozog > wrote: > > > > Hi Simon > > > > Le mer. 27 oct. 2021 à 20:23, Simon Glass a écrit : > >> > >> Hi François, > >> > >> On Wed, 27 Oct 2021 at 09:14, François Ozog > wrote

Re: [PULL 0/4] Block patches

On 11/2/21 10:22 AM, Hanna Reitz wrote: The following changes since commit 8cb41fda78c7ebde0dd248c6afe1d336efb0de50: Merge remote-tracking branch 'remotes/philmd/tags/machine-20211101' into staging (2021-11-02 05:53:45 -0400) are available in the Git repository at: https://github.com/Xa

[PATCH v4 06/10] target/arm: Split compute_fsr_fsc out of arm_deliver_fault

We will reuse this section of arm_deliver_fault for raising pc alignment faults. Signed-off-by: Richard Henderson --- target/arm/tlb_helper.c | 45 + 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_h

[PATCH v4 09/10] target/arm: Suppress bp for exceptions with more priority

Both single-step and pc alignment faults have priority over breakpoint exceptions. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/target/arm/debug_helper.c b/target/arm/debug_

[PATCH v4 07/10] target/arm: Take an exception if PC is misaligned

For A64, any input to an indirect branch can cause this. For A32, many indirect branch paths force the branch to be aligned, but BXWritePC does not. This includes the BX instruction but also other interworking changes to PC. Prior to v8, this case is UNDEFINED. With v8, this is CONSTRAINED UNPRE

[PATCH v4 01/10] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn

Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index cec672f229..9c4258ccac 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c

[PATCH v4 10/10] tests/tcg: Add arm and aarch64 pc alignment tests

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tests/tcg/aarch64/pcalign-a64.c | 37 + tests/tcg/arm/pcalign-a32.c | 46 +++ tests/tcg/aarch64/Makefile.target | 4 +-- tests/tcg/arm/Makefile.target | 4 +++ 4 file

[PATCH v4 05/10] target/arm: Advance pc for arch single-step exception

The size of the code covered by a TranslationBlock cannot be 0; this is checked via assert in tb_gen_code. Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9c4258ccac.

[PATCH v4 03/10] target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn

Signed-off-by: Richard Henderson --- target/arm/translate.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index ead77e9006..a39456ea98 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9629,2

[PATCH v4 08/10] target/arm: Assert thumb pc is aligned

Misaligned thumb PC is architecturally impossible. Assert is better than proceeding, in case we've missed something somewhere. Expand a comment about aligning the pc in gdbstub. Fail an incoming migrate if a thumb pc is misaligned. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson ---

[PATCH v4 04/10] target/arm: Split arm_pre_translate_insn

Create arm_check_ss_active and arm_check_kernelpage. Reverse the order of the tests. While it doesn't matter in practice, because only user-only has a kernel page and user-only never sets ss_active, ss_active has priority over execution exceptions and it is best to keep them in the proper order.

[PATCH v4 02/10] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn

Signed-off-by: Richard Henderson --- target/arm/translate.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index d6af5b1b03..ead77e9006 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9559,17 +9559,

[PATCH v4 00/10] target/arm: Fix insn exception priorities

Raise pc alignment faults. Fix single-step and pc-align priority over breakpoints. Not yet fixing insn abort priority over breakpoints. r~ Changes for v4: * Rebase on master. * Split some cleanups into new patches. * No special cases in helper_exception_pc_alignment. Changes for v3: *

Re: [PATCH v2 30/30] bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.h

On 11/2/21 6:52 PM, Warner Losh wrote: Signed-off-by: Warner Losh --- bsd-user/x86_64/target_arch_signal.h | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 29/30] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h

On 11/2/21 6:52 PM, Warner Losh wrote: Signed-off-by: Warner Losh --- bsd-user/i386/target_arch_signal.h | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 27/30] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext

On 11/2/21 6:52 PM, Warner Losh wrote: In FreeBSD, sigcontext was retired in favor of ucontext/mcontext. Remove vestigial target_sigcontext. Signed-off-by: Warner Losh --- bsd-user/i386/target_arch_signal.h | 4 1 file changed, 4 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 28/30] bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext

On 11/2/21 6:52 PM, Warner Losh wrote: In FreeBSD, sigcontext was retired in favor of ucontext/mcontext. Remove vestigial target_sigcontext. Signed-off-by: Warner Losh --- bsd-user/x86_64/target_arch_signal.h | 4 1 file changed, 4 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 26/30] bsd-user: add arm target build

On 11/2/21 6:52 PM, Warner Losh wrote: CC: Paolo Bonzini Signed-off-by: Warner Losh Acked-by: Kyle Evans Reviewed-by: Richard Henderson --- configs/targets/arm-bsd-user.mak | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 configs/targets/arm-bsd-user.mak diff --git a/configs/t

Re: [PATCH v2 25/30] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn

On 11/2/21 6:52 PM, Warner Losh wrote: Update ucontext to implement sigreturn. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 9 + 1 file changed, 9 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 24/30] bsd-user/arm/target_arch_signal.h: arm set_mcontext

On 11/2/21 6:52 PM, Warner Losh wrote: +env->regs[15] = tswap32(gr[TARGET_REG_PC]); This will be able to crash qemu with an odd pc in thumb mode. You'd have to artificially create this mcontext of course. Otherwise, Reviewed-by: Richard Henderson r~

Re: [PATCH v2 22/30] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args

On 11/2/21 6:52 PM, Warner Losh wrote: +/* + * Low bit indicates whether or not we're entering thumb mode. + */ +cpsr = cpsr_read(env); +if (ka->_sa_handler & 1) { +cpsr |= CPSR_T; +} else { +cpsr &= ~CPSR_T; +} +cpsr_write(env, cpsr, CPSR_T, CPSRWr

Re: [PATCH v2 21/30] bsd-user/arm/target_arch_signal.h: arm user context and trapframe for signals

On 11/2/21 6:52 PM, Warner Losh wrote: Arm specific user context structures for signal handling and the closely related trap frame. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 8 1 file changed, 8 insertions(+) Reviewed-by: Richard H

Re: [PATCH v2 20/30] bsd-user/arm/target_arch_signal.h: arm machine context for signals

On 11/2/21 6:52 PM, Warner Losh wrote: Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 20 1 file changed, 20 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 18/30] bsd-user/freebsd: Create common target_os_ucontext.h file

On 11/2/21 6:52 PM, Warner Losh wrote: FreeBSD has a MI ucontext structure that contains the MD mcontext machine state and other things that are machine independent. Create an include file for all the ucontext stuff. It needs to be included in the arch specific files after target_mcontext is defi

Re: [PATCH v2 14/30] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread

On 11/2/21 6:52 PM, Warner Losh wrote: +/* + * Thumb mode is encoded by the low bit in the entry point (since ARM can't + * execute at odd addresses). When it's set, set the Thumb bit (T) in the + * CPSR. + */ +if (entry & 0x1) { +cpsr_write(env, cpsr_read(env) | C

Re: [RFC PATCH v5 21/26] vhost: Add vhost_svq_valid_guest_features to shadow vq

On Tue, Nov 2, 2021 at 4:10 PM Eugenio Perez Martin wrote: > > On Tue, Nov 2, 2021 at 6:26 AM Jason Wang wrote: > > > > On Sat, Oct 30, 2021 at 2:44 AM Eugenio Pérez wrote: > > > > > > This allows it to test if the guest has aknowledge an invalid transport > > > feature for SVQ. This will includ

Re: [PATCH v2 08/30] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions

On 11/2/21 6:52 PM, Warner Losh wrote: +case EXCP_UDEF: +{ +/* See arm/arm/undefined.c undefinedinstruction(); */ +info.si_addr = env->regs[15]; + +/* + * Make sure the PC is correctly aligned. (It should +

Re: [RFC PATCH v5 23/26] util: Add iova_tree_alloc

On Tue, Nov 2, 2021 at 4:29 PM Eugenio Perez Martin wrote: > > On Tue, Nov 2, 2021 at 7:35 AM Jason Wang wrote: > > > > > > 在 2021/10/30 上午2:35, Eugenio Pérez 写道: > > > This iova tree function allows it to look for a hole in allocated > > > regions and return a totally new translation for a given

Re: [PATCH v2 05/30] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions

On 11/2/21 6:52 PM, Warner Losh wrote: target_arch_cpu.h is for CPU loop definitions. Create the file and define target_cpu_init and target_cpu_reset for arm. Signed-off-by: Olivier Houchard Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans --- bsd-user/arm/target_ar

Re: [PATCH v2 1/1] vhost: Fix last queue index of devices with no cvq

On Tue, Nov 2, 2021 at 7:41 PM Eugenio Pérez wrote: > > The -1 assumes that all devices with no cvq have an spare vq allocated > for them, but with no offer of VIRTIO_NET_F_CTRL_VQ. This is an invalid > device by the standard, so just stick to the right number of device > models. > > This is not a

[PATCH v3] Optimized the function of fill_connection_key.

From: "Rao, Lei" Remove some unnecessary code to improve the performance of the filter-rewriter module. Signed-off-by: Lei Rao Reviewed-by: Zhang Chen Reviewed-by: Juan Quintela --- net/colo-compare.c| 2 +- net/colo.c| 31 --- net/colo.h

Re: [PATCH] net/vhost-vdpa: fix memory leak in vhost_vdpa_get_max_queue_pairs()

On Tue, Nov 2, 2021 at 11:52 PM Stefano Garzarella wrote: > > Use g_autofree to ensure that `config` is freed when > vhost_vdpa_get_max_queue_pairs() returns. > > Reported-by: Coverity (CID 1465228: RESOURCE_LEAK) > Fixes: 402378407d ("vhost-vdpa: multiqueue support") > Signed-off-by: Stefano Garz

[Bug 1903712] Re: when ../configure, cannot find Ninjia

1、install re2c。[url：http://re2c.org/index.html] tar -xvzf re2c-1.0.3.tar.gz cd re2c-1.0.3/ autoreconf -i -W all ./configure make&&make install 2、git clone git://github.com/ninja-build/ninja.git && cd ninja ./configure.py --bootstrap cp ninja /usr/bin/ [root@aix7 ~]# ninja -

RE: [PATCH v2 7/7] Optimized the function of fill_connection_key.

Will be changed and sent separately. Thanks, Lei -Original Message- From: Juan Quintela Sent: Wednesday, November 3, 2021 12:23 AM To: Rao, Lei Cc: Zhang, Chen ; lizhij...@cn.fujitsu.com; jasow...@redhat.com; zhang.zhanghaili...@huawei.com; lukasstra...@web.de; dgilb...@redhat.com; q

Re: [PATCH v5 06/26] arm: qemu: Add a devicetree file for qemu_arm64

Hi Tom, On Tue, 2 Nov 2021 at 10:57, Tom Rini wrote: > > On Tue, Nov 02, 2021 at 08:59:45AM -0600, Simon Glass wrote: > > Hi François, > > > > On Mon, 1 Nov 2021 at 11:33, François Ozog wrote: > > > > > > Hi Simon > > > > > > Le lun. 1 nov. 2021 à 17:58, Simon Glass a écrit : > > >> > > >> Hi P

Re: [PATCH v5 06/26] arm: qemu: Add a devicetree file for qemu_arm64

Hi Tom, On Tue, 2 Nov 2021 at 11:28, Tom Rini wrote: > > On Tue, Nov 02, 2021 at 09:00:53AM -0600, Simon Glass wrote: > > Hi Tom, > > > > On Mon, 1 Nov 2021 at 12:07, Tom Rini wrote: > > > > > > On Mon, Nov 01, 2021 at 06:33:35PM +0100, François Ozog wrote: > > > > Hi Simon > > > > > > > > Le lu

Re: [RFC 3/6] target/riscv: rvk: add flag support for Zk/Zkn/Zknd/Zknd/Zkne/Zknh/Zks/Zksed/Zksh/Zkr

On 11/2/21 9:06 PM, liweiwei wrote: 在 2021/11/3 上午1:56, Richard Henderson 写道: On 11/1/21 11:11 PM, liweiwei wrote: +    if (cpu->cfg.ext_zk) { +    cpu->cfg.ext_zbkb = true; +    cpu->cfg.ext_zbkc = true; +    cpu->cfg.ext_zbkx = true; +    cpu->cfg.ext_zknd

Re: [PATCH v5 00/26] fdt: Make OF_BOARD a boolean option

Hi François, On Wed, 27 Oct 2021 at 14:07, François Ozog wrote: > > Hi Simon > > Le mer. 27 oct. 2021 à 20:23, Simon Glass a écrit : >> >> Hi François, >> >> On Wed, 27 Oct 2021 at 09:14, François Ozog wrote: >> > >> > >> > >> > On Wed, 27 Oct 2021 at 16:08, Simon Glass wrote: >> >> >> >> Hi F

Re: [PATCH v5 00/26] fdt: Make OF_BOARD a boolean option

Hi Mark, On Wed, 27 Oct 2021 at 16:30, Mark Kettenis wrote: > > > From: Simon Glass > > Date: Wed, 27 Oct 2021 12:23:21 -0600 > > > > Hi François, > > > > On Wed, 27 Oct 2021 at 09:14, François Ozog > > wrote: > > > > > > > > > > > > On Wed, 27 Oct 2021 at 16:08, Simon Glass wrote: > > >> > >

Re: [PULL 0/4] Trivial branch for 6.2 patches

On Wed, 3 Nov 2021, Laurent Vivier wrote: The following changes since commit af531756d25541a1b3b3d9a14e72e7fedd941a2e: Merge remote-tracking branch 'remotes/philmd/tags/renesas-20211030' into staging (2021-10-30 11:31:41 -0700) are available in the Git repository at: git://github.com/vivier

Re: [RFC 4/6] target/riscv: rvk: add implementation of instructions for Zk*

在 2021/11/3 上午2:56, Richard Henderson 写道: On 11/1/21 11:11 PM, liweiwei wrote: +uint8_t AES_ENC_SBOX[] = { +  0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5, +  0x30, 0x01, 0x67, 0x2B, 0xFE, 0xD7, 0xAB, 0x76, +  0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0, +  0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0

Re: [RFC 3/6] target/riscv: rvk: add flag support for Zk/Zkn/Zknd/Zknd/Zkne/Zknh/Zks/Zksed/Zksh/Zkr

在 2021/11/3 上午1:56, Richard Henderson 写道: On 11/1/21 11:11 PM, liweiwei wrote: +    if (cpu->cfg.ext_zk) { +    cpu->cfg.ext_zbkb = true; +    cpu->cfg.ext_zbkc = true; +    cpu->cfg.ext_zbkx = true; +    cpu->cfg.ext_zknd = true; +    cpu->cfg.ext_z

Re: [PULL 0/9] pc,pci,virtio: features, fixes

On 11/1/21 7:44 PM, Michael S. Tsirkin wrote: The following changes since commit af531756d25541a1b3b3d9a14e72e7fedd941a2e: Merge remote-tracking branch 'remotes/philmd/tags/renesas-20211030' into staging (2021-10-30 11:31:41 -0700) are available in the Git repository at: git://git.kerne

Re: [RFC 2/6] target/riscv: rvk: add implementation of instructions for Zbk* - reuse partial instructions of Zbb/Zbc extensions - add brev8 packh, unzip, zip, etc.

Thanks for your suggestions. 在 2021/11/2 下午11:44, Richard Henderson 写道: On 11/1/21 11:11 PM, liweiwei wrote: Signed-off-by: liweiwei Signed-off-by: wangjunqiang You managed to get the whole patch description into the subject line. Please break it up. OK. +target_ulong HELPER(grev)(target

Re: [PATCH v2 1/2] virtio-gpu: splitting one extended mode guest fb into n-scanouts

I double-checked the patch and also tried to build with --disable-opengl but couldn't find any issue. Can you please give me some hint? Like build errors you saw. What are changed by the patch are pretty much limited to virtio-gpu blob case and just one change in common area is egl_fb_blit function

Re: [PATCH] ppc/pegasos2: Suppress warning when qtest enabled

On Mon, Nov 01, 2021 at 04:08:31PM +0100, BALATON Zoltan wrote: > Suggested-by: Peter Maydell > Signed-off-by: BALATON Zoltan Applied to ppc-for-6.2, thanks. > --- > hw/ppc/pegasos2.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos

Re: [PATCH] ppc/pnv: Fix check on block device before updating drive contents

On Tue, Nov 02, 2021 at 05:29:05PM +0100, Cédric Le Goater wrote: > Test is wrong and the backend can never updated. It could have led to > a QEMU crash but since the firmware deactivates flash access if a valid > layout is not detected, it went unnoticed. > > Reported-by: Coverity CID 1465223 > F

Re: [PULL 00/60] accel/tcg patch queue

On Tue, Nov 2, 2021 at 5:35 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 11/2/21 7:27 PM, Warner Losh wrote: > > This breaks bsd-user building. That’s OK, imho, for two reasons: First > it only runs ‘hello world’. Second, I’ve updated my patch train which will > fix this (messa

Re: [PATCH v2 01/30] bsd-user: Add stubs for new signal routines

On Tue, Nov 2, 2021 at 5:37 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 11/2/21 6:52 PM, Warner Losh wrote: > > Until the signal support is merged from the bsd-user fork, we need stubs > > for cpu_loop_exit_sigsegv and cpu_loop_exit_sigbus to link. These call > > abort after l

Re: [PATCH v2 01/30] bsd-user: Add stubs for new signal routines

On 11/2/21 6:52 PM, Warner Losh wrote: Until the signal support is merged from the bsd-user fork, we need stubs for cpu_loop_exit_sigsegv and cpu_loop_exit_sigbus to link. These call abort after logging a message. Since singals aren't supported here yet, this is sufficient. Signed-off-by: Warner

Re: [PULL 00/60] accel/tcg patch queue

On 11/2/21 7:27 PM, Warner Losh wrote: This breaks bsd-user building. That’s OK, imho, for two reasons: First it only runs ‘hello world’. Second, I’ve updated my patch train which will fix this (message-id 20211019164447.16359-1-...@bsdimp.com). If there’s urgency to this, I can pull patch 1 o

[PATCH 3/4] ui/gtk-egl: guest fb texture needs to be regenerated when reinitializing egl

If guest fb is backed by dmabuf (blob-resource), the texture bound to the old context needs to be recreated in case the egl is re-initialized (e.g. new window for vc is created in case of detaching/reattaching of the tab) v2: call egl_dmabuf_release_texutre instead of putting 0 to dmabuf->texture

Re: [PULL 00/60] accel/tcg patch queue

into staging (2021-10-29 19:42:36 -0700) >> are available in the Git repository at: >> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211102 >> for you to fetch changes up to 742f07628c0a0bd847b47ee0a0b20c44531e0ba5: >> linux-user: Handle

[PATCH v2 27/30] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext

In FreeBSD, sigcontext was retired in favor of ucontext/mcontext. Remove vestigial target_sigcontext. Signed-off-by: Warner Losh --- bsd-user/i386/target_arch_signal.h | 4 1 file changed, 4 deletions(-) diff --git a/bsd-user/i386/target_arch_signal.h b/bsd-user/i386/target_arch_signal.h

Re: [PULL 00/41] MIPS patches for 2021-11-02

ository at: https://github.com/philmd/qemu.git tags/mips-20211102 for you to fetch changes up to 6f08c9c5316a80a049d4861eaac5844466ba3eba: Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too" (

[PULL 2/4] hw/core/machine: Add the missing delimiter in cpu_slot_to_string()

From: Yanan Wang The expected output string from cpu_slot_to_string() ought to be like "socket-id: *, die-id: *, core-id: *, thread-id: *", so add the missing ", " before "die-id". This affects the readability of the error message. Fixes: 176d2cda0d ("i386/cpu: Consolidate die-id validity in smp

[PATCH v2 26/30] bsd-user: add arm target build

CC: Paolo Bonzini Signed-off-by: Warner Losh Acked-by: Kyle Evans Reviewed-by: Richard Henderson --- configs/targets/arm-bsd-user.mak | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 configs/targets/arm-bsd-user.mak diff --git a/configs/targets/arm-bsd-user.mak b/configs/targets/ar

[PULL 3/4] MAINTAINERS: Split HPPA TCG vs HPPA machines/hardware

From: Philippe Mathieu-Daudé Hardware emulated models don't belong to the TCG MAINTAINERS section. Move them to the 'HP-PARISC Machines' section. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Helge Deller Message-Id: <20211004083835.3802961-1-f4...@amsat.or

[PATCH v2 24/30] bsd-user/arm/target_arch_signal.h: arm set_mcontext

Move the machine context to the CPU state. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 75 +++ 1 file changed, 75 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm

[PULL 4/4] hw/input/lasips2: Fix typos in function names

From: Philippe Mathieu-Daudé Artist is another device, this one is the Lasi PS/2. Rename the functions accordingly. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Damien Hedde Message-Id: <20210920064048.2729397-2-f4...@amsat.org> Signed-off-by: Laurent Vivier --- hw/input/lasips2.c | 8

[PULL 0/4] Trivial branch for 6.2 patches

The following changes since commit af531756d25541a1b3b3d9a14e72e7fedd941a2e: Merge remote-tracking branch 'remotes/philmd/tags/renesas-20211030' into staging (2021-10-30 11:31:41 -0700) are available in the Git repository at: git://github.com/vivier/qemu.git tags/trivial-branch-for-6.2-pull

[PULL 1/4] monitor: Trim some trailing space from human-readable output

From: Markus Armbruster I noticed -cpu help printing enough trailing spaces to make the output at least 84 characters wide. Looks ugly unless the terminal is wider. Ugly or not, trailing spaces are stupid. The culprit is this line in x86_cpu_list_entry(): qemu_printf("x86 %-20s %-58s\n",

[PATCH v2 1/4] ui/gtk-egl: un-tab and re-tab should destroy egl surface and context

An old esurface should be destroyed and set to be NULL when doing un-tab and re-tab so that a new esurface an context can be created for the window widget that those will be bound to. v2: enabling opengl specific routines only when CONFIG_OPENGL is set Cc: Gerd Hoffmann Signed-off-by: Dongwon Ki

[PATCH 4/4] ui/gtk: gd_draw_event returns FALSE when no cairo surface is bound

gd_draw_event shouldn't try to repaint if surface does not exist for the VC. Cc: Gerd Hoffmann Signed-off-by: Dongwon Kim --- ui/gtk.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/ui/gtk.c b/ui/gtk.c index 8da673c18c..d2892ea6b4 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -778,6 +778,9 @@

[PATCH v2 22/30] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args

Implement set_sigtramp_args to setup the arguments to the sigtramp calls. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 47 +++ 1 file changed, 47 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user

[PATCH v2 18/30] bsd-user/freebsd: Create common target_os_ucontext.h file

FreeBSD has a MI ucontext structure that contains the MD mcontext machine state and other things that are machine independent. Create an include file for all the ucontext stuff. It needs to be included in the arch specific files after target_mcontext is defined. This is largely copied from sys/_uco

[PATCH v2 30/30] bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.h

Signed-off-by: Warner Losh --- bsd-user/x86_64/target_arch_signal.h | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/bsd-user/x86_64/target_arch_signal.h b/bsd-user/x86_64/target_arch_signal.h index 55f742b0a8..e84aff948c 100644 --- a/bsd-user/x86_64/target_arch_signal

[PATCH v2 28/30] bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext

In FreeBSD, sigcontext was retired in favor of ucontext/mcontext. Remove vestigial target_sigcontext. Signed-off-by: Warner Losh --- bsd-user/x86_64/target_arch_signal.h | 4 1 file changed, 4 deletions(-) diff --git a/bsd-user/x86_64/target_arch_signal.h b/bsd-user/x86_64/target_arch_sig

[PATCH v2 29/30] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h

Signed-off-by: Warner Losh --- bsd-user/i386/target_arch_signal.h | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/bsd-user/i386/target_arch_signal.h b/bsd-user/i386/target_arch_signal.h index e262667bda..bf7263c4f8 100644 --- a/bsd-user/i386/target_arch_signal.h +++ b

[PATCH v2 25/30] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn

Update ucontext to implement sigreturn. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 9 + 1 file changed, 9 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h index 3b2f56ffab..3db76c9201 100

[PATCH v2 11/30] bsd-user/arm/target_arch_reg.h: Implement core dump register copying

Implement the register copying routines to extract registers from the cpu for core dump generation. Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_reg.h | 60 ++ 1 file ch

[PATCH v2 21/30] bsd-user/arm/target_arch_signal.h: arm user context and trapframe for signals

Arm specific user context structures for signal handling and the closely related trap frame. Signed-off-by: Stacey Son Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 8 1 file changed, 8 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/t

[PATCH v2 23/30] bsd-user/arm/target_arch_signal.h: arm get_mcontext

Get the machine context from the CPU state. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_signal.h | 50 +++ 1 file changed, 50 insertions(+) diff

[PATCH v2 10/30] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch

Implement the system call dispatch. This implements all three kinds of system call: direct and the two indirect variants. It handles all the special cases for thumb as well. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Rich

[PATCH v2 19/30] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack

Defines for registers and stack layout related to signals. Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_signal.h | 57 +++ 1 file changed, 57 insertions(+) create mode 1006

[PATCH v2 09/30] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions

Implement EXCP_PREFETCH_ABORT AND EXCP_DATA_ABORT. Both of these data exceptions cause a SIGSEGV. Signed-off-by: Kyle Evans Signed-off-by: Olivier Houchard Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arc

[PATCH v2 20/30] bsd-user/arm/target_arch_signal.h: arm machine context for signals

Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 20 1 file changed, 20 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h index 973183d99c..3aaced474b 1006

[PATCH v2 16/30] bsd-user/arm/target_arch_elf.h: arm get hwcap

Implement get_elf_hwcap to get the first word of hardware capabilities. Signed-off-by: Kyle Evans Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_elf.h | 72 +- 1 file cha

[PATCH v2 15/30] bsd-user/arm/target_arch_elf.h: arm defines for ELF

Basic set of defines needed for arm ELF file activation. Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_elf.h | 36 ++ 1 file changed, 36 insertions(+) create mode 100644

[PATCH 2/4] ui/gtk-egl: make sure the right context is set as the current

Making the vc->gfx.ectx current before handling texture associated with it Cc: Gerd Hoffmann Signed-off-by: Dongwon Kim --- ui/gtk-egl.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c index 72ce5e1f8f..7c9629d6cc 100644 --- a/ui/gtk-egl.c +++ b/ui/gtk-egl.

[PATCH v2 08/30] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions

Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and EXCP_YIELD. The first two generate a signal to the emulated binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy nops. Signed-off-by: Stacey Son Signed-off-by: Mikaël Urankar Signed-off-by: Kyle Evans Signed-off-

[PATCH v2 12/30] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space

Various parameters describing the layout of the ARM address space. In addition, define routines to get the stack pointer and to set the second return value. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --

[PATCH v2 14/30] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread

Implement target_thread_init (to create a thread) and target_set_upcall (to switch to a thread) for arm. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Kyle Evans --- bsd-user/arm/target_arch_thread.h | 80 +++ 1 file ch

[PATCH v2 07/30] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation

Add a boiler plate CPU loop that does nothing except return an error for all traps. Signed-off-by: Sean Bruno Signed-off-by: Stacey Son Signed-off-by: Warner Losh Reviewed-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_cpu.h | 22 ++ 1 file cha

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