> >
> > From: Mingwang Li
> >
> > If default main_mem is used to be registered as the system memory,
> > other memory cannot be initialized. Therefore, the system memory
> > should be initialized to the machine->ram, which consists of the
> > default main_mem and other possible memory required by
On 07.10.21 18:29, Vladimir Sementsov-Ogievskiy wrote:
9/14/21 20:08, Hanna Reitz wrote:
On 14.09.21 12:25, Vladimir Sementsov-Ogievskiy wrote:
These series makes tests pass with
IMGOPTS='compression_type=zstd'
Also, python iotests start to support IMGOPTS (they didn't before).
v3:
02-04
On Oct 7 18:23, Lukasz Maniak wrote:
> Hi,
>
> This series of patches is an attempt to add support for the following
> sections of NVMe specification revision 1.4:
>
> 8.5 Virtualization Enhancements (Optional)
> 8.5.1 VQ Resource Definition
> 8.5.2 VI Resource Definition
> 8.5.3 Sec
Test 297 in tests/qemu-iotests currently fails: pylint has
learned new things to check, or we simply missed them.
All fixes in this patch are related to additional spaces used
or wrong indentation. No functional change intended.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/qemu-iotests/1
The inverse pdpe/pde PG_PRESENT_MASK checking causes no
mapping information was collected from "info mem" for guest
with LA57 enabled.
Fixes: 6c7c3c21f9 ("x86: implement la57 paging mode")
Signed-off-by: Yuan Yao
---
target/i386/monitor.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
The problem here is that some variables are formatted with
unnecessary spaces to make it prettier and easier to read.
However, pylint complains about those additional spaces.
Temporarly remove the check, but just on those variables.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/qemu-iotes
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need to fix it.
All these fixes involve just indentation or additional spaces
added.
Signed-off-by: Emanuele Giuseppe Esposito
---
v2:
* temporarly enable a
On Fri, Oct 08, 2021 at 10:51:24AM +1100, Gavin Shan wrote:
> Hi Drew,
>
> On 10/6/21 10:56 PM, Andrew Jones wrote:
> > On Wed, Oct 06, 2021 at 10:03:25PM +1100, Gavin Shan wrote:
> > > On 10/6/21 9:35 PM, Andrew Jones wrote:
> > > > On Wed, Oct 06, 2021 at 06:22:08PM +0800, Gavin Shan wrote:
> >
We can handle up to a static amount of memory slots, capped by the size of
an internal array.
Let's make sure that array size is the only source of truth for the number
of elements in that array.
Signed-off-by: Alexander Graf
---
accel/hvf/hvf-accel-ops.c | 2 +-
1 file changed, 1 insertion(+),
On Thu, Oct 7, 2021 at 6:18 PM wrote:
>
> From: Frank Chang
>
> oprsz and maxsz are passed with the same value in commit: eee2d61e202.
> However, vmv.v.v was missed in that commit and should pass the same
> value as well in its tcg_gen_gvec_2_ptr() call.
>
> Signed-off-by: Frank Chang
Thanks!
From: Peter Delevoryas
The gpio array is declared as a dense array:
qemu_irq gpios[ASPEED_GPIO_NR_PINS];
(AST2500 has 228, AST2400 has 216, AST2600 has 208)
However, this array is used like a matrix of GPIO sets
(e.g. gpio[NR_SETS][NR_PINS_PER_SET] = gpio[8][32])
size_t offset = set * GPI
From: Peter Delevoryas
v1: https://lore.kernel.org/qemu-devel/20210924061953.1996620-1-p...@fb.com/
v2:
- Standardized the size of the GPIOSetProperties array for each
Aspeed SOC so that we can use the constant
"ASPEED_GPIO_MAX_NR_SETS" to iterate over all of them.
Th
On Wed, Sep 29, 2021 at 10:03 PM MingWang Li wrote:
>
> From: Mingwang Li
>
> If default main_mem is used to be registered as the system memory,
> other memory cannot be initialized. Therefore, the system memory
> should be initialized to the machine->ram, which consists of the
> default main_mem
> On Oct 4, 2021, at 4:43 AM, Cédric Le Goater wrote:
>
> On 10/4/21 11:07, Cédric Le Goater wrote:
>> On 9/28/21 05:43, p...@fb.com wrote:
>>> From: Peter Delevoryas
>>>
>>> The gpio array is declared as a dense array:
>>>
>>>qemu_irq gpios[ASPEED_GPIO_NR_PINS];
>>>
>>> (AST2500 has 22
On 211007 1508, Paolo Bonzini wrote:
> Cc: Alexander Oleinik
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alexander Bulekov
Tested-by: Alexander Bulekov
Thanks!
> ---
> configure| 71 +++-
> meson.build | 51 +++
On 211007 1508, Paolo Bonzini wrote:
> Pass CONFIG_FUZZ via host_kconfig, and use it to select the
> sparse-mem device.
>
> Cc: Alexander Oleinik
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alexander Bulekov
Tested-by: Alexander Bulekov
Thank you
On Fri, Oct 8, 2021 at 3:52 AM Richard Henderson
wrote:
>
> Move the function to cpu_helper.c, as it is large and growing.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.h| 47 ++-
> target/risc
Hi Eric,
On 2021/10/8 0:58, Eric Auger wrote:
Hi Kunkun,
On 4/14/21 3:45 AM, Kunkun Jiang wrote:
On 2021/4/13 20:57, Auger Eric wrote:
Hi Kunkun,
On 4/13/21 2:10 PM, Kunkun Jiang wrote:
Hi Eric,
On 2021/4/11 20:08, Eric Auger wrote:
In nested mode, legacy vfio_iommu_map_notify cannot be u
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Saturday, October 2, 2021 7:04 AM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
>
> Cc: phi...@redhat.com; pbonz...@redhat.com; marcel.apfelb...@gmail.com;
> m...@redhat.com; qem
On Thu, 7 Oct 2021, Eric DeVolder wrote:
> This implements a PCI device for ACPI ERST. This implements the
> non-NVRAM "mode" of operation for ERST as it is supported by
> Linux and Windows.
>
> Signed-off-by: Eric DeVolder
> ---
> hw/acpi/erst.c | 836
> +++
Kindly ping,
Hi all,
Will this patch be picked up soon, or is there any other advice?
Thanks,
Kunkun Jiang
On 2021/9/14 9:53, Kunkun Jiang wrote:
This series include patches as below:
Patch 1:
- vfio/pci: Fix vfio-pci sub-page MMIO BAR mmaping in live migration
Patch 2:
- Added a trace poin
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Saturday, October 2, 2021 7:05 AM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
>
> Cc: phi...@redhat.com; pbonz...@redhat.com; marcel.apfelb...@gmail.com;
> m...@redhat.com; qem
On Thu, 7 Oct 2021, Eric DeVolder wrote:
> This change reserves the PCI device_id for the new ACPI ERST
> device.
>
> Signed-off-by: Eric DeVolder
> Acked-by: Igor Mammedov
Acked-by: Ani Sinha
> ---
> include/hw/pci/pci.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/hw/
The ordering of the patches is wrong!
(a) First, you need this patch so that the test framework will ignore
changes
to the table blobs that you specify here to explicitly ignore.
(b) Then you need the patch that actually contains the test you wrote
(patch
8). Now because you have previously ignor
On Thu, 7 Oct 2021, Eric DeVolder wrote:
> Following the guidelines in tests/qtest/bios-tables-test.c, this
> is step 6.
>
> Below is the disassembly of an ERST table, tests/data/acpi/pc/ERST.
> This is a PCI device and as such its base address can change; it
> is possible for the address field
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Saturday, October 2, 2021 7:04 AM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
>
> Cc: phi...@redhat.com; pbonz...@redhat.com; marcel.apfelb...@gmail.com;
> m...@redhat.com; qem
From: Shengtan Mao
Signed-off-by: Shengtan Mao
Reviewed-by: Hao Wu
Reviewed-by: Chris Rauer
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
tests/qtest/meson.build | 1 +
tests/qtest/npcm7xx_sdhci-test.c | 209 +++
2 files changed, 210 insertions(+)
From: Shengtan Mao
Signed-off-by: Shengtan Mao
Reviewed-by: Hao Wu
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
Reviewed-by: Peter Maydell
---
hw/arm/npcm7xx_boards.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.
From: Shengtan Mao
Signed-off-by: Shengtan Mao
Reviewed-by: Hao Wu
Reviewed-by: Chris Rauer
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
hw/sd/meson.build | 1 +
hw/sd/npcm7xx_sdhci.c | 182 ++
include/hw/sd/npcm7xx_sdhci.h | 65
From: Shengtan Mao
Signed-off-by: Shengtan Mao
Reviewed-by: Hao Wu
Reviewed-by: Chris Rauer
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
tests/qtest/libqos/meson.build | 1 +
tests/qtest/libqos/sdhci-cmd.c | 116 +
tests/qtest/libqos/sdhci-cmd.h | 70
From: Shengtan Mao
Signed-off-by: Shengtan Mao
Reviewed-by: Hao Wu
Reviewed-by: Chris Rauer
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx.c | 12 +++-
include/hw/arm/npcm7xx.h | 2 ++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/hw/arm/
This patch set implements the Nuvoton MMC device
for NPCM7XX boards.
The MMC device is compatible with the SDHCI interface
in QEMU. It allows the user to attach an SD card image
to it.
Changes since v1:
1. Rearrange the "add SDHCI commands" to just before when it's
actually used.
2. Add standr
Hi Drew,
On 10/6/21 10:56 PM, Andrew Jones wrote:
On Wed, Oct 06, 2021 at 10:03:25PM +1100, Gavin Shan wrote:
On 10/6/21 9:35 PM, Andrew Jones wrote:
On Wed, Oct 06, 2021 at 06:22:08PM +0800, Gavin Shan wrote:
The following option is used to specify the distance map. It's
possible the option
The MacOS driver expects the RGB values for the pixel to be in entries 0 and 1
of the colour palette.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
hw/display/macfb.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/display/macfb.c b/hw/display/macfb.c
The MacOS toolbox ROM uses the monitor sense to detect the display type and then
offer a fixed set of resolutions and colour depths accordingly. Implement the
monitor sense using information found in Apple Technical Note HW26: "Macintosh
Quadra Built-In Video" along with some local experiments.
Si
Since the available resolutions and colour depths are determined by the attached
display type, add a qdev property to allow the display type to be specified.
The main resolutions of interest are high resolution 1152x870 with 8-bit colour
and SVGA resolution up to 800x600 with 24-bit colour so upda
Whilst the in-built Quadra 800 framebuffer exists within the Nubus address
space for slot 9, it has its own dedicated interrupt on VIA2. Force the
macfb device to occupy slot 9 in the q800 machine and wire its IRQ to the
separate video interrupt since this is what is expected by the MacOS
interrupt
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Laurent Vivier
---
hw/display/macfb.c | 8 +++-
hw/display/trace-events | 4
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/display/macfb.c b/hw/display/macfb.c
index f88f5a6523..11
The MacOS driver expects a 60.15Hz vertical blank interrupt to be generated by
the framebuffer which in turn schedules the mouse driver via the Vertical
Retrace
Manager.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
hw/display/macfb.c | 83
Make sure any errors that occur within the macfb realize chain are detected
and handled correctly to prevent crashes and to ensure that error messages are
reported back to the user.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: BALATON Zoltan
Reviewed-by: Laurent Vivier
---
hw/display/macfb.c |
According to Apple Technical Note HW26: "Macintosh Quadra Built-In Video" the
in-built framebuffer encodes each 24-bit pixel into 4 bytes. Adjust the 24-bit
RGB pixel encoding accordingly which agrees with the encoding expected by MacOS
when changing into 24-bit colour mode.
Signed-off-by: Mark Ca
Currently macfb_common_realize() defines the framebuffer RAM memory region as
being non-migrateable but then immediately registers it for migration. Replace
memory_region_init_ram_nomigrate() with memory_region_init_ram() which is
clearer
and does exactly the same thing.
Signed-off-by: Mark Cave-
The monitor modes table is found by experimenting with the Monitors Control
Panel in MacOS and analysing the reads/writes. From this it can be found that
the mode is controlled by writes to the DAFB_MODE_CTRL1 and DAFB_MODE_CTRL2
registers.
Implement the first block of DAFB registers as a register
This is the next set of patches to allow users to boot MacOS in QEMU's
q800 machine.
Patches 1 to 4 are fixes for existing bugs that I discovered whilst
developing the remainder of the patchset whilst patch 5 simplifies the
registration of the framebuffer RAM.
Patch 6 adds trace events to the fra
The palette_current index counter has a maximum size of 256 * 3 to cover a full
color palette of 256 RGB entries. Linux assumes that the palette_current index
wraps back around to zero after writing 256 RGB entries so ensure that
palette_current is reset at this point to prevent data corruption wit
During realize memory_region_init_ram_nomigrate() is used to initialise the RAM
memory region used for the framebuffer but the owner object reference is
incorrect since MacFbState is a typedef and not a QOM type.
Change the memory region owner to be the corresponding DeviceState to fix the
issue a
As per the current Error API best practices, change macfb_commom_realize() to
return
a boolean indicating success to reduce errp boiler-plate handling code. Note
that
memory_region_init_ram_nomigrate() is also updated to use &error_abort to
indicate
a non-recoverable error, matching the behaviou
On Thu, Oct 07, 2021 at 06:23:52PM +0200, Lukasz Maniak wrote:
> From: Knut Omang
>
> Make the default PCI Express Capability for PCIe devices set
> MaxReadReq to 512.
code says 256
> Tyipcal modern devices people would want to
typo
> emulate or simulate would want this. The previous value w
On Thu, Oct 07, 2021 at 12:27:24PM -0400, John Snow wrote:
> On Thu, Oct 7, 2021 at 10:52 AM Eric Blake wrote:
>
> > On Wed, Sep 22, 2021 at 08:49:25PM -0400, John Snow wrote:
> > > The single space is indeed required to successfully transmit the file
> > > descriptor to QEMU.
> >
> > Sending fds
On Thu, Oct 07, 2021 at 07:52:42PM +0200, Vladimir Sementsov-Ogievskiy wrote:
> We do have this marker for blk_co_flush function declaration in
> block/block-backend.c. Add it in header too.
Maybe:
We alreaddy have this marker for the blk_co_flush function declaration
in block/block-backend.c. A
Hi
On Thu, Oct 7, 2021 at 5:11 PM Paolo Bonzini wrote:
> OSS is a kernel API, so the option should not be needed. The library
> is used on NetBSD, where OSS is emulated, so keep the variable.
>
> Cc: Gerd Hoffman
> Cc: Volker Rümelin
> Signed-off-by: Paolo Bonzini
>
Not just NetBSD. You cou
On Thu, Oct 07, 2021 at 07:52:43PM +0200, Vladimir Sementsov-Ogievskiy wrote:
> Make bytes argument int64_t to be consistent with modern block-layer.
> Callers should be OK with it as type becomes wider.
>
> What is inside functions?
>
> - Conversion from int64_t to size_t. Still, we
> can't have
On Thu, Oct 7, 2021 at 5:09 PM Paolo Bonzini wrote:
> Ever since winwaveaudio was removed in 2015, CONFIG_AUDIO_WIN_INT
> is only set if dsound is in use, so use CONFIG_AUDIO_DSOUND directly.
>
> Cc: Gerd Hoffman
> Cc: Volker Rümelin
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lu
On Thu, Oct 7, 2021 at 5:20 PM Paolo Bonzini wrote:
> Pass CONFIG_FUZZ via host_kconfig, and use it to select the
> sparse-mem device.
>
> Cc: Alexander Oleinik
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> Kconfig.host | 4
> hw/mem/Kconfig | 3 ++
On Thu, Oct 7, 2021 at 5:17 PM Paolo Bonzini wrote:
> Cc: Stefan Hajnoczi
> Signed-off-by: Paolo Bonzini
>
lgtm
Reviewed-by: Marc-André Lureau
> ---
> configure | 91 +
> docs/meson.build| 2 +-
> meson.build | 51
On Thu, Oct 7, 2021 at 5:07 PM Paolo Bonzini wrote:
> This brings a change that makes audio drivers more similar to all
> other modules. All drivers are built by default, while
> --audio-drv-list only governs the default choice of the audio driver.
>
> Meson options are added to disable the driv
On Thu, Oct 7, 2021 at 5:13 PM Paolo Bonzini wrote:
> Handle the choice of audio drivers the same as all other dependencies.
>
> Cc: Gerd Hoffman
> Cc: Volker Rümelin
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
---
> configure | 39 ++
On Thu, Oct 7, 2021 at 5:14 PM Paolo Bonzini wrote:
> This is just a constant string, there is no need to pass it in
> config-host.mak.
>
> Signed-off-by: Paolo Bonzini
>
I am surprised not to find a way for meson to return it, but I am not sure
where it would fit either. compiler.get_{lib,exe}
On Thu, Oct 7, 2021 at 5:24 PM Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> configure | 3 ---
> meson.build | 1 +
> 2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/configure b/configure
> index 35e25bb960..499c84859d 10075
On Thu, Oct 7, 2021 at 5:19 PM Paolo Bonzini wrote:
> This makes the pthreads check dead in configure, so remove it
> as well.
>
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
(a shame that g_system_thread_set_name() is not exported imho)
---
> configure| 78
On Thu, Oct 7, 2021 at 5:26 PM Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> configure | 35 ---
> meson.build | 26 +++---
> meson_options.txt | 2 ++
> net/meson.build | 2
On Thu, Oct 7, 2021 at 5:09 PM Paolo Bonzini wrote:
> Add the suffix directly in trace/simple.c, so that quoting is done
> properly by Meson.
>
> Cc: Stefan Hajnoczi
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> configure | 2 --
> meson.build| 2 +-
> tr
On Thu, Oct 7, 2021 at 5:23 PM Paolo Bonzini wrote:
> Remove some special cases by moving them to Meson.
>
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> configure | 37 -
> meson.build | 22 --
> 2 files cha
Hi
On Thu, Oct 7, 2021 at 5:28 PM Paolo Bonzini wrote:
> Right now meson_options.txt lists about 90 options. Each option
> needs code in configure to parse it and pass the option down to Meson as
> a -D command-line argument; in addition the default must be duplicated
> between configure and me
On Thu, Oct 7, 2021 at 5:24 PM Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini
>
lgtm
Reviewed-by: Marc-André Lureau
> ---
> configure | 91 -
> meson.build | 45 ++
> 2 files changed, 45 insertions(+), 91 del
On Thu, Oct 7, 2021 at 5:14 PM Paolo Bonzini wrote:
> No need to pass it in config-host.mak.
>
> Signed-off-by: Paolo Bonzini
>
Or we could eventually use G_BYTE_ORDER, I guess.
Reviewed-by: Marc-André Lureau
---
> configure | 4
> meson.build | 3 ++-
> 2 files changed, 2 insertions
On Thu, Oct 7, 2021 at 5:23 PM Paolo Bonzini wrote:
> The options were deprecated in 6.0. That said, we do not really have a
> formal deprecation cycle for build-time changes, since they do not affect
> users.
>
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> config
On Thu, Oct 7, 2021 at 5:17 PM Paolo Bonzini wrote:
> Meson already has its own logic to find the "ar" binary, so remove the
> Solaris specific check.
>
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> configure | 15 ---
> 1 file changed, 15 deletions(-)
On Thu, Oct 7, 2021 at 5:25 PM Paolo Bonzini wrote:
> Options such as "--enable-capstone=git" do not make much sense when
> building
> from a tarball. Accept "internal" for consistency with the meson options.
>
> Signed-off-by: Paolo Bonzini
>
Reviewed-by: Marc-André Lureau
> ---
> configu
The results are generally 6 bit unsigned values, though
the count leading and trailing bits may produce any value
for a zero input.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 1c106bfbc3..678e7c19
For constant shifts, we can simply shift the s_mask.
For variable shifts, we know that sar does not reduce
the s_mask, which helps for sequences like
ext32s_i64 t, in
sar_i64 t, t, v
ext32s_i64 out, t
allowing the final extend to be eliminated.
Signed-off-by: Richard Henderson
Certain targets, like riscv, produce signed 32-bit results.
This can lead to lots of redundant extensions as values are
manipulated.
Begin by tracking only the obvious sign-extensions, and
converting them to simple copies when possible.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 129
This "garbage" setting pre-dates the addition of the type
changing opcodes INDEX_op_ext_i32_i64, INDEX_op_extu_i32_i64,
and INDEX_op_extr{l,h}_i64_i32.
So now we have a definitive points at which to adjust z_mask
to eliminate such bits from the 32-bit operands.
Signed-off-by: Richard Henderson
-
Rename to fold_multiply2, and handle muls2_i32, mulu2_i64,
and muls2_i64.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index d82d0f15c7..0011ac
Most of these are handled by creating a fold_const2_commutative
to handle all of the binary operators. The rest were already
handled on a case-by-case basis in the switch, and have their
own fold function in which to place the call.
We now have only one major switch on TCGOpcode.
Signed-off-by:
Pull the "op r, 0, b => movi r, 0" optimization into a function,
and use it in fold_shift.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 28 ++--
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index d1d0f3f60c..ba4a
Compute the type of the operation early.
There are at least 4 places that used a def->flags ladder
to determine the type of the operation being optimized.
There were two places that assumed !TCG_OPF_64BIT means
TCG_TYPE_I32, and so could potentially compute incorrect
results for vector operations
Move all of the known-zero optimizations into the per-opcode
functions. Use fold_masks when there is a possibility of the
result being determined, and simply set ctx->z_mask otherwise.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 545 ++---
1
Split out the conditional conversion from a more complex logical
operation to a simple NOT. Create a couple more helpers to make
this easy for the outer-most logical operations.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 154 +++--
1 file c
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index dd78982330..d2e5727662 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -875,6 +875,20 @@ static bool
Even though there is only one user, place this more complex
conversion into its own helper.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 84 --
1 file changed, 47 insertions(+), 37 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
Copy z_mask into OptContext, for writeback to the
first output within the new function.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 49 +
1 file changed, 33 insertions(+), 16 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
inde
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 48 ++--
1 file changed, 30 insertions(+), 18 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 8229a67192..6020a678ab 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -885,6 +885,1
The result is either 0 or 1, which means that we have
a 2 bit signed result, and thus 62 bits of sign.
For clarity, use the smask_from_zmask function.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 7
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 56 --
1 file changed, 31 insertions(+), 25 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 1cec06aa81..c8aa027a5a 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -919,6 +919
This is the final entry in the main switch that was in a
different form. After this, we have the option to convert
the switch into a function dispatch table.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 27 ++-
1 file changed
Pull the "op r, a, i => mov r, a" optimization into a function,
and use them int the outer-most logical operations.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 60 +-
1 file changed, 25 insertions(+), 35 deletions(-)
diff --git a/tcg/opt
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 6020a678ab..dd78982330 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -880,6 +880,18 @@ static bool fold_c
Sign repetitions are perforce all identical, whether they are 1 or 0.
Bitwise operations preserve the relative quantity of the repetitions.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 29 +
1 file changed, 29 insertions(+
Split out a whole bunch of placeholder functions, which are
currently identical. That won't last as more code gets moved.
Use CASE_32_64_VEC for some logical operators that previously
missed the addition of vectors.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 254
Two simplifications that were missing from before the split
to fold functions, and are now easy to provide.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index ad94f246ff..9c11f83a4a 100644
--- a/tcg/opti
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 37 +
1 file changed, 21 insertions(+), 16 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 6bb5e19e55..01a0925c89 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -891,6 +891,24 @@ static
This will allow callers to tail call to these functions
and return true indicating processing complete.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optim
Pull the "op r, a, 0 => movi r, 0" optimization into a function,
and use it in the outer opcode fold functions.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 32 +++-
1 file changed, 15 insertions(+), 17 deletions(-)
diff
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index d2e5727662..7a7c3e25c5 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
Rather than try to keep these up-to-date across folding,
re-read nb_oargs at the end, after re-reading the opcode.
A couple of asserts need dropping, but that will take care
of itself as we split the function further.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 14 --
1 fi
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 33 +++--
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 266787957f..786d46ed66 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -714,6 +714,22 @@ static boo
Rename to fold_addsub2.
Use Int128 to implement the wider operation.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 64 +-
1 file changed, 43 insertions(+), 21 deletions(-)
diff --git a/tcg/optimize.c b/
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index c8aa027a5a..8229a67192 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -885,6 +885,25 @@ stat
Pull the "op r, a, a => mov r, a" optimization into a function,
and use it in the outer opcode fold functions.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 39 ---
1 file changed, 24 insertions(+), 15 deletions(-)
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