Re: [PATCH v4 10/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 8:08 AM, Yang Zhong wrote: > On Tue, Sep 14, 2021 at 08:38:59AM +0200, Philippe Mathieu-Daudé wrote: >> On 7/19/21 1:21 PM, Yang Zhong wrote: >>> From: Sean Christopherson >>> >>> On real hardware, on systems that supports SGX Launch Control, those >>> MSRs are initialized to digest of

Re: [PATCH v2 1/3] monitor: Add HMP and QMP interfaces

2021-09-15 Thread Yang Zhong
On Mon, Sep 13, 2021 at 02:24:56PM +0100, Daniel P. Berrangé wrote: > On Mon, Sep 13, 2021 at 08:52:28PM +0800, Yang Zhong wrote: > > On Mon, Sep 13, 2021 at 01:56:13PM +0100, Daniel P. Berrangé wrote: > > > On Mon, Sep 13, 2021 at 02:48:37PM +0200, Paolo Bonzini wrote: > > > > On 13/09/21 11:35, D

Re: [RFC v6] virtio/vsock: add two more queues for datagram types

2021-09-15 Thread Stefano Garzarella
On Wed, Sep 15, 2021 at 08:59:17PM -0700, Jiang Wang . wrote: On Tue, Sep 14, 2021 at 5:46 AM Stefan Hajnoczi wrote: On Mon, Sep 13, 2021 at 10:18:43PM +, Jiang Wang wrote: > Datagram sockets are connectionless and unreliable. > The sender does not know the capacity of the receiver > and m

Re: [PATCH v4 10/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs

2021-09-15 Thread Yang Zhong
On Tue, Sep 14, 2021 at 08:38:59AM +0200, Philippe Mathieu-Daudé wrote: > On 7/19/21 1:21 PM, Yang Zhong wrote: > > From: Sean Christopherson > > > > On real hardware, on systems that supports SGX Launch Control, those > > MSRs are initialized to digest of Intel's signing key; on systems that > >

[PULL 5/6] ui/gtk-egl: Wait for the draw signal for dmabuf blobs

2021-09-15 Thread Gerd Hoffmann
From: Vivek Kasireddy Instead of immediately drawing and submitting, queue and wait for the draw signal if the dmabuf submitted is a blob. Cc: Gerd Hoffmann Reviewed-by: Gerd Hoffmann Signed-off-by: Vivek Kasireddy Message-Id: <20210914211837.3229977-5-vivek.kasire...@intel.com> Signed-off-by

[PULL 4/6] ui: Create sync objects and fences only for blobs

2021-09-15 Thread Gerd Hoffmann
From: Vivek Kasireddy Create sync objects and fences only for dmabufs that are blobs. Once a fence is created (after glFlush) and is signalled, graphic_hw_gl_flushed() will be called and virtio-gpu cmd processing will be resumed. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy Message-Id: <20

[PULL 6/6] virtio-gpu: Add gl_flushed callback

2021-09-15 Thread Gerd Hoffmann
From: Vivek Kasireddy Adding this callback provides a way to resume the processing of cmds in fenceq and cmdq that were not processed because the UI was waiting on a fence and blocked cmd processing. Cc: Gerd Hoffmann Reviewed-by: Gerd Hoffmann Signed-off-by: Vivek Kasireddy Message-Id: <2021

[PULL 3/6] ui/egl: Add egl helpers to help with synchronization

2021-09-15 Thread Gerd Hoffmann
From: Vivek Kasireddy These egl helpers would be used for creating and waiting on a sync object. Cc: Gerd Hoffmann Reviewed-by: Gerd Hoffmann Signed-off-by: Vivek Kasireddy Message-Id: <20210914211837.3229977-3-vivek.kasire...@intel.com> Signed-off-by: Gerd Hoffmann --- include/ui/console.h

[PULL 2/6] ui/gtk: Create a common release_dmabuf helper

2021-09-15 Thread Gerd Hoffmann
From: Vivek Kasireddy Since the texture release mechanism is same for both gtk-egl and gtk-glarea, move the helper from gtk-egl to common gtk code so that it can be shared by both gtk backends. Cc: Gerd Hoffmann Reviewed-by: Gerd Hoffmann Signed-off-by: Vivek Kasireddy Message-Id: <2021091421

[PULL 1/6] qxl: fix pre-save logic

2021-09-15 Thread Gerd Hoffmann
Oops. Logic is backwards. Fixes: 39b8a183e2f3 ("qxl: remove assert in qxl_pre_save.") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/610 Resolves: https://bugzilla.redhat.com//show_bug.cgi?id=2002907 Signed-off-by: Gerd Hoffmann Reviewed-by: Daniel P. Berrangé Reviewed-by: Marc-André L

[PULL 0/6] Vga 20210916 patches

2021-09-15 Thread Gerd Hoffmann
The following changes since commit 831aaf24967a49d7750090b9dcfd6bf356f16529: Merge remote-tracking branch 'remotes/marcandre/tags/misc-pull-request' into staging (2021-09-14 18:14:56 +0100) are available in the Git repository at: git://git.kraxel.org/qemu tags/vga-20210916-pull-request for

[PATCH] MAINTAINERS: add myself as a reviewer for KVM guest cpu related changes

2021-09-15 Thread Ani Sinha
I have looked into cpu features for KVM guests as a part of a different project. Would be interested to follow and review patches in this space. Signed-off-by: Ani Sinha --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6c20634d63..3a3167c499 100

Re: [PATCH v5 02/16] tcg/s390x: Rename from tcg/s390

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/15/21 11:31 PM, Richard Henderson wrote: > This emphasizes that we don't support s390, only 64-bit s390x hosts. > > Reviewed-by: David Hildenbrand > Signed-off-by: Richard Henderson > --- > meson.build | 2 -- > tcg/{s390 => s390x}/tcg-target-con-set.h | 0 > t

Re: [PATCH v5 02/16] tcg/s390x: Rename from tcg/s390

2021-09-15 Thread Thomas Huth
On 15/09/2021 23.31, Richard Henderson wrote: This emphasizes that we don't support s390, only 64-bit s390x hosts. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- meson.build | 2 -- tcg/{s390 => s390x}/tcg-target-con-set.h | 0 tcg/{s390 =>

Re: [PATCH v1 1/1] hw/riscv: opentitan: Correct the USB Dev address

2021-09-15 Thread Bin Meng
On Thu, Sep 16, 2021 at 12:37 PM Alistair Francis wrote: > > From: Alistair Francis > > Signed-off-by: Alistair Francis > --- > hw/riscv/opentitan.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng

Re: [qemu-web PATCH] Gemfile: Add webrick bundle dependency

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 6:55 AM, Thomas Huth wrote: > On 16/09/2021 06.24, Philippe Mathieu-Daudé wrote: >> On 9/16/21 12:27 AM, Paolo Bonzini wrote: >>> On 14/09/21 10:21, Daniel P. Berrangé wrote: Yes, this is needed to fix Ruby 3. I didn't propose it myself as I'm not sure if it in turn breaks

Re: [qemu-web PATCH] Gemfile: Add webrick bundle dependency

2021-09-15 Thread Thomas Huth
On 16/09/2021 06.24, Philippe Mathieu-Daudé wrote: On 9/16/21 12:27 AM, Paolo Bonzini wrote: On 14/09/21 10:21, Daniel P. Berrangé wrote: Yes, this is needed to fix Ruby 3. I didn't propose it myself as I'm not sure if it in turn breaks people with Ruby 2.x ? Does it pass the GitLab CI (whic

Re: [PATCH v3 13/16] iotests/linters: Add entry point for Python CI linters

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 6:09 AM, John Snow wrote: > Add a main() function to linters.py so that the Python CI infrastructure > has something it can run. > > Now, linters.py represents an invocation of the linting scripts that > more resembles a "normal" execution of pylint/mypy, like you'd expect to > use if '

Re: [PATCH v11 05/10] arm/hvf: Add a WFI handler

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/15/21 8:10 PM, Alexander Graf wrote: > From: Peter Collingbourne > > Sleep on WFI until the VTIMER is due but allow ourselves to be woken > up on IPI. > > In this implementation IPI is blocked on the CPU thread at startup and > pselect() is used to atomically unblock the signal and begin sl

Re: [ RFC v2 2/9] target/riscv: pmu: Rename the counters extension to pmu

2021-09-15 Thread Alistair Francis
On Fri, Sep 10, 2021 at 6:28 AM Atish Patra wrote: > > The PMU counters are supported via cpu config "Counters" which doesn't > indicate the correct purpose of those counters. > > Rename the config property to pmu to indicate that these counters > are performance monitoring counters. This aligns w

Re: [PATCH] target/riscv: csr: Rename HCOUNTEREN_CY and friends

2021-09-15 Thread Alistair Francis
On Wed, Sep 15, 2021 at 6:47 PM Bin Meng wrote: > > The macro name HCOUNTEREN_CY suggests it is for CSR HCOUNTEREN, but > in fact it applies to M-mode and S-mode CSR too. Rename these macros > to have the COUNTEREN_ prefix. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair >

Re: [PATCH] hw/intc: GIC maintenance interrupt not triggered

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/15/21 10:58 PM, Shashi Mallela wrote: > During sbsa acs level 3 testing,it is seen that the GIC > maintenance interrupts are not triggered and the related test > cases failed.On debugging the cause,found that the value of > MISR register (from maintenance_interrupt_state()) was being > passed

[PATCH v1 1/1] hw/riscv: opentitan: Correct the USB Dev address

2021-09-15 Thread Alistair Francis
From: Alistair Francis Signed-off-by: Alistair Francis --- hw/riscv/opentitan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 36a41c8b5b..d38c43abc1 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -39,12 +39

Re: [PATCH v3 04/16] iotests/migrate-bitmaps-test: delint

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 6:09 AM, John Snow wrote: > Mostly uninteresting stuff. Move the test injections under a function > named main() so that the variables used during that process aren't in > the global scope. > > Signed-off-by: John Snow > --- > tests/qemu-iotests/tests/migrate-bitmaps-test | 50 +++

Re: [PATCH v3 02/16] iotests/mirror-top-perms: Adjust imports

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 6:09 AM, John Snow wrote: > We need to import things from the qemu namespace; importing the > namespace alone doesn't bring the submodules with it -- unless someone > else (like iotests.py) imports them too. > > Adjust the imports. > > Signed-off-by: John Snow > --- > tests/qemu-iote

Re: [PATCH v3 08/16] iotests/297: Create main() function

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 6:09 AM, John Snow wrote: > Instead of running "run_linters" directly, create a main() function that > will be responsible for environment setup, leaving run_linters() > responsible only for execution of the linters. > > (That environment setup will be moved over in forthcoming commits.

[PATCH v3 16/16] iotests/linters: check mypy files all at once

2021-09-15 Thread John Snow
We can circumvent the '__main__' redefinition problem by passing --scripts-are-modules. Take mypy out of the loop per-filename and check everything in one go: it's quite a bit faster. Signed-off-by: John Snow --- tests/qemu-iotests/linters.py | 62 --- 1 file chan

[PATCH v3 14/16] iotests/linters: Add workaround for mypy bug #9852

2021-09-15 Thread John Snow
This one is insidious: if you use the invocation "from {namespace} import {subpackage}" as mirror-top-perms does, mypy will fail on every-other invocation *if* the package being imported is a package. Now, I could just edit mirror-top-perms to avoid this invocation, but since I tripped on a landmi

Re: [qemu-web PATCH] Gemfile: Add webrick bundle dependency

2021-09-15 Thread Philippe Mathieu-Daudé
On 9/16/21 12:27 AM, Paolo Bonzini wrote: > On 14/09/21 10:21, Daniel P. Berrangé wrote: >> Yes, this is needed to fix Ruby 3. >> >> I didn't propose it myself as I'm not sure if it in turn breaks people >> with Ruby 2.x ? > > Does it pass the GitLab CI (which uses 2.5)? Yes: https://gitlab.com/p

[PATCH v3 09/16] iotests/297: Separate environment setup from test execution

2021-09-15 Thread John Snow
Move environment setup into main(), leaving pure test execution behind in run_linters(). Signed-off-by: John Snow Reviewed-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/297 | 36 +--- 1 file changed, 21 insertions(+), 15 deletions(-) diff --git a/tests

[PATCH v3 15/16] python: Add iotest linters to test suite

2021-09-15 Thread John Snow
As a convenience, since iotests is an extremely prominent user of the qemu.qmp and qemu.machine packages and already implements a linting regime, run those tests as well so that it's very hard to miss regressions caused by changes to the python library. Signed-off-by: John Snow --- python/tests/

[PATCH v3 07/16] iotests/297: Don't rely on distro-specific linter binaries

2021-09-15 Thread John Snow
'pylint-3' is another Fedora-ism. Use "python3 -m pylint" or "python3 -m mypy" to access these scripts instead. This style of invocation will prefer the "correct" tool when run in a virtual environment. Note that we still check for "pylint-3" before the test begins -- this check is now "overly str

[PATCH v3 13/16] iotests/linters: Add entry point for Python CI linters

2021-09-15 Thread John Snow
Add a main() function to linters.py so that the Python CI infrastructure has something it can run. Now, linters.py represents an invocation of the linting scripts that more resembles a "normal" execution of pylint/mypy, like you'd expect to use if 'qemu' was a bona-fide package you obtained from P

[PATCH v3 08/16] iotests/297: Create main() function

2021-09-15 Thread John Snow
Instead of running "run_linters" directly, create a main() function that will be responsible for environment setup, leaving run_linters() responsible only for execution of the linters. (That environment setup will be moved over in forthcoming commits.) Signed-off-by: John Snow Reviewed-by: Vladi

[PATCH v3 06/16] iotests/297: Add get_files() function

2021-09-15 Thread John Snow
Split out file discovery into its own method to begin separating out the "environment setup" and "test execution" phases. Signed-off-by: John Snow --- tests/qemu-iotests/297 | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/tests/qemu-iotests/297 b/tests/qemu-iotes

[PATCH v3 12/16] iotests/297: split linters.py off from 297

2021-09-15 Thread John Snow
Split the linter execution itself out from 297, leaving just environment setup in 297. This is done so that non-iotest code can invoke the linters without needing to worry about imports of unpackaged iotest code. Eventually, it should be possible to replace linters.py with mypy.ini and pylintrc fi

[PATCH v3 10/16] iotests/297: Add 'directory' argument to run_linters

2021-09-15 Thread John Snow
Allow run_linters to work well if it's executed from a different directory. Signed-off-by: John Snow Reviewed-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/297 | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/qemu-iotests/297 b/tests/qemu-iotests/297 index 08d2b87108..e05c

[PATCH v3 05/16] iotests/297: modify is_python_file to work from any CWD

2021-09-15 Thread John Snow
Add a directory argument to is_python_file to allow it to work correctly no matter what CWD we happen to run it from. This is done in anticipation of running the iotests from another directory (./python/). Signed-off-by: John Snow --- tests/qemu-iotests/297 | 8 +--- 1 file changed, 5 insert

[PATCH v3 11/16] iotests/297: return error code from run_linters()

2021-09-15 Thread John Snow
This turns run_linters() into a bit of a hybrid test; returning non-zero on failed execution while also printing diffable information. This is done for the benefit of the avocado simple test runner, which will soon be attempting to execute this test from a different environment. (Note: universal_n

[PATCH v3 04/16] iotests/migrate-bitmaps-test: delint

2021-09-15 Thread John Snow
Mostly uninteresting stuff. Move the test injections under a function named main() so that the variables used during that process aren't in the global scope. Signed-off-by: John Snow --- tests/qemu-iotests/tests/migrate-bitmaps-test | 50 +++ 1 file changed, 28 insertions(+), 22

[PATCH v3 02/16] iotests/mirror-top-perms: Adjust imports

2021-09-15 Thread John Snow
We need to import things from the qemu namespace; importing the namespace alone doesn't bring the submodules with it -- unless someone else (like iotests.py) imports them too. Adjust the imports. Signed-off-by: John Snow --- tests/qemu-iotests/tests/mirror-top-perms | 7 --- 1 file changed,

[PATCH v3 01/16] python: Update for pylint 2.10

2021-09-15 Thread John Snow
A few new annoyances. Of note is the new warning for an unspecified encoding when opening a text file, which actually does indicate a potentially real problem; see https://www.python.org/dev/peps/pep-0597/#motivation Use LC_CTYPE to determine an encoding to use for interpreting QEMU's terminal out

[PATCH v3 03/16] iotests/migrate-bitmaps-postcopy-test: declare instance variables

2021-09-15 Thread John Snow
Signed-off-by: John Snow --- tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test b/tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test index 00ebb5c251..9c00ae61c8 100755 --- a/tes

[PATCH v3 00/16] python/iotests: Run iotest linters during Python CI

2021-09-15 Thread John Snow
GitLab: https://gitlab.com/jsnow/qemu/-/commits/python-package-iotest CI: https://gitlab.com/jsnow/qemu/-/pipelines/371611883 Based-On: <20210915175318.853225-1-hre...@redhat.com> "[PULL 00/32] Block patches" Since iotests are such a heavy and prominent user of the Python qemu.qmp and qe

Re: Re: [RFC v6] virtio/vsock: add two more queues for datagram types

2021-09-15 Thread Jiang Wang .
On Tue, Sep 14, 2021 at 5:46 AM Stefan Hajnoczi wrote: > > On Mon, Sep 13, 2021 at 10:18:43PM +, Jiang Wang wrote: > > Datagram sockets are connectionless and unreliable. > > The sender does not know the capacity of the receiver > > and may send more packets than the receiver can handle. > > >

Re: [PATCH v4 04/33] i386: Add 'sgx-epc' device to expose EPC sections to guest

2021-09-15 Thread Yang Zhong
On Tue, Sep 14, 2021 at 08:36:24AM +0200, Philippe Mathieu-Daudé wrote: > On 7/19/21 1:21 PM, Yang Zhong wrote: > > From: Sean Christopherson > > > > SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be > > realized prior to realizing the vCPUs themselves, which occurs long > > befo

[PATCH v7 6/7] spapr_numa.c: FORM2 NUMA affinity support

2021-09-15 Thread Daniel Henrique Barboza
The main feature of FORM2 affinity support is the separation of NUMA distances from ibm,associativity information. This allows for a more flexible and straightforward NUMA distance assignment without relying on complex associations between several levels of NUMA via ibm,associativity matches. Anoth

[PATCH v7 4/7] spapr_numa.c: rename numa_assoc_array to FORM1_assoc_array

2021-09-15 Thread Daniel Henrique Barboza
Introducing a new NUMA affinity, FORM2, requires a new mechanism to switch between affinity modes after CAS. Also, we want FORM2 data structures and functions to be completely separated from the existing FORM1 code, allowing us to avoid adding new code that inherits the existing complexity of FORM1

[PATCH v7 7/7] spapr_numa.c: handle auto NUMA node with no distance info

2021-09-15 Thread Daniel Henrique Barboza
numa_complete_configuration() in hw/core/numa.c always adds a NUMA node for the pSeries machine if none was specified, but without node distance information for the single node created. This added node is also not accounted for in numa_state->num_nodes, which returns zero. NUMA FORM1 affinity code

[PATCH v7 5/7] spapr: move FORM1 verifications to post CAS

2021-09-15 Thread Daniel Henrique Barboza
FORM2 NUMA affinity is prepared to deal with empty (memory/cpu less) NUMA nodes. This is used by the DAX KMEM driver to locate a PAPR SCM device that has a different latency than the original NUMA node from the regular memory. FORM2 is also able to deal with asymmetric NUMA distances gracefully, s

[PATCH v7 3/7] spapr_numa.c: parametrize FORM1 macros

2021-09-15 Thread Daniel Henrique Barboza
The next preliminary step to introduce NUMA FORM2 affinity is to make the existing code independent of FORM1 macros and values, i.e. MAX_DISTANCE_REF_POINTS, NUMA_ASSOC_SIZE and VCPU_ASSOC_SIZE. This patch accomplishes that by doing the following: - move the NUMA related macros from spapr.h to spa

Re: [PATCH v6 3/6] spapr: introduce spapr_numa_associativity_reset()

2021-09-15 Thread Daniel Henrique Barboza
Greg, On 9/14/21 16:58, Daniel Henrique Barboza wrote: On 9/14/21 08:55, Greg Kurz wrote: On Fri, 10 Sep 2021 16:55:36 -0300 Daniel Henrique Barboza wrote: [...]   } @@ -167,6 +167,11 @@ static void spapr_numa_FORM1_affinity_init(SpaprMachineState *spapr,   int nb_numa_nodes

[PATCH v7 1/7] spapr_numa.c: split FORM1 code into helpers

2021-09-15 Thread Daniel Henrique Barboza
The upcoming FORM2 NUMA affinity will support asymmetric NUMA topologies and doesn't need be concerned with all the legacy support for older pseries FORM1 guests. We're also not going to calculate associativity domains based on numa distance (via spapr_numa_define_associativity_domains) since the

[PATCH v7 2/7] spapr_numa.c: scrap 'legacy_numa' concept

2021-09-15 Thread Daniel Henrique Barboza
When first introduced, 'legacy_numa' was a way to refer to guests that either wouldn't be affected by associativity domain calculations, namely the ones with only 1 NUMA node, and pre 5.2 guests that shouldn't be affected by it because it would be an userspace change. Calling these cases 'legacy_nu

[PATCH v7 0/7] pSeries FORM2 affinity support

2021-09-15 Thread Daniel Henrique Barboza
Hi, In this version the biggest change is the end of the numa_assoc_array struct in the machine state. The write_dt() functions are now retrieving the current NUMA associativity array by checking CAS first. This change allowed for several simplifications, e.g. we don't need a reset() function to

Re: [qemu-web PATCH] Gemfile: Add webrick bundle dependency

2021-09-15 Thread Paolo Bonzini
On 14/09/21 10:21, Daniel P. Berrangé wrote: Yes, this is needed to fix Ruby 3. I didn't propose it myself as I'm not sure if it in turn breaks people with Ruby 2.x ? Does it pass the GitLab CI (which uses 2.5)? Paolo

Re: [PATCH] target/i386: Include 'hw/i386/apic.h' locally

2021-09-15 Thread Paolo Bonzini
On 02/09/21 17:22, Philippe Mathieu-Daudé wrote: Instead of including a sysemu-specific header in "cpu.h" (which is shared with user-mode emulations), include it locally when required. Signed-off-by: Philippe Mathieu-Daudé --- Based-on: <20210902151715.383678-1-f4...@amsat.org> "accel/tcg: Rest

Re: [PULL 0/4] Update meson version

2021-09-15 Thread Paolo Bonzini
On 15/09/21 19:34, Peter Maydell wrote: Paolo Bonzini (4): meson: bump submodule to 0.58.2 meson: switch minimum meson version to 0.58.2 hexagon: use env keyword argument to pass PYTHONPATH target/xtensa: list cores in a text file Was this intended to be a pull reques

Re: [PATCH] qemu-storage-daemon: Only display FUSE help when FUSE is built-in

2021-09-15 Thread Philippe Mathieu-Daudé
ping & Cc'ing qemu-trivial@ (reviewed twice) ... On 8/16/21 8:04 PM, Philippe Mathieu-Daudé wrote: > When configuring QEMU with --disable-fuse, the qemu-storage-daemon > still reports FUSE command line options in its help: > > $ qemu-storage-daemon -h > Usage: qemu-storage-daemon [options] >

[PATCH v5 13/16] tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec

2021-09-15 Thread Richard Henderson
Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.h | 2 +- tcg/s390x/tcg-target.c.inc | 25 + 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index d7d204b782..a79f

[PATCH v5 11/16] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec

2021-09-15 Thread Richard Henderson
Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.h | 2 +- tcg/s390x/tcg-target.c.inc | 7 +++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index a42074e451..1c581a2f60 100644 --- a/t

[PATCH v5 14/16] tcg/s390x: Implement TCG_TARGET_HAS_sat_vec

2021-09-15 Thread Richard Henderson
The unsigned saturations are handled via generic code using min/max. The signed saturations are expanded using double-sized arithmetic and a saturating pack. Since all operations are done via expansion, do not actually set TCG_TARGET_HAS_sat_vec. Signed-off-by: Richard Henderson --- tcg/s390x/

[PATCH v5 15/16] tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec

2021-09-15 Thread Richard Henderson
Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 2 +- tcg/s390x/tcg-target.c.inc | 20 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-se

[PATCH v5 03/16] tcg/s390x: Change FACILITY representation

2021-09-15 Thread Richard Henderson
We will shortly need to be able to check facilities beyond the first 64. Instead of explicitly masking against s390_facilities, create a HAVE_FACILITY macro that indexes an array. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- v2: Change name to HAVE_FACILITY (david) --- t

[PATCH v5 09/16] tcg/s390x: Implement minimal vector operations

2021-09-15 Thread Richard Henderson
Implementing add, sub, and, or, xor as the minimal set. This allows us to actually enable vectors in query_s390_facilities. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 154 - 1 file changed, 150 insertions(

[PATCH v5 02/16] tcg/s390x: Rename from tcg/s390

2021-09-15 Thread Richard Henderson
This emphasizes that we don't support s390, only 64-bit s390x hosts. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- meson.build | 2 -- tcg/{s390 => s390x}/tcg-target-con-set.h | 0 tcg/{s390 => s390x}/tcg-target-con-str.h | 0 tcg/{s390 => s390

[PATCH v5 16/16] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec

2021-09-15 Thread Richard Henderson
This is via expansion; don't actually set TCG_TARGET_HAS_cmpsel_vec. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 5530c974

[PATCH v5 07/16] tcg/s390x: Implement tcg_out_mov for vector types

2021-09-15 Thread Richard Henderson
Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 72 +++--- 1 file changed, 68 insertions(+), 4 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index ea04aefe98..76061bfd80 100644 -

[PATCH v5 12/16] tcg/s390x: Implement vector shift operations

2021-09-15 Thread Richard Henderson
Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 12 ++--- tcg/s390x/tcg-target.c.inc | 93 +- 3 files changed, 99 insertions(+), 7 deletions(-) diff --git a/tcg/s390x/

[PATCH v5 00/16] tcg/s390x: host vector support

2021-09-15 Thread Richard Henderson
Changes for v5: * Add is_{general,vector}_reg predicates. * Use 0xf not 15 for masking. r~ Richard Henderson (16): tcg: Expand usadd/ussub with umin/umax tcg/s390x: Rename from tcg/s390 tcg/s390x: Change FACILITY representation tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TC

[PATCH v5 05/16] tcg/s390x: Add host vector framework

2021-09-15 Thread Richard Henderson
Add registers and function stubs. The functionality is disabled via squashing s390_facilities[2] to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson ---

[PATCH v5 10/16] tcg/s390x: Implement andc, orc, abs, neg, not vector operations

2021-09-15 Thread Richard Henderson
These logical and arithmetic operations are optional but trivial. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 11 ++- tcg/s390x/tcg-target.c.inc | 32 3 files changed, 39 insertions(+),

[PATCH v5 06/16] tcg/s390x: Implement tcg_out_ld/st for vector types

2021-09-15 Thread Richard Henderson
Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 132 + 1 file changed, 120 insertions(+), 12 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index c438751834..ea04aefe98 100644 --- a/tcg/s390x/tcg-target.c.in

[PATCH v5 08/16] tcg/s390x: Implement tcg_out_dup*_vec

2021-09-15 Thread Richard Henderson
Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 122 - 1 file changed, 119 insertions(+), 3 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 76061bfd80..b9de4dc821 100644 --- a/tcg/s390x/tcg-target.c.inc

[PATCH v5 04/16] tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg

2021-09-15 Thread Richard Henderson
They are rightly values in the same enumeration. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.h | 28 +++- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 18d

[PATCH v5 01/16] tcg: Expand usadd/ussub with umin/umax

2021-09-15 Thread Richard Henderson
For usadd, we only have to consider overflow. Since ~B + B == -1, the maximum value for A that saturates is ~B. For ussub, we only have to consider underflow. The minimum value that saturates to 0 from A - B is B. Signed-off-by: Richard Henderson --- tcg/tcg-op-vec.c | 37

[PATCH] hw/intc: GIC maintenance interrupt not triggered

2021-09-15 Thread Shashi Mallela
During sbsa acs level 3 testing,it is seen that the GIC maintenance interrupts are not triggered and the related test cases failed.On debugging the cause,found that the value of MISR register (from maintenance_interrupt_state()) was being passed to qemu_set_irq() as level.Updated logic to set level

Re: [PATCH v2 3/3] qapi: deprecate drive-backup

2021-09-15 Thread Markus Armbruster
Markus Armbruster writes: > Vladimir Sementsov-Ogievskiy writes: > >> 08.06.2021 14:12, Markus Armbruster wrote: >>> Vladimir Sementsov-Ogievskiy writes: >>> >>> [...] >>> TODO: We also need to deprecate drive-backup transaction action.. But union members in QAPI doesn't support 'de

[PATCH RFC 4/5] qapi: Implement deprecated-input={reject, crash} for enum values

2021-09-15 Thread Markus Armbruster
This copies the code implementing the policy from qapi/qmp-dispatch.c to qapi/qobject-input-visitor.c. I hope to avoid that in a future revision. Signed-off-by: Markus Armbruster --- qapi/compat.json | 3 ++- include/qapi/util.h| 6 +- qapi/qapi-visit-core.c | 18 +++

[PATCH RFC 3/5] qapi: Move compat policy from QObject to generic visitor

2021-09-15 Thread Markus Armbruster
The next commit needs to access compat policy from the generic visitor core. Move it there from qobject input and output visitor. Signed-off-by: Markus Armbruster --- include/qapi/qobject-input-visitor.h | 4 include/qapi/qobject-output-visitor.h | 4 include/qapi/visitor-impl.h

[PATCH RFC 2/5] qapi: Add feature flags to enum members

2021-09-15 Thread Markus Armbruster
This is quite similar to commit 84ab008687 "qapi: Add feature flags to struct members", only for enums instead of structs. Signed-off-by: Markus Armbruster --- docs/devel/qapi-code-gen.rst | 4 +++- qapi/compat.json | 2 ++ qapi/introspect.json

[PATCH RFC 5/5] block: Deprecate transaction type drive-backup

2021-09-15 Thread Markus Armbruster
Several moons ago, Vladimir posted Subject: [PATCH v2 3/3] qapi: deprecate drive-backup Date: Wed, 5 May 2021 16:58:03 +0300 Message-Id: <20210505135803.67896-4-vsement...@virtuozzo.com> https://lists.gnu.org/archive/html/qemu-devel/2021-05/msg01394.html with this TODO: We a

[PATCH RFC 1/5] qapi: Enable enum member introspection to show more than name

2021-09-15 Thread Markus Armbruster
The next commit will add feature flags to enum members. There's a problem, though: query-qmp-schema shows an enum type's members as an array of member names (SchemaInfoEnum member @values). If it showed an array of objects with a name member, we could simply add more members to these objects. Si

[PATCH RFC 0/5] Subject: [PATCH RFC 0/5] qapi: Add feature flags to enum members

2021-09-15 Thread Markus Armbruster
PATCH 1+2 add feature flags to enum members. Awkward due to an introspection design mistake; see PATCH 1 for details. Feedback welcome, in particular from management application guys. PATCH 3+4 implement policy deprecated-input={reject,crash} for enum values. Policy deprecated-output=hide is no

Re: [PATCH RFC v2 04/16] vfio-user: connect vfio proxy to remote server

2021-09-15 Thread John Johnson
> On Sep 15, 2021, at 6:04 AM, Stefan Hajnoczi wrote: > > On Wed, Sep 15, 2021 at 12:21:10AM +, John Johnson wrote: >> >> >>> On Sep 14, 2021, at 6:06 AM, Stefan Hajnoczi wrote: >>> >>> On Mon, Sep 13, 2021 at 05:23:33PM +, John Johnson wrote: >> On Sep 9, 2021, at 10:25 PM, Joh

[PATCH v11 07/10] hvf: arm: Implement PSCI handling

2021-09-15 Thread Alexander Graf
We need to handle PSCI calls. Most of the TCG code works for us, but we can simplify it to only handle aa64 mode and we need to handle SUSPEND differently. This patch takes the TCG code as template and duplicates it in HVF. To tell the guest that we support PSCI 0.2 now, update the check in arm_c

[PATCH v11 08/10] arm: Add Hypervisor.framework build target

2021-09-15 Thread Alexander Graf
Now that we have all logic in place that we need to handle Hypervisor.framework on Apple Silicon systems, let's add CONFIG_HVF for aarch64 as well so that we can build it. Signed-off-by: Alexander Graf Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov (x86 only) Reviewed-by: Peter Maydell

[PATCH v11 00/10] hvf: Implement Apple Silicon Support

2021-09-15 Thread Alexander Graf
Now that Apple Silicon is widely available, people are obviously excited to try and run virtualized workloads on them, such as Linux and Windows. This patch set implements a fully functional version to get the ball going on that. With this applied, I can successfully run both Linux and Windows as

Re: [PATCH v4 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass

2021-09-15 Thread Richard Henderson
On 9/12/21 10:27 AM, Philippe Mathieu-Daudé wrote: Philippe Mathieu-Daudé (30): accel/tcg: Restrict cpu_handle_halt() to sysemu hw/core: Restrict cpu_has_work() to sysemu hw/core: Un-inline cpu_has_work() sysemu: Introduce AccelOpsClass::has_work() accel/kvm: Implement AccelOpsClas

[PULL 32/32] qemu-img: Add -F shorthand to convert

2021-09-15 Thread Hanna Reitz
From: Eric Blake Although we have long supported 'qemu-img convert -o backing_file=foo,backing_fmt=bar', the fact that we have a shortcut -B for backing_file but none for backing_fmt has made it more likely that users accidentally run into: qemu-img: warning: Deprecated use of backing file witho

[PATCH v11 09/10] hvf: arm: Add rudimentary PMC support

2021-09-15 Thread Alexander Graf
We can expose cycle counters on the PMU easily. To be as compatible as possible, let's do so, but make sure we don't expose any other architectural counters that we can not model yet. This allows OSs to work that require PMU support. Signed-off-by: Alexander Graf --- target/arm/hvf/hvf.c | 179

[PULL 30/32] qcow2-refcount: check_refcounts_l1(): check reserved bits

2021-09-15 Thread Hanna Reitz
From: Vladimir Sementsov-Ogievskiy Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Eric Blake Tested-by: Kirill Tkhai Reviewed-by: Hanna Reitz Message-Id: <20210914122454.141075-10-vsement...@virtuozzo.com> Signed-off-by: Hanna Reitz --- block/qcow2.h | 1 + block/qcow2-re

[PATCH v11 06/10] hvf: arm: Implement -cpu host

2021-09-15 Thread Alexander Graf
Now that we have working system register sync, we push more target CPU properties into the virtual machine. That might be useful in some situations, but is not the typical case that users want. So let's add a -cpu host option that allows them to explicitly pass all CPU capabilities of their host C

[PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2

2021-09-15 Thread Alexander Graf
The SMCCC 1.3 spec section 5.2 says The Unknown SMC Function Identifier is a sign-extended value of (-1) that is returned in the R0, W0 or X0 registers. An implementation must return this error code when it receives: * An SMC or HVC call with an unknown Function Identifier * An SMC

[PULL 28/32] qcow2-refcount: check_refcounts_l2(): check reserved bits

2021-09-15 Thread Hanna Reitz
From: Vladimir Sementsov-Ogievskiy Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Eric Blake Tested-by: Kirill Tkhai Reviewed-by: Hanna Reitz Message-Id: <20210914122454.141075-8-vsement...@virtuozzo.com> [hreitz: Separated `type` declaration from statements] Signed-off-by: Hanna Re

[PULL 29/32] qcow2-refcount: improve style of check_refcounts_l1()

2021-09-15 Thread Hanna Reitz
From: Vladimir Sementsov-Ogievskiy - use g_autofree for l1_table - better name for size in bytes variable - reduce code blocks nesting - whitespaces, braces, newlines Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Hanna Reitz Message-Id: <20210914122454.141075-9-vsement...@virtuo

[PATCH v11 04/10] hvf: Add Apple Silicon support

2021-09-15 Thread Alexander Graf
With Apple Silicon available to the masses, it's a good time to add support for driving its virtualization extensions from QEMU. This patch adds all necessary architecture specific code to get basic VMs working, including save/restore. Known limitations: - WFI handling is missing (follows in l

[PATCH v11 02/10] hvf: Add execute to dirty log permission bitmap

2021-09-15 Thread Alexander Graf
Hvf's permission bitmap during and after dirty logging does not include the HV_MEMORY_EXEC permission. At least on Apple Silicon, this leads to instruction faults once dirty logging was enabled. Add the bit to make it work properly. Signed-off-by: Alexander Graf --- accel/hvf/hvf-accel-ops.c |

[PULL 26/32] qcow2-refcount: fix_l2_entry_by_zero(): also zero L2 entry bitmap

2021-09-15 Thread Hanna Reitz
From: Vladimir Sementsov-Ogievskiy We'll reuse the function to fix wrong L2 entry bitmap. Support it now. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Eric Blake Reviewed-by: Hanna Reitz Message-Id: <20210914122454.141075-6-vsement...@virtuozzo.com> Signed-off-by: Hanna Reitz ---

[PATCH v11 05/10] arm/hvf: Add a WFI handler

2021-09-15 Thread Alexander Graf
From: Peter Collingbourne Sleep on WFI until the VTIMER is due but allow ourselves to be woken up on IPI. In this implementation IPI is blocked on the CPU thread at startup and pselect() is used to atomically unblock the signal and begin sleeping. The signal is sent unconditionally so there's no

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