[PATCH] block/monitor: Consolidate hmp_handle_error calls to reduce redundant code

Signed-off-by: Mao Zhongyi --- block/monitor/block-hmp-cmds.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/block/monitor/block-hmp-cmds.c b/block/monitor/block-hmp-cmds.c index 3e6670c963..2ac4aedfff 100644 --- a/block/monitor/block-hmp-cmds.c +++ b/block/monit

Re: [PATCH 1/2] virtio: add a way to disable a queue

在 2021/7/30 上午3:19, Laurent Vivier 写道: Add virtio_queue_disable()/virtio_queue_enable() to disable/enable a queue by setting vring.num to 0 (or num_default). This is needed to be able to disable a guest driver from the host side I suspect this won't work correclty for vhost. And I believe w

[PULL 4/5] hw/net: e1000e: Correct the initial value of VET register

From: Christina Wang The initial value of VLAN Ether Type (VET) register is 0x8100, as per the manual and real hardware. While Linux e1000e driver always writes VET register to 0x8100, it is not always the case for everyone. Drivers relying on the reset value of VET won't be able to transmit and

[PULL 5/5] hw/net: e1000e: Don't zero out the VLAN tag in the legacy RX descriptor

From: Christina Wang In the legacy RX descriptor mode, VLAN tag was saved to d->special by e1000e_build_rx_metadata() in e1000e_write_lgcy_rx_descr(), but it was then zeroed out again at the end of the call, which is wrong. Fixes: c89d416a2b0f ("e1000e: Don't zero out buffer address in rx descri

[PULL 3/5] hw/net: e1000: Correct the initial value of VET register

From: Christina Wang The initial value of VLAN Ether Type (VET) register is 0x8100, as per the manual and real hardware. While Linux e1000 driver always writes VET register to 0x8100, it is not always the case for everyone. Drivers relying on the reset value of VET won't be able to transmit and

[PULL 2/5] hw/net/can: sja1000 fix buff2frame_bas and buff2frame_pel when dlc is out of std CAN 8 bytes

From: Pavel Pisa Problem reported by openEuler fuzz-sig group. The buff2frame_bas function (hw\net\can\can_sja1000.c) infoleak(qemu5.x~qemu6.x) or stack-overflow(qemu 4.x). Reported-by: Qiang Ning Cc: qemu-sta...@nongnu.org Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Pavel Pisa Signed

[PULL 0/5] Net patches

The following changes since commit 0c633cf0c221922a0a9f9d0b8866cbb111f5e192: Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210730' into staging (2021-07-31 21:29:57 +0100) are available in the git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request

[PULL 1/5] hw/net/vmxnet3: Do not abort QEMU if guest specified bad queue numbers

From: Thomas Huth QEMU should never terminate unexpectedly just because the guest is doing something wrong like specifying wrong queue numbers. Let's simply refuse to set the device active in this case. Buglink: https://bugs.launchpad.net/qemu/+bug/1890160 Signed-off-by: Thomas Huth Signed-off-

Re: [PATCH v4 2/3] hw/net: e1000e: Correct the initial value of VET register

在 2021/7/30 上午9:21, Bin Meng 写道: Hi Jason, On Fri, Jul 23, 2021 at 3:55 PM Bin Meng wrote: From: Christina Wang The initial value of VLAN Ether Type (VET) register is 0x8100, as per the manual and real hardware. While Linux e1000e driver always writes VET register to 0x8100, it is not alw

Re: [PATCH v2] hw/net/can: sja1000 fix buff2frame_bas and buff2frame_pel when dlc is out of std CAN 8 bytes

在 2021/7/29 下午8:48, Philippe Mathieu-Daudé 写道: "hw/net/can: sja1000 fix buff2frame* when dlc is out of std CAN 8 bytes" On 7/29/21 2:33 PM, Pavel Pisa wrote: Problem reported by openEuler fuzz-sig group. The buff2frame_bas function (hw\net\can\can_sja1000.c) infoleak(qemu5.x~qemu6.x) or stac

[PATCH-for-6.2 5/5] target/mips: Convert Vr54xx MSA* opcodes to decodetree

Convert the following Integer Multiply-Accumulate opcodes: * MSAC Multiply, negate, accumulate, and move LO * MSACHI Multiply, negate, accumulate, and move HI * MSACHIU Unsigned multiply, negate, accumulate, and move HI * MSACUUnsigned multiply, negate, accumulate, a

[PATCH-for-6.2 4/5] target/mips: Convert Vr54xx MUL* opcodes to decodetree

Convert the following Integer Multiply-Accumulate opcodes: * MULHIMultiply and move HI * MULHIU Unsigned multiply and move HI * MULS Multiply, negate, and move LO * MULSHI Multiply, negate, and move HI * MULSHIU Unsigned multiply, negate, and move HI * MULSU

[PATCH-for-6.2 1/5] target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c

Extract NEC Vr54xx helpers from op_helper.c to a new file: 'vr54xx_helper.c'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20201120210844.2625602-14-f4...@amsat.org> --- target/mips/tcg/op_helper.c | 118 -- target/mips/tcg/vr54xx

[PATCH-for-6.2 3/5] target/mips: Convert Vr54xx MACC* opcodes to decodetree

Convert the following Integer Multiply-Accumulate opcodes: * MACC Multiply, accumulate, and move LO * MACCHI Multiply, accumulate, and move HI * MACCHIU Unsigned multiply, accumulate, and move HI * MACCUUnsigned multiply, accumulate, and move LO Since all opcodes ar

[PATCH-for-6.2 2/5] target/mips: Introduce decodetree structure for NEC Vr54xx extension

The decoder is called but doesn't decode anything. This will ease reviewing the next commit. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.h| 1 + target/mips/tcg/vr54xx.decode | 8 target/mips/tcg/translate.c| 3 +++ target/mips/tcg/vr54xx_

[PATCH-for-6.2 0/5] target/mips: Convert NEC Vr54xx to decodetree

Trivial conversion, few more lines moved out of the huge translate.c. Philippe Mathieu-Daudé (5): target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c target/mips: Introduce decodetree structure for NEC Vr54xx extension target/mips: Convert Vr54xx MACC* opcodes to decodetree target/m

[PATCH-for-6.2 3/4] target/mips: Merge 32-bit/64-bit release6 decodetree definitions

We don't need to maintain 2 sets of decodetree definitions. Merge them into a single file. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/mips64r6.decode | 27 --- .../mips/tcg/{mips32r6.decode => rel6.decode} | 13 + target/mips/tcg/rel6_translat

[PATCH-for-6.2 4/4] target/mips: Rename 'rtype' as 'r'

We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/msa.decode | 4 +-- target/mips/tcg/rel6.decode | 4 +-- tar

[PATCH-for-6.2 2/4] target/mips: Decode vendor extensions before MIPS ISAs

In commit ffc672aa977 ("target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree") we misplaced the decoder call. Move it to the correct place. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/targ

[PATCH-for-6.2 1/4] target/mips: Simpify PREF opcode

check_insn() checks for any bit in the set, and INSN_R5900 is just another bit added to the set. No need to special-case it. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/target/mips/tcg/translate

[PATCH-for-6.2 0/4] target/mips: Decodetree housekeeping

Minor cleanups while looking at converting more opcodes to decodetree. Philippe Mathieu-Daudé (4): target/mips: Simpify PREF opcode target/mips: Decode vendor extensions before MIPS ISAs target/mips: Merge 32-bit/64-bit release6 decodetree definitions target/mips: Rename 'rtype' as 'r' t

Re: [PATCH] hw/char: Add config for shakti uart

On Mon, Aug 2, 2021 at 8:36 AM Alistair Francis wrote: > > On Sun, Aug 1, 2021 at 5:03 AM Vijai Kumar K wrote: > > > > Use a dedicated UART config(CONFIG_SHAKTI_UART) to select > > shakti uart. > > > > Signed-off-by: Vijai Kumar K Thanks! Applied to riscv-to-apply.next Alistair > > Reviewed-

Re: [PATCH] hw/char: Add config for shakti uart

On Sun, Aug 1, 2021 at 5:03 AM Vijai Kumar K wrote: > > Use a dedicated UART config(CONFIG_SHAKTI_UART) to select > shakti uart. > > Signed-off-by: Vijai Kumar K Reviewed-by: Alistair Francis Alistair > --- > hw/char/Kconfig | 3 +++ > hw/char/meson.build | 2 +- > hw/riscv/Kconfig|

[PATCH] Makefile: Fix cscope issues on MacOS and soft links

This patch fixes actually two issues with 'make cscope'. Firstly, it fixes the command for MacOS "find" command as MacOS will append the full path of "$(SRC_PATH)/" before each found entry, then after the final "./" replacement trick it'll look like (e.g., "qapi/qmp-dispatch.c"): /qapi/qmp-disp

Re: [PATCH for-6.2 14/43] target/sparc: Set fault address in sparc_cpu_do_unaligned_access

On 01/08/2021 16:59, Peter Maydell wrote: On Sun, 1 Aug 2021 at 16:56, Mark Cave-Ayland wrote: On 29/07/2021 15:51, Peter Maydell wrote: On Thu, 29 Jul 2021 at 02:01, Richard Henderson wrote: We ought to have been recording the virtual address for reporting to the guest trap handler. Mi

Re: [PATCH for-6.2 14/43] target/sparc: Set fault address in sparc_cpu_do_unaligned_access

On Sun, 1 Aug 2021 at 16:56, Mark Cave-Ayland wrote: > > On 29/07/2021 15:51, Peter Maydell wrote: > > > On Thu, 29 Jul 2021 at 02:01, Richard Henderson > > wrote: > >> > >> We ought to have been recording the virtual address for reporting > >> to the guest trap handler. Mirror the SFSR FIXME fr

Re: [PATCH for-6.2 14/43] target/sparc: Set fault address in sparc_cpu_do_unaligned_access

On 29/07/2021 15:51, Peter Maydell wrote: On Thu, 29 Jul 2021 at 02:01, Richard Henderson wrote: We ought to have been recording the virtual address for reporting to the guest trap handler. Mirror the SFSR FIXME from the sparc64 version of get_physical_address_data. Cc: Mark Cave-Ayland Si

Re: [PULL 0/1] Libslirp update

On Wed, 28 Jul 2021 at 16:47, Marc-André Lureau wrote: > I wish my previous pull request with the submodule change would > receive more help or attention, as I either couldn't reproduce the > failure (neither CI) or it was just some one-time warnings due to the > transition... Well, I reported th

Re: [PULL 0/2] tcg patch queue for rc2

On Fri, 30 Jul 2021 at 19:28, Richard Henderson wrote: > > The following changes since commit dbdc621be937d9efe3e4dff994e54e8eea051f7a: > > Merge remote-tracking branch > 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-07-30 > 09:14:56 +0100) > > are available in the Git r