Re: -only-migrate and the two different uses of migration blockers

2021-07-24 Thread David Gibson
On Thu, Jul 22, 2021 at 07:00:56PM +0100, Dr. David Alan Gilbert wrote: > * David Gibson (da...@gibson.dropbear.id.au) wrote: > > On Tue, Jul 20, 2021 at 07:30:16AM +0200, Markus Armbruster wrote: > > > "Dr. David Alan Gilbert" writes: > > > > > > > * Markus Armbruster (arm...@redhat.com) wrote:

[PATCH] Revert "accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS"

2021-07-24 Thread Richard Henderson
This reverts commit 78ff82bb1b67c0d79113688e4b3427fc99cab9d4. This produces transient errors in the 2018 advent calendar day 11 image for sparc when using -icount auto. It is not clear what the problem is with the narrower CF_COUNT_MASK value, since we bound the insns_left value in cpu_loop_exec_

Re: [PATCH for-6.2 0/2] target/sparc: Drop use of gen_io_end()

2021-07-24 Thread Richard Henderson
On 7/24/21 10:27 AM, Peter Maydell wrote: On Sat, 24 Jul 2021 at 14:49, Peter Maydell wrote: There is a slight difficulty here with testing this: icount doesn't seem to work for sparc Linux guests in master at the moment. For instance if you get the advent calendar image from https://www.qem

Re: [PATCH for-6.2 0/2] target/sparc: Drop use of gen_io_end()

2021-07-24 Thread Peter Maydell
On Sat, 24 Jul 2021 at 14:49, Peter Maydell wrote: > There is a slight difficulty here with testing this: icount > doesn't seem to work for sparc Linux guests in master at the > moment. For instance if you get the advent calendar image from > https://www.qemu-advent-calendar.org/2018/download/da

Re: [PATCH for-6.2 0/2] target/sparc: Drop use of gen_io_end()

2021-07-24 Thread Richard Henderson
On 7/24/21 3:49 AM, Peter Maydell wrote: Peter Maydell (2): target/sparc: Drop use of gen_io_end() tcg: Drop gen_io_end() Reviewed-by: Richard Henderson r~

aarch64 efi boot failures with qemu 6.0+

2021-07-24 Thread Guenter Roeck
Hi all, starting with qemu v6.0, some of my aarch64 efi boot tests no longer work. Analysis shows that PCI devices with IO ports do not instantiate in qemu v6.0 (or v6.1-rc0) when booting through efi. The problem affects (at least) ne2k_pci, tulip, dc390, and am53c974. The problem only affects aar

Re: [PATCH v3 0/5] migrations: Fix potential rare race of migration-test after yank

2021-07-24 Thread Lukas Straub
On Thu, 22 Jul 2021 13:58:36 -0400 Peter Xu wrote: > v3: > - Use WITH_QEMU_LOCK_GUARD() for patch 2 [Eric] > (potentially I can also replace other existing uses of qemu_file_lock into >WITH_QEMU_LOCK_GUARD, but I decided to took Dave's r-b first and leave that >for later) > - Added r-bs

Re: [PATCH] Makefile: ignore long options

2021-07-24 Thread Peter Maydell
On Sat, 24 Jul 2021 at 07:16, Alexey Neyman wrote: > > Patch ping... Ccing Paolo as author of this bit of code... > On 7/21/21 9:05 PM, Alexey Neyman wrote: > > When searching for options like -n in MAKEFLAGS, current code may result > > in a false positive match when make is invoked with long o

[PATCH for-6.2 2/2] tcg: Drop gen_io_end()

2021-07-24 Thread Peter Maydell
Now we have removed all the uses of gen_io_end() from target frontends, the only callsite is inside gen_tb_start(). Inline the code there, and remove the reference to it from the documentation. While we are inlining the code, switch it to use tcg_constant_i32() so we don't have to manually create

[PATCH for-6.2 1/2] target/sparc: Drop use of gen_io_end()

2021-07-24 Thread Peter Maydell
The gen_io_end() function is obsolete (as documented in docs/devel/tcg-icount.rst). Where an instruction is an I/O operation, the translator frontend should call gen_io_start() before generating the code which does the I/O, and then end the TB immediately after this insn. Remove the calls to gen_i

[PATCH for-6.2 0/2] target/sparc: Drop use of gen_io_end()

2021-07-24 Thread Peter Maydell
The sparc frontend is now the only user of the obsolete gen_io_end() function (used for icount support). This patchset removes the use from sparc as well, and then tidies up the generic icount infrastructure to remove the function altogether. This is for-6.2 material because it's just cleanup. Th

[PATCH 3/3] qcow2: handle_dependencies(): relax conflict detection

2021-07-24 Thread Vladimir Sementsov-Ogievskiy
There is no conflict and no dependency if we have parallel writes to different subclusters of one cluster when cluster itself is already allocated. So, relax extra dependency. Measure performance: First, prepare build/qemu-img-old and build/qemu-img-new images. cd scripts/simplebench ./img_bench_

[PATCH 1/3] simplebench: add img_bench_templater.py

2021-07-24 Thread Vladimir Sementsov-Ogievskiy
Add simple grammar-parsing template benchmark. Signed-off-by: Vladimir Sementsov-Ogievskiy --- scripts/simplebench/img_bench_templater.py | 85 ++ scripts/simplebench/table_templater.py | 62 2 files changed, 147 insertions(+) create mode 100755 scripts/

[PATCH 2/3] qcow2: refactor handle_dependencies() loop body

2021-07-24 Thread Vladimir Sementsov-Ogievskiy
No logic change, just prepare for the following commit. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/qcow2-cluster.c | 49 --- 1 file changed, 28 insertions(+), 21 deletions(-) diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c index bd05

[PATCH 0/3] qcow2: relax subclusters allocation dependencies

2021-07-24 Thread Vladimir Sementsov-Ogievskiy
Hi all! Parallel small writes to unallocated cluster works bad when subclusters enabled. Look, without subclusters, one of write requests will allocate the whole cluster, and all other writes to this cluster will be independent of each other, they depend only on the first one that does allocation

Re: [PULL 0/9] Misc QEMU patches for 6.0-rc

2021-07-24 Thread Peter Maydell
On Sat, 24 Jul 2021 at 09:58, Paolo Bonzini wrote: > > The following changes since commit 7b7ca8ebde4ee6fba171004b2726ae1ff5489c03: > > Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' > into staging (2021-07-22 18:32:02 +0100) > > are available in the Git repository at:

[PATCH v2 4/4] hw/riscv: virt: Add optional ACLINT support to virt machine

2021-07-24 Thread Anup Patel
We extend virt machine to emulate ACLINT devices only when "aclint=on" parameter is passed along with machine name in QEMU command-line. Signed-off-by: Anup Patel --- hw/riscv/virt.c | 113 +++- include/hw/riscv/virt.h | 2 + 2 files changed, 114 ins

[PATCH v2 2/4] hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT

2021-07-24 Thread Anup Patel
The RISC-V ACLINT is more modular and backward compatible with original SiFive CLINT so instead of duplicating the original SiFive CLINT implementation we upgrade the current SiFive CLINT implementation to RISC-V ACLINT implementation. Signed-off-by: Anup Patel --- hw/intc/riscv_aclint.c

[PATCH v2 1/4] hw/intc: Rename sifive_clint sources to riscv_aclint sources

2021-07-24 Thread Anup Patel
We will be upgrading SiFive CLINT implementation into RISC-V ACLINT implementation so let's first rename the sources. Signed-off-by: Anup Patel --- hw/intc/Kconfig| 2 +- hw/intc/meson.build| 2 +- hw/intc/{sifive_clint.c => r

[PATCH v2 3/4] hw/riscv: virt: Re-factor FDT generation

2021-07-24 Thread Anup Patel
We re-factor and break the FDT generation into smaller functions so that it is easier to modify FDT generation for different configurations of virt machine. Signed-off-by: Anup Patel --- hw/riscv/virt.c | 521 ++-- 1 file changed, 324 insertions(+), 19

[PATCH v2 0/4] QEMU RISC-V ACLINT Support

2021-07-24 Thread Anup Patel
The RISC-V Advanced Core Local Interruptor (ACLINT) is an improvement over the SiFive CLINT but also maintains backward compatibility with the SiFive CLINT. Latest RISC-V ACLINT specification (will be frozen soon) can be found at: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc

Re: [PULL for 6.1-rc1 00/28] doc, metadata, plugin and testing updates

2021-07-24 Thread Peter Maydell
On Fri, 23 Jul 2021 at 18:44, Philippe Mathieu-Daudé wrote: > > On 7/23/21 7:03 PM, Alex Bennée wrote: > > I realised I'm on holiday next week so I thought I'd better send this now. > > > > The following changes since commit a146af86c8247f41b641783428b95ee71eb0e43f: > > > > Merge remote-tracking

[PULL 5/9] MAINTAINERS: Add Peter Xu and myself as co-maintainer of "Memory API"

2021-07-24 Thread Paolo Bonzini
From: David Hildenbrand Peter and myself volunteered to help out co-maintaining "Memory API" with Paolo, so let's update the MAINTAINERS file. Cc: Peter Maydell Cc: Paolo Bonzini Cc: Peter Xu Signed-off-by: David Hildenbrand Message-Id: <20210723100532.27353-3-da...@redhat.com> Signed-off-by

[PULL 4/9] MAINTAINERS: Replace Eduardo as "Host Memory Backends" maintainer

2021-07-24 Thread Paolo Bonzini
From: David Hildenbrand Edurdo asked me to take over co-maintaining "Host Memory Backends" with Igor, as Eduardo has plenty of other things to look after. Thanks a lot Eduardo for your excellent work in the past! Cc: Peter Maydell Cc: Eduardo Habkost Cc: Igor Mammedov Cc: Paolo Bonzini Sign

[PULL 7/9] gitlab: only let pages be published from default branch

2021-07-24 Thread Paolo Bonzini
From: Daniel P. Berrangé GitLab will happily publish pages generated by the latest CI pipeline from any branch: https://docs.gitlab.com/ee/user/project/pages/introduction.html "Remember that GitLab Pages are by default branch/tag agnostic and their deployment relies solely on what you spec

[PULL 8/9] qapi: introduce forwarding visitor

2021-07-24 Thread Paolo Bonzini
This new adaptor visitor takes a single field of the adaptee, and exposes it with a different name. This will be used for QOM alias properties. Alias targets can of course have a different name than the alias property itself (e.g. a machine's pflash0 might be an alias of a property named 'drive')

[PULL 6/9] MAINTAINERS: Add memory_mapping.h and memory_mapping.c to "Memory API"

2021-07-24 Thread Paolo Bonzini
From: David Hildenbrand Both files logically belong to "Memory API" and are not yet listed anywhere else explicitly. Let's add them to "Memory API". Cc: Peter Maydell Cc: Paolo Bonzini Cc: Peter Xu Signed-off-by: David Hildenbrand Acked-by: Peter Xu Message-Id: <20210723100532.27353-4-da...

[PULL 3/9] i386: do not call cpudef-only models functions for max, host, base

2021-07-24 Thread Paolo Bonzini
From: Claudio Fontana Some cpu properties have to be set only for cpu models in builtin_x86_defs, registered with x86_register_cpu_model_type, and not for cpu models "base", "max", and the subclass "host". These properties are the ones set by function x86_cpu_apply_props, (also including kvm_def

[PULL 0/9] Misc QEMU patches for 6.0-rc

2021-07-24 Thread Paolo Bonzini
The following changes since commit 7b7ca8ebde4ee6fba171004b2726ae1ff5489c03: Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging (2021-07-22 18:32:02 +0100) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/for-upstream for yo

[PULL 9/9] qom: use correct field name when getting/setting alias properties

2021-07-24 Thread Paolo Bonzini
Alias targets have a different name than the alias property itself (e.g. a machine's pflash0 might be an alias of a property named 'drive'). When the target's getter or setter invokes the visitor, it will use a different name than what the caller expects, and the visitor will not be able to find it

[PULL 2/9] target/i386: Added consistency checks for CR3

2021-07-24 Thread Paolo Bonzini
From: Lara Lazier All MBZ in CR3 must be zero (APM2 15.5) Added checks in both helper_vmrun and helper_write_crN. When EFER.LMA is zero the upper 32 bits needs to be zeroed. Signed-off-by: Lara Lazier Message-Id: <20210723112740.45962-1-laramglaz...@gmail.com> Signed-off-by: Paolo Bonzini ---

[PULL 1/9] meson: fix dependencies for modinfo #2

2021-07-24 Thread Paolo Bonzini
From: Gerd Hoffmann modinfo runs the preprocessor and therefore needs all generated input files to be there. The "depends" clause does not work in Meson 0.55.3, so for now use "input". Part #2: Update the rule for target-specific modules too. Signed-off-by: Gerd Hoffmann Message-Id: <20210723

Re: [PATCH v5 1/5] hw/nvme: split pmrmsc register into upper and lower

2021-07-24 Thread Klaus Jensen
On Jul 20 14:40, Peter Maydell wrote: > On Mon, 19 Jul 2021 at 23:46, Klaus Jensen wrote: > > > > From: Klaus Jensen > > > > The specification uses a set of 32 bit PMRMSCL and PMRMSCU registers to > > make up the 64 bit logical PMRMSC register. > > > > Make it so. > > > > Signed-off-by: Klaus Jen