Re: [PATCH 4/5] monitor: removed cpustats command

On Wed, 26 May 2021 17:21:03 -0300 "Bruno Larsen (billionai)" wrote: > Since ppc was the last architecture to collect these statistics and > it is currently phasing this collection out, the command that would query > this information is being removed. > So this is removing an obviously user vis

Re: [PULL V2 0/3] Net patches

在 2021/5/27 下午2:13, Bin Meng 写道: Hi Jason, On Thu, May 27, 2021 at 12:24 PM Jason Wang wrote: The following changes since commit d90f154867ec0ec22fd719164b88716e8fd48672: Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' into staging (2021-05-05 20:29:14 +0100)

Re: [PULL V2 0/3] Net patches

Hi Jason, On Thu, May 27, 2021 at 12:24 PM Jason Wang wrote: > > The following changes since commit d90f154867ec0ec22fd719164b88716e8fd48672: > > Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' > into staging (2021-05-05 20:29:14 +0100) > > are available in the git r

Re: [PATCH 8/9] gitlab-ci: Run Avocado tests manually (except mainstream CI)

On 25/05/2021 10.25, Philippe Mathieu-Daudé wrote: Due to a design problem and misunderstanding between the Avocado framework and QEMU, Avocado is fetching many asset artifacts it shouldn't be fetching, exhausting the jobs CI timeout. Since Avocado artifacts are cached, this is not an issue with

Re: [PATCH 1/2] hw/usb: hcd-xhci-pci: Raise MSI/MSI-X interrupts only when told to

On Fri, May 21, 2021 at 10:42 AM Bin Meng wrote: > > From: Ruimei Yan > > At present MSI / MSI-X interrupts are triggered regardless of the > irq level. We should have checked the level to determine whether > the interrupt needs to be delivered. > > The level check logic was present in early vers

Re: [PATCH 6/9] gitlab-ci: Split gprof-gcov job

On 25/05/2021 12.21, Philippe Mathieu-Daudé wrote: On 5/25/21 10:25 AM, Philippe Mathieu-Daudé wrote: This job is hitting the 70min limit, so split it in 2 tasks. Signed-off-by: Philippe Mathieu-Daudé --- .gitlab-ci.d/buildtest.yml | 17 ++--- 1 file changed, 14 insertions(+), 3

Re: [PATCH 2/5] target/ppc: remove ppc_cpu_dump_statistics

On Wed, 26 May 2021 17:21:01 -0300 "Bruno Larsen (billionai)" wrote: > This function requires surce code modification to be useful, which means s/surce/source > it probably is not used often, and the move to using decodetree means > the statistics won't even be collected anymore. > > Also remo

Re: [PATCH 00/11] Unified peripheral emulation for Renesas chips

Patchew URL: https://patchew.org/QEMU/20210527052122.97103-1-ys...@users.sourceforge.jp/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210527052122.97103-1-ys...@users.sourceforge.jp Subject: [PATCH 00/11] Unified p

Re: [Bug 1897568] Re: Strange keyboard behaviour in Vim editor

Hi, thanks for letting me know. I do plan to test this and report back, but that may take some time, as I would first have to compile and install a new version of QEMU. -aw On Thu, 27 May 2021 at 05:10, Thomas Huth <1897...@bugs.launchpad.net> wrote: > The patch mentioned by Philippe has now b

[PATCH 03/11] hw/timer: Renesas TMU/CMT module.

TMU - SH4 Timer module. CMT - Compare and match timer used by some Renesas MCUs. The two modules have similar interfaces and have been merged. Signed-off-by: Yoshinori Sato --- include/hw/timer/renesas_timer.h | 96 + hw/timer/renesas_timer.c | 644 +++

[PATCH 07/11] hw/timer: Renesas 8bit timer.

Rewrite timer api. Signed-off-by: Yoshinori Sato --- include/hw/timer/renesas_tmr.h | 58 include/hw/timer/renesas_tmr8.h | 67 hw/timer/renesas_tmr.c | 493 - hw/timer/renesas_tmr8.c | 540 hw/timer/Kconf

[PATCH 01/11] hw/char: Renesas SCI module.

This module supported SCI / SCIa / SCIF. Hardware manual. SCI / SCIF https://www.renesas.com/us/en/doc/products/mpumcu/001/r01uh0457ej0401_sh7751.pdf SCIa https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf Signed-off-by: Yoshinori Sato --- include/hw/char/

[PATCH 09/11] hw/sh4: sh7750 Add CPG.

CPG required new hw modules. Signed-off-by: Yoshinori Sato --- include/hw/sh4/sh7751-cpg.h | 94 hw/sh4/sh7750.c | 25 ++ hw/sh4/sh7751-cpg.c | 457 hw/sh4/meson.build | 1 + 4 files changed, 577 insertions(+) create

[PATCH 08/11] hw/rx: rx62n use new hw modules.

Signed-off-by: Yoshinori Sato --- include/hw/rx/rx62n.h | 10 +- hw/rx/rx62n.c | 18 -- hw/rx/Kconfig | 4 ++-- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h index 44f5fcc74d..942ed0639f 1006

[PATCH 10/11] hw/sh4: sh7750 use new hw modules.

Signed-off-by: Yoshinori Sato --- include/hw/sh4/sh.h | 8 - hw/sh4/sh7750.c | 87 +++-- hw/sh4/Kconfig | 4 +-- 3 files changed, 79 insertions(+), 20 deletions(-) diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h index becb596979..74e1

[PATCH 06/11] hw/rx: Add RX62N Clock generator

This module generated core and peripheral clock. Signed-off-by: Yoshinori Sato --- include/hw/rx/rx62n-cpg.h | 72 include/hw/rx/rx62n.h | 8 +- hw/rx/rx62n-cpg.c | 344 ++ hw/rx/rx62n.c | 39 +++-- hw/rx/meson.build

[PATCH 04/11] hw/timer: Remove sh_timer.

Migrate to renesas_timer. Signed-off-by: Yoshinori Sato --- include/hw/timer/tmu012.h | 23 --- hw/timer/sh_timer.c | 368 -- MAINTAINERS | 4 +- hw/timer/Kconfig | 4 - hw/timer/meson.build | 1 - 5 files changed, 2 in

[PATCH 02/11] hw/char: remove sh_serial.

Migrate to renesas_sci. Signed-off-by: Yoshinori Sato --- hw/char/sh_serial.c | 431 MAINTAINERS | 4 +- hw/char/Kconfig | 3 - hw/char/meson.build | 1 - 4 files changed, 2 insertions(+), 437 deletions(-) delete mode 100644 hw/char

[PATCH 11/11] hw/rx: rx-gdbsim Add bootstrup for linux

linux kernel require initializing some peripherals. Signed-off-by: Yoshinori Sato --- include/hw/rx/rx62n.h | 16 hw/rx/rx-gdbsim.c | 89 +-- hw/rx/rx62n.c | 15 3 files changed, 59 insertions(+), 61 deletions(-) diff --git a

[PATCH 05/11] hw/timer: Remove renesas_cmt.

Migrate to renesas_timer. Signed-off-by: Yoshinori Sato --- include/hw/timer/renesas_cmt.h | 43 - hw/timer/renesas_cmt.c | 283 - hw/timer/meson.build | 1 - 3 files changed, 327 deletions(-) delete mode 100644 include/hw/timer/renesas_c

[PATCH 00/11] Unified peripheral emulation for Renesas chips

Renesas SH4 and RX have similar peripherals. Integrate the emulation code for these peripherals. Migrate peripherals. SH4 sh_timer(TMU) -> renesas_timer SH4 sh_serial(SCI/SCIF) -> renesas_sci RX renesas_cmt(CMT) -> renesas_timer RX renesas_sci(SCIa) -> renesas_sci I want to process the peripheral

[Bug 1895363] Re: borland IDEs double up cursor key presses (need timing on PS2 port input)

The patch mentioned by Philippe has now been merged to the QEMU master branch (commit d1e45668d2128b064). Michael, could you maybe check the current git version to see whether this problem has been fixed now? ** Changed in: qemu Status: In Progress => Fix Committed -- You received this bu

[Bug 1897568] Re: Strange keyboard behaviour in Vim editor

The patch mentioned by Philippe has now been merged to the QEMU master branch (commit d1e45668d2128b064). Albert, could you maybe check the current git version to see whether this problem has been fixed now (using "-global i8042.kbd-throttle=on" to enable this new feature)? ** Changed in: qemu

Re: [RFC v3 13/29] vhost: Add vhost_get_iova_range operation

在 2021/5/27 上午1:49, Eugenio Perez Martin 写道: On Wed, May 26, 2021 at 3:14 AM Jason Wang wrote: 在 2021/5/20 上午12:28, Eugenio Pérez 写道: For simplicity, If a device does not support this operation it means that it can handle full (uint64_t)-1 iova address. Note that, we probably need a separ

Re: [PULL 1/3] hw/net/imx_fec: return 0xffff when accessing non-existing PHY

在 2021/5/26 下午5:08, Philippe Mathieu-Daudé 写道: On 5/26/21 10:24 AM, Jason Wang wrote: From: Guenter Roeck If a PHY does not exist, attempts to read from it should return 0x. Otherwise the Linux kernel will believe that a PHY is there and select the non-existing PHY. This in turn will res

[PULL V2 2/3] virtio-net: failover: add missing remove_migration_state_change_notifier()

From: Laurent Vivier In the failover case configuration, virtio_net_device_realize() uses an add_migration_state_change_notifier() to add a state notifier, but this notifier is not removed by the unrealize function when the virtio-net card is unplugged. If the card is unplugged and a migration i

[PULL V2 0/3] Net patches

The following changes since commit d90f154867ec0ec22fd719164b88716e8fd48672: Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' into staging (2021-05-05 20:29:14 +0100) are available in the git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request

[PULL V2 3/3] tap-bsd: Remove special casing for older OpenBSD releases

From: Brad Smith OpenBSD added support for tap(4) 10 releases ago. Remove the special casing for older releases. Signed-off-by: Brad Smith Signed-off-by: Jason Wang --- net/tap-bsd.c | 8 1 file changed, 8 deletions(-) diff --git a/net/tap-bsd.c b/net/tap-bsd.c index 77aaf67..59dfc

[PULL V2 1/3] hw/net/imx_fec: return 0xffff when accessing non-existing PHY

From: Guenter Roeck If a PHY does not exist, attempts to read from it should return 0x. Otherwise the Linux kernel will believe that a PHY is there and select the non-existing PHY. This in turn will result in network errors later on since the real PHY is not selected or configured. Since rea

[PATCH 11/11] target/mips: Drop denormal operand to update_msacsr

The comment about not signaling all underflow cases is almost certainly incorrect. It has been there since the initial commit of the file. There is a bit of code below that sets underflow with float_flag_oflush_denormal, which is probably the fix for whatever the original case may have been. Cc:

[PATCH 04/11] softfloat: Introduce float_flag_result_denormal

Create a new exception flag for reporting output denormals that are not flushed to zero. Signed-off-by: Richard Henderson --- include/fpu/softfloat-types.h | 3 ++- fpu/softfloat-parts.c.inc | 8 ++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/include/fpu/softfloat-ty

[PATCH 10/11] target/mips: Do not check MSACSR_FS_MASK in update_msacsr

The FS_MASK has already been taken into account with restore_msa_fp_status. The definition of iflush and oflush is that we *have* flushed to zero. Cc: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/mips/tcg/msa_helper.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletio

[PATCH 05/11] target/i386: Use float_flag_inorm_denormal

The FSR and MXCSR DE flags have the semantics of the new flag. We get to remove a big fixme in update_mxcsr_from_sse_status vs float_flag_iflush_denormal. Reported-by: Michael Morrell Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 18 ++ 1 file changed, 6 in

[PATCH 09/11] target/mips: Drop inline markers from msa_helper.c

Some of these functions are quite large. Let the compiler decide whether to inline. Cc: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/mips/tcg/msa_helper.c | 262 --- 1 file changed, 121 insertions(+), 141 deletions(-) diff --git a/target/mi

[PATCH 03/11] softfloat: Introduce float_flag_inorm_denormal

Create a new exception flag for reporting input denormals that are not flushed to zero, they are normalized and treated as normal numbers. Signed-off-by: Richard Henderson --- include/fpu/softfloat-types.h | 15 --- fpu/softfloat.c | 84 +++ fpu/

[PATCH 06/11] target/rx: Handle the FPSW.DN bit in helper_set_fpsw

Both input and output denormals flush to zero when DN is set. Cc: Philippe Mathieu-Daudé Cc: Yoshinori Sato Signed-off-by: Richard Henderson --- target/rx/op_helper.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index

[PATCH 02/11] softfloat: Rename float_flag_output_denormal to float_flag_oflush_denormal

The new name emphasizes that the output denormal has been flushed to zero. Patch created mechanically using: sed -i s,float_flag_output_denormal,float_flag_oflush_denormal,g \ $(git grep -l float_flag_output_denormal) Signed-off-by: Richard Henderson --- include/fpu/softfloat-types.h | 2

[PATCH 08/11] target/rx: Fix setting of FPSW.CE

The existing check was completely wrong, confused about the definition of the (previous) float_flag_{input,output}_denormal flags, then making sure that DN, the flush-to-zero bit, was off. Update for the introduction of float_flag_inorm_denormal and float_flag_result_denormal, taking into account

[PATCH 07/11] target/rx: Use FloatRoundMode in helper_set_fpsw

Use the proper type for the roundmode array. Cc: Philippe Mathieu-Daudé Cc: Yoshinori Sato Signed-off-by: Richard Henderson --- target/rx/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index 2139def3b2..b1772e9538 1

[PATCH 00/11] softfloat: Improve denormal handling

This attempts to fix the x86 denormal-exception flag, which is the inverse of the existing float_flag_input_denormal flag. I have not created a new test case for this yet, fwiw. While auditing all uses of float_flag_*_denormal, I found some errors in target/rx and target/mips. This is based on m

[PATCH 01/11] softfloat: Rename float_flag_input_denormal to float_flag_iflush_denormal

The new name emphasizes that the input denormal has been flushed to zero. Patch created mechanically using: sed -i s,float_flag_input_denormal,float_flag_iflush_denormal,g \ $(git grep -l float_flag_input_denormal) Signed-off-by: Richard Henderson --- include/fpu/softfloat-types.h | 2 +-

Re: [RFC PATCH v4] ppc/spapr: Add support for H_SCM_PERFORMANCE_STATS hcall

On Wed, May 26, 2021 at 08:30:57AM +0530, Vaibhav Jain wrote: > Add support for H_SCM_PERFORMANCE_STATS described at [1] for > spapr nvdimms. This enables guest to fetch performance stats[2] like > expected life of an nvdimm ('MemLife ') etc and display them to the > user. Linux kernel support for

Re: [PATCH 5/5] hw/core/cpu: removed cpu_dump_statistics function

On Wed, May 26, 2021 at 05:21:04PM -0300, Bruno Larsen (billionai) wrote: > No more architectures set the pointer to dump_statistics, so there's no > point in keeping it, or the related cpu_dump_statistics function. > > Suggested-by: Richard Henderson > Signed-off-by: Bruno Larsen (billionai) >

Re: [PATCH v1 2/3] spapr: Set LPCR to current AIL mode when starting a new CPU

On Wed, May 26, 2021 at 06:03:09PM +0200, Greg Kurz wrote: > On Wed, 26 May 2021 19:16:25 +1000 > Nicholas Piggin wrote: > > > TCG does not keep track of AIL mode in a central place, it's based on > > the current LPCR[AIL] bits. Synchronize the new CPU's LPCR to the > > current LPCR in rtas_start

Re: [PATCH v1 1/3] spapr: Remove stale comment about power-saving LPCR bits

On Wed, May 26, 2021 at 07:16:24PM +1000, Nicholas Piggin wrote: > Commit 47a9b551547 ("spapr: Clean up handling of LPCR power-saving exit > bits") moved this logic but did not remove the comment from the > previous location. > > Signed-off-by: Nicholas Piggin Applied to ppc-for-6.1, thanks. >

Re: [PATCH 1/5] target/ppc: fixed GEN_OPCODE behavior when PPC_DUMP_CPU is set

On Wed, May 26, 2021 at 02:24:51PM -0700, Richard Henderson wrote: > On 5/26/21 2:13 PM, Luis Fernando Fujita Pires wrote: > > From: Bruno Larsen (billionai) > > > Before this patch, when PPC_DUMP_CPU is set, oname is added to > > > opc_handler_t, but GEN_OPCODE* wouldn't set it unless DO_PPC_STAT

Re: [PATCH 2/5] target/ppc: remove ppc_cpu_dump_statistics

On Wed, May 26, 2021 at 05:21:01PM -0300, Bruno Larsen (billionai) wrote: > This function requires surce code modification to be useful, which means > it probably is not used often, and the move to using decodetree means > the statistics won't even be collected anymore. > > Also removed setting du

Re: [PATCH] target/ppc: fold ppc_store_ptcr into it's only caller

On Wed, May 26, 2021 at 11:35:16AM -0300, Bruno Larsen (billionai) wrote: > ppc_store_ptcr, defined in mmu_helper.c, was only used by > helper_store_ptcr, in misc_helper.c. To avoid possible confusion, > the function was folded into the helper. > > Signed-off-by: Bruno Larsen (billionai) > LGTM,

Re: [PATCH v1 3/3] target/ppc: Synchronize with KVM's LPCR value when creating a vCPU

On Wed, May 26, 2021 at 07:16:26PM +1000, Nicholas Piggin wrote: > Despite the suggestion from the comment, LPCR value set by KVM does not > get propagated to QEMU SPR values. Instead, the KVM LPCR register is set > from the inital QEMU values, of which KVM allows the DPFD, ILE, TC, AIL, > LD field

Re: [PATCH] spapr: nvdimm: Fix the persistent-memory root node name in device tree

On Wed, May 26, 2021 at 11:27:15AM -0400, Shivaprasad G Bhat wrote: > The FDT code is adding the pmem root node by name "persistent-memory" > which should have been "ibm,persistent-memory". > > The linux fetches the device tree nodes by type and it has been working > correctly as the type is corre

Re: [PATCH v5 23/23] target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree

On Wed, May 26, 2021 at 12:17:48PM -0300, Matheus K. Ferst wrote: > On 24/05/2021 15:51, Richard Henderson wrote: > > On 5/21/21 10:25 AM, Matheus K. Ferst wrote: > > > On 18/05/2021 07:12, Richard Henderson wrote: > > > > On 5/17/21 3:50 PM, matheus.fe...@eldorado.org.br wrote: > > > > > +    if(a

Re: [PATCH 0/5] linux-user changes to run docker

On Tue, May 25, 2021 at 8:22 AM Takashi Yamamoto wrote: > > On Tue, May 25, 2021 at 2:49 AM Alex Bennée wrote: > > > > > > YAMAMOTO Takashi writes: > > > > > These patches, along with a few more hacks [1] I didn't include > > > in this patchset, allowed me to run arm64 and armv7 version of > > >

Re: [PATCH v2 1/1] yank: Unregister function when using TLS migration

On Wed, May 26, 2021 at 07:16:16PM -0300, Leonardo Bras wrote: > After yank feature was introduced, whenever migration is started using TLS, > the following error happens in both source and destination hosts: > > (qemu) qemu-kvm: ../util/yank.c:107: yank_unregister_instance: > Assertion `QLIST_EMP

Re: Denormal input handling

On 5/26/21 2:59 PM, Michael Morrell wrote: First, I apologize for the duplicate thread. I thought the first attempt didn't go through. I agree with Richard that we need an extra flag bit. The current behavior is not right for SSE on x86 (it looks like x87 might be different still). For AR

Help adding multi vector msi support to hw/xen

Aloha qemu-devel, I'm interested in coding support for multi-vector msi to hw/xen. Although I have string c skills, I'm learning qemu, xen, and kernel pci in my spare time to accomplish this. If anyone can give me some pointers on what exactly needs to be added/changed to qemu to accomplish this

[Bug 1891748] Re: qemu-arm-static 5.1 can't run gcc

In my case, sudo does not affect this bug. My output in attachements. ** Attachment added: "sysctl-vm.txt" https://bugs.launchpad.net/qemu/+bug/1891748/+attachment/5500596/+files/sysctl-vm.txt -- You received this bug notification because you are a member of qemu- devel-ml, which is subscrib

[PULL 30/31] target/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed

Add a flag to MIPSCPUClass in order to avoid needing to replace mips_tcg_ops.do_transaction_failed. Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-ID: <20210227232519.222663-2-richard.hender...@linaro.org> --- target/mips/cpu-qom.

[PULL 28/31] cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-22-f4...@amsat.org> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h| 3 --- include/hw/core/sysemu-cpu-ops.h | 5 + hw/core/cpu-syse

Re: [PATCH v3 0/8] GICv3 LPI and ITS feature implementation

Have identified the cause of slow down and redesigned the code to scan LPI pending table and config table right after lpi pending state changes(SET/RESET) through gicv3_redist_update_lpi() call to determine the highest priority lpi among the active lpis and save the details.The high priority interr

[PULL 25/31] cpu: Move CPUClass::write_elf* to SysemuCPUOps

From: Philippe Mathieu-Daudé The write_elf*() handlers are used to dump vmcore images. This feature is only meaningful for system emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-19-f4...@amsat.org> Signed-off-by: Richard Hende

[PULL 21/31] cpu: Introduce SysemuCPUOps structure

From: Philippe Mathieu-Daudé Introduce a structure to hold handler specific to sysemu. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-15-f4...@amsat.org> [rth: Squash "restrict hw/core/sysemu-cpu-ops.h" patch] Signed-off-by: Richard Hen

[PULL 19/31] cpu: Rename CPUClass vmsd -> legacy_vmsd

From: Philippe Mathieu-Daudé Quoting Peter Maydell [*]: There are two ways to handle migration for a CPU object: (1) like any other device, so it has a dc->vmsd that covers migration for the whole object. As usual for objects that are a subclass of a parent that has state, the first e

[PULL 18/31] cpu: Assert DeviceClass::vmsd is NULL on user emulation

From: Philippe Mathieu-Daudé Migration is specific to system emulation. Restrict current DeviceClass::vmsd to sysemu using #ifdef'ry, and assert in cpu_exec_realizefn() that dc->vmsd not set under user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id:

[PULL 31/31] hw/core: Constify TCGCPUOps

We no longer have any runtime modifications to this struct, so declare them all const. Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-ID: <20210227232519.222663-3-richard.hender...@linaro.org> --- include/hw/core/cpu.h | 2 +-

[PULL 17/31] cpu: Directly use get_memory_mapping() fallback handlers in place

From: Philippe Mathieu-Daudé No code uses CPUClass::get_memory_mapping() outside of hw/core/cpu.c: $ git grep -F -- '->get_memory_mapping' hw/core/cpu.c:87:cc->get_memory_mapping(cpu, list, errp); hw/core/cpu.c:439:k->get_memory_mapping = cpu_common_get_memory_mapping; target/i38

[PULL 27/31] cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-21-f4...@amsat.org> [rth: Drop declaration movement from target/*/cpu.h] Signed-off-by: Richard Henderson --- include/hw/core/cpu.h| 8 i

[PULL 14/31] cpu: Introduce cpu_virtio_is_big_endian()

From: Philippe Mathieu-Daudé Introduce the cpu_virtio_is_big_endian() generic helper to avoid calling CPUClass internal virtio_is_big_endian() one. Similarly to commit bf7663c4bd8 ("cpu: introduce CPUClass::virtio_is_big_endian()"), we keep 'virtio' in the method name to hint this handler should

[PULL 24/31] cpu: Move CPUClass::get_crash_info to SysemuCPUOps

From: Philippe Mathieu-Daudé cpu_get_crash_info() is called on GUEST_PANICKED events, which only occur in system emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-18-f4...@amsat.org> Signed-off-by: Richard Henderson --- includ

[PULL 11/31] cpu: Remove duplicated 'sysemu/hw_accel.h' header

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-5-f4...@amsat.org> Signed-off-by: Richard Henderson --- hw/core/cpu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 00

[PULL 20/31] cpu: Move AVR target vmsd field from CPUClass to DeviceClass

From: Philippe Mathieu-Daudé See rationale in previous commit. Targets should use the vmsd field of DeviceClass, not CPUClass. As migration is not important on the AVR target, break the migration compatibility and set the DeviceClass vmsd field. To feel safer, increment the vmstate version. Sign

[PULL 23/31] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps

From: Philippe Mathieu-Daudé VirtIO devices are only meaningful with system emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-17-f4...@amsat.org> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h| 5 -

[PULL 29/31] cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-23-f4...@amsat.org> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h| 2 -- include/hw/core/sysemu-cpu-ops.h | 4 hw/core/cpu-sysemu

[PULL 10/31] tcg/aarch64: Fix tcg_out_rotl

From: Yasuo Kuwahara The last argument of tcg_out_extr() must be in the range 0-31 if ext==0. Before the fix, when m==0 it becomes 32 and it crashes with an Illegal instruction on Apple Silicon. After the fix, it will be 0. If m is in the range 1-31, it is the same as before. Signed-off-by: Ya

[PULL 16/31] cpu: Directly use get_paging_enabled() fallback handlers in place

From: Philippe Mathieu-Daudé No code uses CPUClass::get_paging_enabled() outside of hw/core/cpu.c: $ git grep -F -- '->get_paging_enabled' hw/core/cpu.c:74:return cc->get_paging_enabled(cpu); hw/core/cpu.c:438:k->get_paging_enabled = cpu_common_get_paging_enabled; target/i386/cpu

[PULL 15/31] cpu: Directly use cpu_write_elf*() fallback handlers in place

From: Philippe Mathieu-Daudé No code directly accesses CPUClass::write_elf*() handlers out of hw/core/cpu.c (the rest are assignation in target/ code): $ git grep -F -- '->write_elf' hw/core/cpu.c:157:return (*cc->write_elf32_qemunote)(f, cpu, opaque); hw/core/cpu.c:171:return (*cc

[PULL 26/31] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-20-f4...@amsat.org> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h| 3 --- include/hw/core/sysemu-cpu-ops.h | 5 + hw/core/cpu-syse

[PULL 01/31] exec/memory_ldst_cached: Sort declarations

From: Philippe Mathieu-Daudé To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-2-phi...@redhat.com> Signed-off-by: Richard Henderson --- inclu

[PULL 08/31] accel/tcg: Keep TranslationBlock headers local to TCG

From: Philippe Mathieu-Daudé Only the TCG accelerator uses the TranslationBlock API. Move the tb-context.h / tb-hash.h / tb-lookup.h from the global namespace to the TCG one (in accel/tcg). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210524170453.3791436-3-f4...@amsat.org> Signed-off-b

[PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs

From: Philippe Mathieu-Daudé To be able to later extract the cpu_get_phys_page_debug() and cpu_asidx_from_attrs() handlers from CPUClass, un-inline them from "hw/core/cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-7-f4...@amsat.

[PULL 12/31] cpu: Split as cpu-common / cpu-sysemu

From: Philippe Mathieu-Daudé The current cpu.c contains sysemu-specific methods. To avoid building them in user-mode builds, split the current cpu.c as cpu-common.c / cpu-sysemu.c. Start by moving cpu_get_crash_info(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Messa

[PULL 03/31] exec/memory_ldst: Use correct type sizes

From: Philippe Mathieu-Daudé Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-4-phi...@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst.h.inc | 16 memo

[PULL 09/31] replay: fix watchpoint processing for reverse debugging

From: Pavel Dovgalyuk This patch enables reverse debugging with watchpoints. Reverse continue scans the execution to find the breakpoints and watchpoints that should fire. It uses helper function replay_breakpoint() for that. But this function needs to access icount, which can't be correct in the

[PULL 05/31] exec/memory_ldst_cached: Use correct type size

From: Philippe Mathieu-Daudé Use uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-6-phi...@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst_cached.h.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletion

[PULL 22/31] cpu: Move CPUClass::vmsd to SysemuCPUOps

From: Philippe Mathieu-Daudé Migration is specific to system emulation. - Move the CPUClass::vmsd field to SysemuCPUOps, - restrict VMSTATE_CPU() macro to sysemu, - vmstate_dummy is now unused, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <202105

[PULL 06/31] exec/memory: Use correct type size

From: Philippe Mathieu-Daudé Use uint8_t for (unsigned) byte. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-7-phi...@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/e

[PULL 02/31] exec/memory_ldst_phys: Sort declarations

From: Philippe Mathieu-Daudé To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-3-phi...@redhat.com> Signed-off-by: Richard Henderson --- inclu

[PULL 04/31] exec/memory_ldst_phys: Use correct type sizes

From: Philippe Mathieu-Daudé Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210518183655.1711377-5-phi...@redhat.com> Signed-off-by: Richard Henderson --- include/exec/memory_ldst_phys.h.inc | 16

[PULL 00/31] tcg patch queue

u.git tags/pull-tcg-20210526 for you to fetch changes up to 119065574d02deffc28fe5b6a864db9b467c6ffd: hw/core: Constify TCGCPUOps (2021-05-26 15:33:59 -0700) Adjust types for some memory access functions. Reduce inclusion of t

[PULL 07/31] accel/tcg: Reduce 'exec/tb-context.h' inclusion

From: Philippe Mathieu-Daudé Only 2 headers require "exec/tb-context.h". Instead of having all files including "exec/exec-all.h" also including it, directly include it where it is required: - accel/tcg/cpu-exec.c - accel/tcg/translate-all.c For plugins/plugin.h, we were implicitly relying on e

[PATCH v7 09/14] virtio-gpu: Add virtio_gpu_resource_create_blob

This API allows Qemu to register the blob allocated by the Guest as a new resource and map its backing storage. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/trace-events | 1 + hw/display/virtio-gpu.c | 73 +

[PATCH v7 07/14] virtio-gpu: Refactor virtio_gpu_create_mapping_iov

Instead of passing the attach_backing object to extract nr_entries and offset, explicitly pass these as arguments to this function. This will be helpful when adding create_blob API. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu-virgl.c | 3 ++- hw/display/virtio-g

Re: [PATCH 1/1] tests/acceptance: change armbian archive to a faster host

On Wed, May 26, 2021 at 05:56:01PM -0300, Willian Rampazzo wrote: > The current host for the image > Armbian_20.08.1_Orangepipc_bionic_current_5.8.5.img.xz > (archive.armbian.com) is extremely slow in the last couple of weeks, > making the job running the test > tests/system/boot_linux_console.py:B

[PATCH v7 08/14] virtio-gpu: Add initial definitions for blob resources

Add the property bit, configuration flag and other relevant macros and definitions associated with this feature. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu-base.c | 3 +++ hw/display/virtio-gpu.c| 14 ++ in

[PATCH v7 01/14] ui: Get the fd associated with udmabuf driver

Try to open the udmabuf dev node for the first time or return the fd if the device was previously opened. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- include/ui/console.h | 3 +++ ui/meson.build | 1 + ui/udmabuf.c | 40

[PATCH v7 05/14] virtio-gpu: Add virtio_gpu_find_check_resource

Move finding the resource and validating its backing storage into one function. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu.c | 66 + 1 file changed, 47 insertions(+), 19 deletions(-) diff

[PATCH v7 06/14] virtio-gpu: Refactor virtio_gpu_set_scanout

Store the meta-data associated with a FB in a new object (struct virtio_gpu_framebuffer) and pass the object to set_scanout. Also move code in set_scanout into a do_set_scanout function. This will be helpful when adding set_scanout_blob API. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Sig

[PATCH v7 14/14] virtio-gpu: Update cursor data using blob

If a blob is available for the cursor, copy the data from the blob. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/hw/display/virtio-gpu.c b/h

[PATCH v7 10/14] ui/pixman: Add qemu_pixman_to_drm_format()

This new function to get the drm_format associated with a pixman format will be useful while creating a dmabuf. Based-on-patch-by: Gerd Hoffmann Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- include/ui/qemu-pixman.h | 1 + ui/qemu-pixman.c | 35 -

[PATCH v7 04/14] stubs: Add stubs for udmabuf helpers

This is needed to ensure that virtio-gpu device works for non-linux builds. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- meson.build| 2 +- stubs/meson.build | 1 + stubs/virtio-gpu-udmabuf.c | 18 ++ 3 files changed, 20 insertions(+), 1 deleti

[PATCH v7 12/14] virtio-gpu: Factor out update scanout

Creating a small helper function for updating the scanout will be useful in the next patch where this needs to be done early in do_set_scanout before returning. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu.c | 35 +++ 1 file changed,

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