Alistair Francis 於 2021年4月19日 週一 下午2:28寫道：
> On Mon, Apr 19, 2021 at 4:02 PM wrote:
> >
> > From: Frank Chang
> >
> > Doing a negate (0x0 – 0x8000) using vssub.vv produces
> > an incorrect result of 0x8000 (should saturate to 0x7fff)
> >
> > Fix this bug by treating zero as a positi
On Mon, Apr 19, 2021 at 4:02 PM wrote:
>
> From: Frank Chang
>
> Doing a negate (0x0 – 0x8000) using vssub.vv produces
> an incorrect result of 0x8000 (should saturate to 0x7fff)
>
> Fix this bug by treating zero as a positive number.
>
> Signed-off-by: Frank Chang
Thanks for the pa
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/pmp.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index e1f5776316..78203291de 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -19,10 +19,6 @@
* this program.
From: Hou Weiying
This commit adds support for ePMP v0.9.1.
The ePMP spec can be found in:
https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
Signed-off-by: Hongzheng-Li
Signed-off-by: Hou Weiying
Signed-off-by: Myriad-Dreamin
Message-Id:
[ Changes by AF:
- Re
From: Hou Weiying
Add a config option to enable experimental support for ePMP. This
is disabled by default and can be enabled with 'x-epmp=true'.
Signed-off-by: Hongzheng-Li
Signed-off-by: Hou Weiying
Signed-off-by: Myriad-Dreamin
Message-Id:
Signed-off-by: Alistair Francis
Reviewed-by: Bi
From: Hou Weiying
Signed-off-by: Hongzheng-Li
Signed-off-by: Hou Weiying
Signed-off-by: Myriad-Dreamin
Message-Id:
[ Changes by AF:
- Rebase on master
- Fix build errors
- Fix some style issues
]
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/cpu.h| 1 +
The RISC-V spec says:
if PMP entry i is locked and pmpicfg.A is set to TOR, writes to
pmpaddri-1 are ignored.
The current QEMU code ignores accesses to pmpaddri-1 and pmpcfgi-1 which
is incorrect.
Update the pmp_is_locked() function to not check the supporting fields
and instead enforce t
The physical Ibex CPU has ePMP support and it's enabled for the
OpenTitan machine so let's enable ePMP support for the Ibex CPU in QEMU.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/r
The spec is avaliable at:
https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 842d3ab810..13
From: Hou Weiying
Use address 0x390 and 0x391 for the ePMP CSRs.
Signed-off-by: Hongzheng-Li
Signed-off-by: Hou Weiying
Signed-off-by: Myriad-Dreamin
Reviewed-by: Alistair Francis
Message-Id:
[ Changes by AF:
- Tidy up commit message
]
Signed-off-by: Alistair Francis
Reviewed-by: Bin Men
This series adds support for ePMP v0.9.1 to the QEMU RISC-V target.
This is based on previous patches, but has been rebased on the latest
master and updated for the latest spec.
The spec is avaliable at:
https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
This was te
I think we fixed this at one point in time during the past two years ...
can we close this issue now, or could you still reproduce this with the
latest version of QEMU?
** Changed in: qemu
Status: New => Incomplete
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de
Looking through old bug tickets... is this still an issue with the
latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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h
From: Frank Chang
ETYPE may be type of uint64_t, thus index variable has to be declared as
type of uint64_t, too. Otherwise the value read from vs1 register may be
truncated to type of uint32_t.
Signed-off-by: Frank Chang
---
target/riscv/vector_helper.c | 6 --
1 file changed, 4 insertion
From: Frank Chang
Doing a negate (0x0 – 0x8000) using vssub.vv produces
an incorrect result of 0x8000 (should saturate to 0x7fff)
Fix this bug by treating zero as a positive number.
Signed-off-by: Frank Chang
---
target/riscv/vector_helper.c | 8
1 file changed, 4 inserti
** Changed in: qemu
Status: Fix Released => Fix Committed
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https://bugs.launchpad.net/bugs/1919035
Title:
Assertion failure in fifo8_pop_buf() through am53c974
Status in QEMU:
** Changed in: qemu
Status: Fix Released => Fix Committed
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https://bugs.launchpad.net/bugs/1919036
Title:
Assertion failure in fifo8_push_all() through am53c974
Status in QEMU:
From: Frank Chang
In IEEE 754-2008 spec:
Invalid operation exception is signaled when doing:
fusedMultiplyAdd(0, Inf, c) or fusedMultiplyAdd(Inf, 0, c)
unless c is a quiet NaN; if c is a quiet NaN then it is
implementation defined whether the invalid operation exception
is signaled.
In
On 19/04/2021 01.34, Philippe Mathieu-Daudé wrote:
Forks run the same jobs than mainstream, which might be overkill.
Allow them to easily rebase their custom set, while keeping using
the mainstream templates, and ability to pick specific jobs from
the mainstream set.
To switch to your set, simpl
On Thu, Apr 08, 2021 at 05:40:48PM -0300, Daniel Henrique Barboza wrote:
> Up to this patch, 'max_cpus' value is hardcoded to 1024 (commit
> 6244bb7e5811). In theory this patch would simply bump it to 2048, since
> it's the default NR_CPUS kernel setting for ppc64 servers nowadays, but
> the whole
On Thu, Apr 08, 2021 at 05:40:49PM -0300, Daniel Henrique Barboza wrote:
> Certain SMP topologies stress, e.g. 1 thread/core, 2048 cores and
> 1 socket, stress the current maximum size of the pSeries FDT:
>
> Calling ibm,client-architecture-support...qemu-system-ppc64: error
> creating device tree
On 19/04/2021 01.34, Philippe Mathieu-Daudé wrote:
It is not possible to use the previously extracted templates
without this set of core containers. Extract them into a new
file (container-core.yml) to be able to build them without
having to build all the other containers by default.
Signed-off-
On 19/04/2021 01.34, Philippe Mathieu-Daudé wrote:
Extract the build/test jobs run by default on the mainstream
CI into a new file (buildtest.yml) and their templates into
(buildtest-template.yml), to be able to reuse the templates
without having to run all these mainstream jobs by default.
Sign
On Tue, Apr 13, 2021 at 05:43:02PM +, Bruno Piazera Larsen wrote:
> > I'm actually not sure if we'll want translate_init.c for !tcg builds.
> > It's *primarily* for TCG, but we still need at least some of the cpu
> > state structure for KVM, and some of that is initialized in
> > translate_init
On Fri, Apr 09, 2021 at 12:19:15PM -0300, Bruno Larsen (billionai) wrote:
> This file basically adds all stubs required to build the project
> with disable-tcg. most of these are not going to remain stubs by the
> end, but this part is where it got complicated, and I wanted to get
> an RFC ASAP. Mo
On Tue, Apr 13, 2021 at 06:38:57PM -0300, Fabiano Rosas wrote:
> Bruno Piazera Larsen writes:
>
> >> I'm actually not sure if we'll want translate_init.c for !tcg builds.
> >> It's *primarily* for TCG, but we still need at least some of the cpu
> >> state structure for KVM, and some of that is in
On 19/04/2021 01.34, Philippe Mathieu-Daudé wrote:
Extract the DCO / checkpatch jobs to a new file (checks.yml)
to be able to run them without having to run all the jobs
included in the default .gitlab-ci.yml, which are mainly useful
for mainstream CI.
Signed-off-by: Philippe Mathieu-Daudé
---
On 19/04/2021 01.34, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
The acceptance tests aren't accepting anything,
rename them as integration tests.
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Willian Rampazzo
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.yml
On Wed, Apr 14, 2021 at 06:28:26PM +, Lucas Mateus Martins Araujo e Castro
wrote:
> Hi, I have been working on billionai's patch to enable the --disable-tcg
> option on PowerPC and one of the problems is that 5 files in hw/ppc use
> functions implemented in mmu-hash64.c which is not compiled
On 16/04/2021 22.34, Nir Soffer wrote:
On Fri, Apr 16, 2021 at 8:23 AM Thomas Huth wrote:
A customer reported that running
qemu-img convert -t none -O qcow2 -f qcow2 input.qcow2 output.qcow2
fails for them with the following error message when the images are
stored on a GPFS file system:
On Mon, Apr 12, 2021 at 05:14:33PM +0530, Ravi Bangoria wrote:
> As per the PAPR, bit 0 of byte 64 in pa-features property indicates
> availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
> DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to
> find whether kvm supports 2
On Mon, Apr 12, 2021 at 05:14:32PM +0530, Ravi Bangoria wrote:
> Power10 is introducing second DAWR. Use real register names (with
> suffix 0) from ISA for current macros and variables used by Qemu.
>
> One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
> uapi header and thus not ch
On Thu, Apr 15, 2021 at 01:23:43PM +0530, Vaibhav Jain wrote:
> Add support for H_SCM_PERFORMANCE_STATS described at [1] for
> spapr nvdimms. This enables guest to fetch performance stats[2] like
> expected life of an nvdimm ('MemLife ') etc and display them to the
> user. Linux kernel support for
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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Title:
Unable to c
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1815263
Title:
hvf acceler
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1815445
Title:
change and
On Fri, Apr 16, 2021 at 06:09:41PM -0300, Daniel Henrique Barboza wrote:
> The Linux kernel will call set-indicator to move a DRC to 'unisolate' in
> the case a device removal fails. Setting a DRC that is already
Only issue I have with this patch is that this isn't quite accurate
yet. Can you rew
On Sat, Apr 17, 2021 at 10:36:20AM +0800, wangyanan (Y) wrote:
> Hi David,
>
> On 2021/4/16 12:52, David Gibson wrote:
> > On Tue, Apr 13, 2021 at 04:07:40PM +0800, Yanan Wang wrote:
> > > From: Andrew Jones
> > >
> > > qemu_fdt_add_path() works like qemu_fdt_add_subnode(), except
> > > it also
On Fri, Apr 16, 2021 at 11:13:48AM -0300, Matheus K. Ferst wrote:
> On 16/04/2021 00:52, David Gibson wrote:
> > On Thu, Apr 15, 2021 at 06:41:35PM -0300, matheus.fe...@eldorado.org.br
> > wrote:
> > > From: Matheus Ferst
> > >
> > > Based-on: <20210413211129.457272-1-luis.pi...@eldorado.org.br>
On Sat, Apr 17, 2021 at 12:30:23PM +0200, Philippe Mathieu-Daudé wrote:
> Commit 1ae1dc5ba24 ("raven: Set a correct PCI I/O memory region")
> abused an AddressSpace API weakness which allows set non-zero base
> address to AddressSpace root region. We will fix that in the next
> commit. First add an
On Sat, Apr 17, 2021 at 12:30:22PM +0200, Philippe Mathieu-Daudé wrote:
> Rather than using the magic 0x8000 number for the PCI I/O BAR
> physical address on the main system bus, use a definition.
>
> Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson
> ---
> hw/pci-host/raven.c
On Sat, Apr 17, 2021 at 12:30:21PM +0200, Philippe Mathieu-Daudé wrote:
> The ASIC PCI bridge chipset from Motorola is named 'Raven'.
> This chipset is used in the PowerPC Reference Platform (PReP),
> but not restricted to it. Rename it accordingly.
>
> Signed-off-by: Philippe Mathieu-Daudé
Acke
Switch to the dynamically generated pipeline scheme described in:
https://docs.gitlab.com/ee/ci/parent_child_pipelines.html#dynamic-child-pipelines
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.yml | 23 +--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git
To allow forks to easily decide which jobs they want to run,
but without disrupting the current default, move the current
set of jobs to a new file corresponding to the jobs run by
the mainstream project CI:
https://gitlab.com/qemu-project/qemu/-/pipelines
Signed-off-by: Philippe Mathieu-Daudé
--
Forks run the same jobs than mainstream, which might be overkill.
Allow them to easily rebase their custom set, while keeping using
the mainstream templates, and ability to pick specific jobs from
the mainstream set.
To switch to your set, simply add your .gitlab-ci.yml as
.gitlab-ci.d/${CI_PROJEC
Extract the crossbuild job templates to a new file
(crossbuild-template.yml) to be able to reuse them
without having to run all the jobs included, which
are mainly useful for mainstream CI.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/crossbuild-template.yml | 41 ++
This is an example to use a different set of jobs than the
mainstream one (currently 116 jobs).
Here I only select 2 jobs:
- cross-s390x-kvm-only
- build-libvhost-user
Including their dependencies, I have to run 8 jobs.
Result (build time 15 minutes and 25 seconds):
https://gitlab.com/philmd/q
Extract the DCO / checkpatch jobs to a new file (checks.yml)
to be able to run them without having to run all the jobs
included in the default .gitlab-ci.yml, which are mainly useful
for mainstream CI.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/checks.yml | 24 +++
Extract the build/test jobs run by default on the mainstream
CI into a new file (buildtest.yml) and their templates into
(buildtest-template.yml), to be able to reuse the templates
without having to run all these mainstream jobs by default.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/
Extract the container job template to a new file
(container-template.yml) to be able to reuse it
without having to run all the jobs included, which
are mainly useful for mainstream CI.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/container-template.yml | 22 ++
.git
It is not possible to use the previously extracted templates
without this set of core containers. Extract them into a new
file (container-core.yml) to be able to build them without
having to build all the other containers by default.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/contain
From: Philippe Mathieu-Daudé
The acceptance tests aren't accepting anything,
rename them as integration tests.
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Willian Rampazzo
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.yml | 20 ++--
1 file changed, 10 inserti
From: Philippe Mathieu-Daudé
'extends' is an alternative to using YAML anchors
and is a little more flexible and readable. See:
https://docs.gitlab.com/ee/ci/yaml/#extends
Reviewed-by: Wainer dos Santos Moschetta
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.yml | 20 ++
From: Philippe Mathieu-Daudé
'extends' is an alternative to using YAML anchors
and is a little more flexible and readable. See:
https://docs.gitlab.com/ee/ci/yaml/#extends
Reviewed-by: Wainer dos Santos Moschetta
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.yml | 64 ++
Extract the build stages used by our job templates to a new file
(stages.yml) to be able to include it with the other templates,
without having to run all the jobs included in the default
.gitlab-ci.yml, which are mainly useful for mainstream CI.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab
From: Philippe Mathieu-Daudé
'extends' is an alternative to using YAML anchors
and is a little more flexible and readable. See:
https://docs.gitlab.com/ee/ci/yaml/#extends
Reviewed-by: Wainer dos Santos Moschetta
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.yml | 40 ++
From: Philippe Mathieu-Daudé
'extends' is an alternative to using YAML anchors
and is a little more flexible and readable. See:
https://docs.gitlab.com/ee/ci/yaml/#extends
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d
TL;DR: Patch 13 is an experiment to dynamically generate pipelines.
Hi,
This series is an intent to allow git forks to use different set
of jobs than the ones used by the mainstream repository.
Currently, a fork gets the mainstream CI pipeline YAML configuration
and runs its set of jobs by defau
Patchew URL: https://patchew.org/QEMU/20210418225058.1257014-1-f4...@amsat.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210418225058.1257014-1-f4...@amsat.org
Subject: [PATCH v2 00/29] target/mips: Re-org to al
Add a new job to cross-build the mips64el target without
the TCG accelerator (IOW: only KVM accelerator enabled).
Only build the mips64el target which is known to work
and has users.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/crossbuilds.yml | 8 +
To ease maintenance, move all TCG specific files under the tcg/
sub-directory. Adapt the Meson machinery.
The following prototypes:
- mips_tcg_init()
- mips_cpu_do_unaligned_access()
- mips_cpu_do_transaction_failed()
can now be restricted to the "tcg-internal.h" header.
Reviewed-by: Richard Hend
Opcodes accessing Coprocessor 0 are privileged.
Move the CP0 helpers to sysemu/ and simplify the #ifdef'ry.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 9 +--
target/mips/cpu.c | 103 ---
target
Only the malta and loongson3-virt machines support KVM.
Restrict the other machines to TCG:
- mipssim
- magnum
- pica61
- fuloong2e
- boston
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/meson.build | 11 +++
1 file changed, 7 insertions(+), 4 d
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 13 ---
target/mips/tcg/tcg-internal.h | 14 +++
target/mips/cpu.c | 113 --
target/mips/exception.c| 169 +
target
Move TLB management helpers to tcg/sysemu/tlb_helper.c.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/helper.h| 10 -
target/mips/internal.h | 7 -
target/mips/tcg/sysemu_helper.h.inc | 9 +
target/mips/op_helper.c
Move helper_cache() to tcg/sysemu/special_helper.c.
The CACHE opcode is privileged and is not accessible in user
emulation. However we get a link failure when restricting the
symbol to sysemu. For now, add a stub helper to satisfy linking,
which abort if ever called.
Signed-off-by: Philippe Mathi
Move cp0_helper.c and mips-semi.c to the new tcg/sysemu/ folder,
adapting the Meson machinery.
Move the opcode definitions to tcg/sysemu_helper.h.inc.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/helper.h | 166 +
target/mips/tcg/sysemu_helper.h
Move the Special opcodes helpers to tcg/sysemu/special_helper.c.
Since mips_io_recompile_replay_branch() is set as
CPUClass::io_recompile_replay_branch handler in cpu.c,
we need to declare its prototype in "tcg-internal.h".
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
--
Move sysemu-specific files under the new sysemu/ subfolder
and adapt the Meson machinery.
Update the KVM MIPS entry in MAINTAINERS.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Update MAINTAINERS
---
target/mips/{ => sysemu}/addr.c | 0
target/mips/{ => sys
Move tlb_helper.c to the tcg/sysemu/ subdir, along with
the following 3 declarations to tcg-internal.h:
- cpu_mips_tlb_flush()
- cpu_mips_translate_address()
- r4k_invalidate_tlb()
Simplify tlb_helper.c #ifdef'ry because files in tcg/sysemu/
are only build when sysemu mode is configured.
Reviewed
The 3 map_address() handlers are local to tlb_helper.c,
no need to have their prototype declared publically.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 6 --
target/mips/tcg/sysemu/tlb_helper.c | 13 +++--
2 files
Similarly to the 'target_softmmu_arch' source set which allows
to restrict target-specific sources to system emulation, add
the equivalent 'target_user_arch' set for user emulation.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
v2: meson_user_arch -> target_user_arch i
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 4
target/mips/tcg/tcg-internal.h | 9 +
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 8789ffb319f..d7980ba9a94 100644
--- a/target/mips/i
mmu_init() is only required by TCG accelerator.
Restrict its declaration and call to TCG.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 3 ---
target/mips/tcg/tcg-internal.h | 2 ++
target/mips/cpu.c | 2 +-
3 files change
As mips_cpu_dump_state() is only used once to initialize the
CPUClass::dump_state handler, we can move it to cpu.c to keep
it symbol local.
Beside, this handler is used by all accelerators, while the
translate.c file targets TCG.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daud
Declare get_physical_address() with local scope and move it along
with mips_cpu_get_phys_page_debug() to sysemu/physaddr.c new file.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
v2: phys.c -> physaddr.c in description (rth)
---
target/mips/internal.h | 25 ++
We have 2 blocks guarded with #ifdef for sysemu, which
are simply separated by the cpu_signal_handler definition.
To simplify the following commits which involve various
changes in internal.h, first join the sysemu-guarded blocks.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Da
mips_cpu_reset() is used by all accelerators, and calls
msa_reset(), which is defined in msa_helper.c.
Beside msa_reset(), the rest of msa_helper.c is only useful
to the TCG accelerator. To be able to restrict this helper
file to TCG, we need to move msa_reset() out of it.
Reviewed-by: Richard He
tlb_helper.c's #ifdef'ry hides a quite simple user-mode
implementation of mips_cpu_tlb_fill().
Copy the user-mode implementation (without #ifdef'ry) to
tcg/user/helper.c and simplify tlb_helper.c's #ifdef'ry.
This will allow us to restrict tlb_helper.c to sysemu.
Reviewed-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/ldst_helper.c | 304 ++
target/mips/op_helper.c | 274 --
target/mips/meson.build | 1 +
3 files changed, 305 insertions(+), 274 deletion
We will gradually move TCG-specific declarations to a new local
header: "tcg-internal.h". To keep review simple, first add this
header with 2 TCG prototypes, which we are going to move in the
next 2 commits.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/in
restore_msa_fp_status() is declared inlined in fpu_helper.h,
and uses the ieee_rm[] array. Therefore any code calling
restore_msa_fp_status() must have access to this ieee_rm[] array.
kvm_mips_get_fpu_registers(), which is in target/mips/kvm.c,
calls restore_msa_fp_status.
Except this tiny array,
The #ifdef'ry hides that the user-mode implementation of
mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE.
Add this simple implementation to tcg/user/tlb_helper.c, and
the corresponding Meson machinery to build this file when user
emulation is configured.
Reviewed-by: Richard Hende
Rename set_pc() as mips_cpu_set_error_pc(), declare it inlined
and use it in cpu.c and op_helper.c.
Reported-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 11 +++
target/mips/cpu.c | 8 +---
target/mips/op_helper.c | 16 +++-
The CPU/FPU regnames[] arrays is used in mips_tcg_init() and
mips_cpu_dump_state(), which while being in translate.c is
not specific to TCG.
To be able to move mips_cpu_dump_state() to cpu.c, which is
compiled for all accelerator, we need to make the regnames[]
arrays global to target/mips/ by dec
We already have the mips_tcg_ss source set for TCG-specific files,
use it for mxu_translate.c and tx79_translate.c to simplify a bit.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/meson.build | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff
Turn printfpr() macro into a proper function: fpu_dump_fpr().
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.c | 48 ++-
1 file changed, 22 insertions(+), 26 deletions(-)
diff --git a/target/mips/cpu.c b/tar
Since all entries are no more than 4 bytes (including nul
terminator), can save space and pie runtime relocations by
declaring regnames[] as array of 4 const char.
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 4 ++--
target/mips/cpu.c |
TL;DR:
This series restrict TCG-specific objects by moving them to
the tcg/ subdir. Code is moved around to satisfy 3 cases:
{ generic sysemu / tcg sysemu / tcg user}.
Since v1:
- Addressed Richard review comments
- Added Richard R-b tag
Missing review: 5, 7, 8, 17, 18, 23
Hi,
This series move
On 4/18/21 9:08 PM, Richard Henderson wrote:
> On 4/18/21 9:31 AM, Philippe Mathieu-Daudé wrote:
>> +static inline hwaddr do_translate_address(CPUMIPSState *env,
>> + target_ulong address,
>> + MMUAccessType access_ty
On 4/18/21 9:35 PM, Richard Henderson wrote:
> On 4/18/21 9:31 AM, Philippe Mathieu-Daudé wrote:
>> Declare cpu_mips_get_random() and update_pagemask() on local scope,
>
> What is "local scope"? Anyway, I don't see what this has to do with the
> rest of the code movement.
I guess I meant 'TCG'.
Hi,
Slight update - as I decided to passthru my NIC as well => driver
install there also causes a VM (Windows 10) reboot. Seems all driver
installs fail?
Running on the latest master, QEMU emulator version 5.2.93 (v6.0.0-rc3).
Thanks!
--
You received this bug notification because you are a mem
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
+++ b/target/hexagon/idef-parser/prepare
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+#
+# Copyright(c) 2019-2021 rev.ng Srls. All Rights Reserved.
+#
+# This library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Les
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
From: Paolo Montesel
Signed-off-by: Alessandro Di Federico
Signed-off-by: Paolo Montesel
---
target/hexagon/translate.c | 3 ++-
target/hexagon/translate.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderso
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
+void gen_store32(TCGv vaddr, TCGv src, tcg_target_long width, unsigned slot)
+{
+tcg_gen_mov_tl(hex_store_addr[slot], vaddr);
+tcg_gen_movi_tl(hex_store_width[slot], width);
+tcg_gen_mov_tl(hex_store_val32[slot], src);
+}
+
+void gen_
On 4/18/21 10:34 PM, Richard Henderson wrote:
> On 4/18/21 9:31 AM, Philippe Mathieu-Daudé wrote:
>> TCG frontend "exec/helper-head.h" expects each target to declare
>> its helpers in 'target/$TARGET/helper.h'. To ease maintenance we
>> rather to have all TCG specific files under our tcg/ sub direc
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
From: Paolo Montesel
Make certain helper functions non-static, making them available outside
genptr.c. These functions are required by code generated by the
idef-parser.
Signed-off-by: Alessandro Di Federico
Signed-off-by: Paolo Montesel
---
t
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
From: Paolo Montesel
Signed-off-by: Alessandro Di Federico
Signed-off-by: Paolo Montesel
---
target/hexagon/genptr.c | 6 --
target/hexagon/macros.h | 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
Acked-by: Richard Henderson
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
From: Alessandro Di Federico
Signed-off-by: Alessandro Di Federico
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
Reviewed-by: Richard Henderson
r~
On 4/15/21 9:34 AM, Alessandro Di Federico wrote:
From: Alessandro Di Federico
This commit moves into a separate file routines used to manipulate
TCGCond. These will be employed by the idef-parser.
Signed-off-by: Alessandro Di Federico
Signed-off-by: Paolo Montesel
---
include/tcg/tcg-cond.h
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