On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> The Rainer BMC board is a board for the middle range POWER10 IBM systems.
Rainier
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
> ---
> hw/arm/aspeed.c | 79 +
> 1 file c
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> The m25p80 test depends on the Aspeed SMC controller to test our
> SPI-NOR flash support. Reflect this dependency by changing the name.
>
> Signed-off-by: Cédric Le Goater
\o/ more tests
Reviewed-by: Joel Stanley
> ---
> tests/qtest/{m
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> It will simplify extensions of the SMC model.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
> ---
> include/hw/ssi/aspeed_smc.h | 2 +-
> hw/ssi/aspeed_smc.c | 44 +
> 2 files
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> The AST2600 SPI controllers have a set of bits to request/grant DMA
> access. Add a new SMC feature for these controllers and use it to
> check access to the DMA registers.
Ah this is why you added the features mask. Makes sense.
Reviewed-
Hi experts,
How can I disable the floppy controller drive when I boot a VM by qemu-
system-x86_64? I did not specify any arguments about floppy, but after
the qemu boots up, linux always can detect floppy drive and then
modprobe the matched floppy.ko.
qemu version: v5.2
command line:
qemu-syst
Hi,
> device-list-properties uses module_object_class_by_name(), requires the
> result to be a concrete device type, iterates over QOM properties with
> object_property_iter_init() / object_property_iter_next(), skipping
> properties named "type", "realized", "hotpluggable", "hotplugged",
> "par
Thanks @Babu for the clarifications!
I really hope that the qemu patch makes it in v6.0 - then I can better consider
picking it up as backport for qemu (already have a bug about that in bug
1921754 - therefore I'm setting the qemu task here as invalid)
The last step I can provide for the kernel
The ground clock isn't really an internal component of the CPRMAN
peripheral. Use the qdev_ground_clock() helper to access the board
ground plane.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/bcm2835_cprman.h | 1 -
hw/misc/bcm2835_cprman.c | 7 ++-
2 files changed, 2 in
Clocks are rarely left unconnected, but rather connected to ground
plane to avoid noise. When representing the clock tree, we want to
see such ground clock. As we might reuse this clock on various
boards, introduce the qdev_ground_clock() which return a singleton
ground clock.
Signed-off-by: Phili
The XOsc signal isn't a part of the CPRMAN, but comes from a
crystal oscillator external to the SoC.
Create the oscillator on the board, and propagate it to the
CPRMAN.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/bcm2835_cprman.h | 1 -
hw/arm/bcm2835_peripherals.c | 1 +
hw/a
Use the newly added machine_create_constant_clock() helper
to create the CPU reference clocks.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/fuloong2e.c | 4 ++--
hw/mips/jazz.c | 6 +++---
hw/mips/loongson3_virt.c | 4 ++--
hw/mips/mipssim.c| 7 ---
4 files change
While the documentation mentions:
Note that if you are creating a clock with a fixed period which
will never change (for example the main clock source of a board),
then you'll have nothing else to do. This value will be propagated
to other clocks when connecting the clocks together and dev
Boards usually have crystal oscillators (at fixed frequency)
feeding their various clocked components.
Add a helper to create such constant clocks in the machine.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/boards.h | 17 +
hw/core/machine.c | 11 +++
2 files
Use the newly added machine_create_constant_clock() helper
to create the SYSCLKs.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2-tz.c | 6 ++
hw/arm/mps2.c| 3 +--
hw/arm/musca.c | 6 ++
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/hw/arm/mps2-tz.c b/hw/ar
To enforce correct API usage, restrict the clock creation to
hw/core/. The only possible ways to create a clock are:
- Constant clock at the board level
Using machine_create_constant_clock() in machine_init()
- Propagated clock in QDev
Using qdev_init_clock_in() or qdev_init_clock_out() in
Move the 'clock_propagate' trace event to clock_propagate_period()
to display the recursive propagation, and add 'propagate_children'
event to closely look at the clock propagation for each children
in the clock tree.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/clock.c | 8 +++-
h
Hi Damian, Luc, Peter.
I've been debugging some odd issue with the clocks:
a clock created in the machine (IOW, not a qdev clock) isn't
always resetted, thus propagating its value.
"not always" is the odd part. In the MPS2 board, the machine
clock is propagated. Apparently because the peripherals
在 2021/4/8 下午6:12, Xie Yongji 写道:
This commit introduces a new vhost-vdpa block device, which
will set up a vDPA device specified by a "vdpa-dev" parameter,
something like:
qemu-system-x86_64 \
-device vhost-vdpa-blk-pci,vdpa-dev=/dev/vhost-vdpa-0
Signed-off-by: Xie Yongji
---
hw/bloc
On 31/03/2021 13:53, Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime compon
On Thu, 8 Apr 2021 10:49:13 -0700
Isaku Yamahata wrote:
>
> How about initializing them explicitly as follows?
> ($realfile ne '') prevents the case realfile eq '' && acpi_testexpted eq ''.
> Anyway your patch also should fix it. So
> Reviewed-by: Isaku Yamahata
>
>
> diff --git a/scripts/che
On Fri, Apr 2, 2021 at 8:50 PM Alistair Francis
wrote:
>
> From: Hou Weiying
>
> This commit adds support for ePMP v0.9.1.
>
> The ePMP spec can be found in:
> https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
>
> Signed-off-by: Hongzheng-Li
> Signed-off-by: Hou Wei
The performance data has been added to the commit message in V6.
Thanks,
Lei.
-Original Message-
From: Dr. David Alan Gilbert
Sent: Monday, March 29, 2021 7:32 PM
To: Rao, Lei
Cc: Zhang, Chen ; lizhij...@cn.fujitsu.com;
jasow...@redhat.com; quint...@redhat.com; pbonz...@redhat.com;
l
From: "Rao, Lei"
The data pointer has skipped vnet_hdr_len in the function of
parse_packet_early().So, we can not subtract vnet_hdr_len again
when calculating pkt->header_size in fill_pkt_tcp_info(). Otherwise,
it will cause network packet comparsion errors and greatly increase
the frequency of c
From: "Rao, Lei"
Use the packet_new_nocopy instead of packet_new in the
filter-rewriter module. There will be one less memory
copy in the processing of each network packet.
Signed-off-by: Lei Rao
---
net/colo.c| 25 +
net/colo.h| 1 +
net/filter
From: "Rao, Lei"
if we don't reset the auto-converge counter,
it will continue to run with COLO running,
and eventually the system will hang due to the
CPU throttle reaching DEFAULT_MIGRATE_MAX_CPU_THROTTLE.
Signed-off-by: Lei Rao
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: Lukas Straub
From: "Rao, Lei"
This patch fixes the following:
qemu-system-x86_64: invalid runstate transition: 'colo' ->'shutdown'
Aborted (core dumped)
Signed-off-by: Lei Rao
Reviewed-by: Li Zhijian
Reviewed-by: Zhang Chen
Reviewed-by: Lukas Straub
Tested-by: Lukas Straub
---
softmmu/runstate.
From: "Rao, Lei"
When flushing memory from ram cache to ram during every checkpoint
on secondary VM, we can copy continuous chunks of memory instead of
4096 bytes per time to reduce the time of VM stop during checkpoint.
Signed-off-by: Lei Rao
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: L
From: "Rao, Lei"
This patch fixes the following:
#0 __GI_raise (sig=sig@entry=6) at ../sysdeps/unix/sysv/linux/raise.c:50
#1 0x7f6ae4559859 in __GI_abort () at abort.c:79
#2 0x559aaa386720 in error_exit (err=16, msg=0x559aaa5973d0
<__func__.16227> "qemu_mutex_destroy") at
From: "Rao, Lei"
There is the same trace code in the colo_compare_packet_payload.
Signed-off-by: Lei Rao
Reviewed-by: Li Zhijian
Reviewed-by: Zhang Chen
Reviewed-by: Lukas Straub
Tested-by: Lukas Straub
---
net/colo-compare.c | 13 -
1 file changed, 13 deletions(-)
diff --git
From: "Rao, Lei"
When we use continuous dirty memory copy for flushing ram cache on
secondary VM, we can also clean up the bitmap of contiguous dirty
page memory. This also can reduce the VM stop time during checkpoint.
The performance test for COLO as follow:
Server configuraton:
CPU :Intel(R)
From: "Rao, Lei"
We can detect disk migration in migrate_prepare, if disk migration
is enabled in COLO mode, we can directly report an error.and there
is no need to disable block migration at every checkpoint.
Signed-off-by: Lei Rao
Signed-off-by: Zhang Chen
Reviewed-by: Li Zhijian
Reviewed-b
From: "Rao, Lei"
The iov_size has been calculated in filter_send(). we can directly
return the size.In this way, this is no need to repeat calculations
in filter_redirector_receive_iov();
Signed-off-by: Lei Rao
Reviewed-by: Li Zhijian
Reviewed-by: Zhang Chen
Reviewed-by: Lukas Straub
Tested-
From: Rao, Lei
Changes since v5:
--Replaced g_slice_new calls with g_slice_new0.
Changes since v4:
--Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD in
colo_bitmap_clear_dirty.
--Modify some minor issues about variable definition.
--Add some performance test
Confirmed also a problem on the Windows build. Work around is to copy en-us
file from
C:\Program Files\qemu\keymaps to qemu folder.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1895219
Title:
qe
On Fri, 9 Apr 2021, at 09:32, Joel Stanley wrote:
> The HACE (Hash and Crypto Engine) is a device that offloads MD5, SHA1,
> SHA2, RSA and other cryptographic algorithms.
>
> This initial model implements a subset of the device's functionality;
> currently only MD5/SHA hashing, and on the ast26
On Fri, Apr 9, 2021 at 7:21 AM Raphael Norwitz
wrote:
>
> I'm mostly happy with this. Just some asks on variable renaming and
> comments which need to be fixed because of how you've moved things
> around.
>
OK. Thank you for reviewing!
> Also let's add a MAINTAINERS entry vhost-blk-common.h/c ei
On Thu, 8 Apr 2021 at 21:19, Thomas Gleixner wrote:
>
> On Tue, Apr 06 2021 at 21:47, Sean Christopherson wrote:
> > On Tue, Apr 06, 2021, Michael Tokarev wrote:
> >> broke kvm guest cpu time accounting - after this commit, when running
> >> qemu-system-x86_64 -enable-kvm, the guest time (in /proc
On Thursday, April 8, 2021 2:17 PM, Richard Henderson wrote:
> NACK, for the reasons stated against v1:
> https://lists.gnu.org/archive/html/qemu-devel/2021-04/msg00663.html
On Tuesday, April 6, 2021 11:21 AM, Richard Henderson wrote:
> I think we should retain the deprecation until you actually
When exiting a TB, generate all the code before returning from
hexagon_tr_translate_packet so that nothing needs to be done in
hexagon_tr_tb_stop.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/translate.c | 62 ++
The following instructions are added
L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev)
L2_loadrb_pbr Rd32 = memb(Rx32++Mu2:brev)
L2_loadruh_pbr Rd32 = memuh(Rx32++Mu2:brev)
L2_loadrh_pbr Rd32 = memh(Rx32++Mu2:brev)
L2_loadri_pbr Rd32 = m
Rd32,Pe4 = sfrecipa(Rs32, Rt32)
Recripocal approx
Test cases in tests/tcg/hexagon/multi_result.c
FP exception tests added to tests/tcg/hexagon/fpstuff.c
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 26 +--
target/hexagon/a
The following instructions are added
L2_loadalignb_io Ryy32 = memb_fifo(Rs32+#s11:1)
L2_loadalignh_io Ryy32 = memh_fifo(Rs32+#s11:1)
L4_loadalignb_ur Ryy32 = memb_fifo(Rt32<<#u2+#U6)
L4_loadalignh_ur Ryy32 = memh_fifo(Rt32<<#u2+#U6)
L4_loadali
Suggested-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index 6b74344..b87e264 100644
--- a/target/hexago
Include size in declaration
Remove {0, 0} entry
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/reg_fields.c | 3 +--
target/hexagon/reg_fields.h | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/hexa
Rdd32,Pe4 = vminub(Rtt32, Rss32)
Vector min of bytes
Test cases in tests/tcg/hexagon/multi_result.c
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg.h | 27 +++
target/hexagon/genptr.c | 22 ++
Rd32,Pe4 = sfinvsqrta(Rs32)
Square root approx
The helper packs the 2 32-bit results into a 64-bit value,
and the fGEN_TCG override unpacks them into the proper results.
Test cases in tests/tcg/hexagon/multi_result.c
FP exception tests added to tests/tcg/hexagon/fpstuff.c
Reviewed-by: Richar
Change #if HEX_DEBUG to if (HEX_DEBUG) so the debug code doesn't bit rot
Suggested-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c| 72 ++--
target/hexagon/helper.h| 2 --
targe
The following instruction is added
S2_cabacdecbinRdd32=decbin(Rss32,Rtt32)
Test cases added to tests/tcg/hexagon/misc.c
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 91 +++
target/hexago
Change (cond ? (res = x) : (res = y)) to res = (cond ? x : y)
This makes the semnatics easier to for idef-parser to deal with
The following instructions are impacted
C2_any8
C2_all8
C2_mux
C2_muxii
C2_muxir
C2_muxri
Reviewed-by: Richard Henderson
Signed-off-by: Taylor S
Similar to previous cleanup of gen_log_predicated_reg_write
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.
Rdd32 = add(Rss32, Rtt32, Px4):carry
Add with carry
Rdd32 = sub(Rss32, Rtt32, Px4):carry
Sub with carry
Test cases in tests/tcg/hexagon/multi_result.c
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg.h | 37
target/he
The following instructions are added
L2_loadrub_pci Rd32 = memub(Rx32++#s4:0:circ(Mu2))
L2_loadrb_pci Rd32 = memb(Rx32++#s4:0:circ(Mu2))
L2_loadruh_pci Rd32 = memuh(Rx32++#s4:1:circ(Mu2))
L2_loadrh_pci Rd32 = memh(Rx32++#s4:1:circ(Mu2))
L2_l
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/cpu.c | 9 -
target/hexagon/decode.c| 6 +++---
target/hexagon/fma_emu.c | 39 ---
target/hexagon/op_helper.c | 37 ++
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 13 -
target/hexagon/arch.h | 1 -
target/hexagon/macros.h | 2 --
3 files changed, 16 deletions(-)
diff --git a/target/hexagon/arch.c b/target/hexagon/arc
Rxx32,Pe4 = vacsh(Rss32, Rtt32)
Add compare and select elements of two vectors
Test cases in tests/tcg/hexagon/multi_result.c
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg.h | 5 +++
target/hexagon/helper.h | 2 +
targe
Remove hexagon_env_get_cpu and replace with env_archcpu
Replace CPU(hexagon_env_get_cpu(env)) with env_cpu(env)
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
linux-user/hexagon/cpu_loop.c | 2 +-
target/hexagon/cpu.c | 4 ++--
target/
The following instructions are added
L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1)
L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1)
L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1)
L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1)
L4_loadbzw2_ur Rd32 = memubh
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
fpu/softfloat-specialize.c.inc | 3 +++
target/hexagon/cpu.c | 5 +
target/hexagon/op_helper.c | 47 --
3 files changed, 8 insertions(+),
Use the proper return for helpers that convert to unsigned
Remove target/hexagon/conv_emu.[ch]
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/conv_emu.c | 177
target/hexagon/conv_em
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 28 +++-
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c
index bb51f19..40b6e3d 100644
-
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c
index 699e2cf..bb51f19 100644
--- a/target/hexagon/arch.c
+++
Multiple writes to the same preg are and'ed together. Rather than
generating a runtime check, we can determine at TCG generation time
if the predicate has previously been written in the packet.
Test added to tests/tcg/hexagon/misc.c
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Simplify TCG generation of hex_reg_written
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr
This patch series is a significant update for the Hexagon target
The first 16 patches address feedback from Richard Henderson
and Philippe Mathieu-Daud�
The next 10 patches add the remaining instructions for the Hexagon
scalar core
The patches are logically independent but are or
Suggested-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/cpu_bits.h | 2 +-
target/hexagon/decode.c| 80 +++---
target/hexagon/insn.h | 21 ++--
Add the hash and crypto engine model to the Aspeed socs.
Reviewed-by: Andrew Jeffery
Reviewed-by: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Klaus Heinrich Kiwi
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 1 -
include/hw/arm/aspeed_soc.h | 3 +++
hw
The HACE (Hash and Crypto Engine) is a device that offloads MD5, SHA1,
SHA2, RSA and other cryptographic algorithms.
This initial model implements a subset of the device's functionality;
currently only MD5/SHA hashing, and on the ast2600's scatter gather
engine.
Co-developed-by: Klaus Heinrich Ki
This adds a test for the Aspeed Hash and Crypto (HACE) engine. It tests
the currently implemented behavior of the hash functionality.
The tests are similar, but are cut/pasted instead of broken out into a
common function so the assert machinery produces useful output when a
test fails.
Co-develop
This version of the series adds the cleanups Cédric made and the scatter
gather feature that Klaus implemented. I took inspiration from Klaus's
patches and reworked the direct hashing mode to easier implement both sg
and direct modes.
The r-b tags are preserved as the changes were minor. I welcome
I'm mostly happy with this. Just some asks on variable renaming and
comments which need to be fixed because of how you've moved things
around.
Also let's add a MAINTAINERS entry vhost-blk-common.h/c either under
vhost-user-blk or create a new vhost-blk entry. I'm not sure what the
best practices a
On Thu, Apr 08, 2021 at 09:53:13PM +0530, Padmakar Kalghatgi wrote:
> +/*
> + * The first PRP list entry, pointed by PRP2 can contain
> + * offsets. Hence, we need calculate the no of entries in
> + * prp2 based on the offset it has.
> +
On Thu, Apr 08, 2021 at 10:28:21AM -0500, Babu Moger wrote:
>
>
> > -Original Message-
> > From: Christian Ehrhardt
> > Sent: Thursday, April 1, 2021 3:06 AM
> > To: david.edmond...@oracle.com
> > Cc: Moger, Babu ; Paolo Bonzini
> > ; Richard Henderson
> > ; Eduardo Habkost
> > ; pankaj.
Certain SMP topologies stress, e.g. 1 thread/core, 2048 cores and
1 socket, stress the current maximum size of the pSeries FDT:
Calling ibm,client-architecture-support...qemu-system-ppc64: error
creating device tree: (fdt_setprop(fdt, offset,
"ibm,processor-segment-sizes", segs, sizeof(segs))): FD
Up to this patch, 'max_cpus' value is hardcoded to 1024 (commit
6244bb7e5811). In theory this patch would simply bump it to 2048, since
it's the default NR_CPUS kernel setting for ppc64 servers nowadays, but
the whole mechanic of MachineClass:max_cpus is flawed for the pSeries
machine. The two supp
Hello,
After having to change hardcoded values to launch a 2048 KVM
pSeries guests I decided to post these upstream because, at
least for me, the current max_cpus usage is lackluster for
pSeries. More info in patch 01.
Patch 02 is a trivial follow-up to increase the FDT size.
Daniel Henrique Bar
From: "Dr. David Alan Gilbert"
Call the notifier during finalize; it's currently only called
if we change it, which is not the intent.
Signed-off-by: Dr. David Alan Gilbert
---
io/net-listener.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/io/net-listener.c b/io/net-listener.c
index
From: "Dr. David Alan Gilbert"
Hi,
This RFC set adds support for multipath TCP (mptcp),
in particular on the migration path - but should be extensible
to other users.
Multipath-tcp is a bit like bonding, but at L3; you can use
it to handle failure, but can also use it to split traffic across
From: "Dr. David Alan Gilbert"
Multipath TCP allows combining multiple interfaces/routes into a single
socket, with very little work for the user/admin.
It's enabled by 'mptcp' on most socket addresses:
./qemu-system-x86_64 -nographic -incoming tcp:0:,mptcp
Signed-off-by: Dr. David Alan
From: "Dr. David Alan Gilbert"
Delay closing the listener until the cleanup hook at the end; mptcp
needs the listener to stay open while the other paths come in.
Signed-off-by: Dr. David Alan Gilbert
---
migration/multifd.c | 5 +
migration/socket.c | 24 ++--
2 files
From: "Dr. David Alan Gilbert"
Add a cleanup hook for incoming migration that gets called
at the end as a way for a transport to allow cleanup.
Signed-off-by: Dr. David Alan Gilbert
---
migration/migration.c | 3 +++
migration/migration.h | 4
2 files changed, 7 insertions(+)
diff --git
Some test cases on x86_cpu_model_versions.py are corner cases because they
need to pass extra options to the -cpu argument. Once the avocado_qemu
framework will set -cpu automatically, the value should be reset. This changed
those tests so to call set_vm_arg() to overwrite the -cpu value.
Signed-o
This introduces a new feature to the functional tests: automatic setting of
the '-cpu VALUE' option to the created vm if the test is tagged with
'cpu:VALUE'. The 'cpu' property is made available to the test object as well.
For example, for a simple test as:
def test(self):
"""
The tests that are already tagged with "cpu:VALUE" don't need to add
"-cpu VALUE" to the list of arguments of the vm object because the avocado_qemu
framework is able to handle it automatically.
Signed-off-by: Wainer dos Santos Moschetta
---
tests/acceptance/boot_linux.py | 3 ---
tests/
Currently the acceptance tests tagged with "machine" have the "-M TYPE"
automatically added to the list of arguments of the QEMUMachine object.
In other words, that option is passed to the launched QEMU. On this
series it is implemented the same feature but instead for tests marked
with "cpu".
The
There are test cases on machine_mips_malta.py and tcg_plugins.py files
where the cpu tag does not correspond to the value actually given to the QEMU
binary. This fixed those tests tags.
Signed-off-by: Wainer dos Santos Moschetta
---
tests/acceptance/machine_mips_malta.py | 6 +++---
tests/accept
This added the args property to QEMUMachine so that users of the class
can access and handle the list of arguments to be given to the QEMU
binary.
Signed-off-by: Wainer dos Santos Moschetta
---
python/qemu/machine.py | 5 +
1 file changed, 5 insertions(+)
diff --git a/python/qemu/machine.py
On 4/7/21 9:50 AM, Emanuele Giuseppe Esposito wrote:
Extend the _post_launch function to include the timer as
parameter instead of defaulting to 15 sec.
Signed-off-by: Emanuele Giuseppe Esposito
---
python/qemu/machine.py | 4 ++--
python/qemu/qtest.py | 4 ++--
2 files changed, 4 inserti
From: "Dr. David Alan Gilbert"
MSG_CMSG_CLOEXEC cleans up received fd's; it's really only for Unix
sockets, but currently we enable it for everything; some socket types
(IP_MPTCP) don't like this.
Only enable it when we're giving the recvmsg room to receive fd's
anyway.
Signed-off-by: Dr. David
On 4/7/21 9:50 AM, Emanuele Giuseppe Esposito wrote:
Signed-off-by: Emanuele Giuseppe Esposito
---
python/qemu/machine.py | 2 +-
python/qemu/qtest.py | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/python/qemu/machine.py b/python/qemu/machine.py
index c721e07d63..
On Thu, 8 Apr 2021 00:56:08 +0200
Philippe Mathieu-Daudé wrote:
> The i.MX25 PDK board has 2 banks for SDRAM, each can
> address up to 256 MiB. So the total RAM usable for this
> board is 512M. When we ask for more we get a misleading
> error message:
>
> $ qemu-system-arm -M imx25-pdk -m 513
The existing tests which are passing "-cpu VALUE" argument to the vm object
are now properly "cpu:VALUE" tagged, so letting the avocado_qemu framework to
handle that automatically.
Signed-off-by: Wainer dos Santos Moschetta
---
tests/acceptance/boot_linux_console.py | 16 +---
test
The set_vm_arg method is added to avocado_qemu.Test class on this
change. Use that method to set (or replace) an argument to the list of
arguments given to the QEMU binary.
Suggested-by: Cleber Rosa
Signed-off-by: Wainer dos Santos Moschetta
---
tests/acceptance/avocado_qemu/__init__.py | 16 ++
Make virtio-fs take into account server capabilities.
Just returning requested features assumes they all of then are implemented
by server and results in setting unsupported configuration if some of them
are absent.
Signed-off-by: Anton Kuchin
---
hw/virtio/vhost-user-fs.c | 17 +---
> On Apr 8, 2021, at 12:40 PM, Howard Spoelstra wrote:
>
> On Thu, Apr 8, 2021 at 1:05 PM Gerd Hoffmann wrote:
>>
>> Hi,
>>
Those might be a good place to start. IOKit provides the drivers and
also the io registry which is probably where you can get if a driver
is bound to a
On 4/7/21 6:57 PM, Taylor Simpson wrote:
+static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
+{
+/*
+ * Section 2.2.4 of the Hexagon V67 Programmer's Reference Manual
+ *
+ * The "I" value from a modifier register is divided into two pieces
+ * LSB
> On Apr 8, 2021, at 7:05 AM, Gerd Hoffmann wrote:
>
> Hi,
>
>>> Those might be a good place to start. IOKit provides the drivers and
>>> also the io registry which is probably where you can get if a driver
>>> is bound to a device and which one is it. How to dissociate the
>>> driver from t
From: Klaus Jensen
For most commands, when issuing an AIO, the BlockAIOCB is stored in the
NvmeRequest aiocb pointer when the AIO is issued. The main use of this
is cancelling AIOs when deleting submission queues (it is currently not
used for Abort).
However, some commands like Dataset Managemen
From: Klaus Jensen
nvme_compare() fails to store the aiocb from the blk_aio_preadv() call.
Fix this.
Fixes: 0a384f923f51 ("hw/block/nvme: add compare command")
Cc: Gollu Appalanaidu
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff -
On 4/7/21 6:57 PM, Taylor Simpson wrote:
Rxx32,Pe4 = vacsh(Rss32, Rtt32)
Add compare and select elements of two vectors
Test cases in tests/tcg/hexagon/multi_result.c
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg.h | 5 +++
target/hexagon/helper.h
On 4/7/21 6:57 PM, Taylor Simpson wrote:
Change #if HEX_DEBUG to if (HEX_DEBUG) so that the debug code doesn't
bit rot.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c| 72 ++--
target/hexagon/helper.h
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