在 2021/3/22 下午8:24, Yuri Benditovich 写道:
Allow fallback to userspace only upon migration, only for specific features
and only if 'vhostforce' is not requested.
Changes from v1:
Patch 1 dropeed (will be submitted in another series)
Added device callback in case the migration should fail due to
John Snow writes:
> On 3/24/21 1:57 AM, Markus Armbruster wrote:
>> John Snow writes:
>>
>>> On 3/23/21 5:40 AM, Markus Armbruster wrote:
Naming rules differ for the various kinds of names. To prepare
enforcing them, define functions to check them: check_name_upper(),
check_name
On 25-03-21, 14:17, Jie Deng wrote:
> i2c->adapter_num is set here, but used in vi2c_remove_adapters.
> when you goto out from while {...}, i2c->adapter_num is always 0,
> May be a bug ?
It certainly is, this should fix it:
diff --git a/tools/vhost-user-i2c/main.c b/tools/vhost-user-i2c/main.c
in
On 2021/3/24 15:33, Viresh Kumar wrote:
+static int vi2c_parse(VuI2c *i2c)
+{
+uint16_t client_addr[MAX_I2C_VDEV];
+int32_t n_adapter = 0, n_client;
+int64_t addr, bus;
+const char *cp, *t;
+
+while (device_list) {
+/* Read :[:] entries one by one */
+cp = st
On Wed, Mar 24, 2021 at 2:34 PM Jason Wang wrote:
>
>
> 在 2021/3/23 上午9:56, Cindy Lu 写道:
> > Add support for configure interrupt, use kvm_irqfd_assign and set the
> > gsi to kernel. When the configure notifier was eventfd_signal by host
> > kernel, this will finally inject an msix interrupt to gue
It is -- maybe -- possibly -- three nanoseconds faster.
Signed-off-by: John Snow
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
---
This can be dropped if desired; it has no real functional impact I could
defend in code review court. I just happened to write it this way.
Signed-off-by
Signed-off-by: John Snow
Tested-by: Eduardo Habkost
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
Tested-by: Cleber Rosa
---
scripts/qapi/pylintrc | 1 -
1 file changed, 1 deletion(-)
diff --git a/scripts/qapi/pylintrc b/scripts/qapi/pylintrc
index b9e077a164..fb0386d529 100644
--- a
John Snow writes:
> On 3/24/21 2:22 AM, Markus Armbruster wrote:
>> John Snow writes:
>>
>>> On 3/23/21 5:40 AM, Markus Armbruster wrote:
Event names should be ALL_CAPS with words separated by underscore.
Enforce this. The only offenders are in tests/. Fix them. Existing
test
This enforces a type signature against all of the top-level expression
check routines without necessarily needing to create some
overcomplicated class hierarchy for them.
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 63 +++-
1 file changed, 33 inser
Annotations do not change runtime behavior.
This commit *only* adds annotations.
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 68 +++
scripts/qapi/mypy.ini | 5
2 files changed, 43 insertions(+), 30 deletions(-)
diff --git a/scripts/qapi/exp
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 213 ++-
1 file changed, 208 insertions(+), 5 deletions(-)
diff --git a/scripts/qapi/expr.py b/scripts/qapi/expr.py
index 1869ddf815..adc5b903bc 100644
--- a/scripts/qapi/expr.py
+++ b/scripts/qapi/expr.p
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/scripts/qapi/expr.py b/scripts/qapi/expr.py
index 5921fa34ab..1869ddf815 100644
--- a/scripts/qapi/expr.py
+++ b/scripts/qapi/expr.py
@@ -233,14 +233,14 @@ def chec
mypy does not know the types of values stored in Dicts that masquerade
as objects. Help the type checker out by constraining the type.
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/scripts/qapi/ex
Casts are instructions to the type checker only, they aren't "safe" and
should probably be avoided in general. In this case, when we perform
type checking on a nested structure, the type of each field does not
"stick".
(See PEP 647 for an example of "type narrowing" that does "stick".
It is avail
This is a small rewrite to address some minor style nits.
Don't compare against the empty list to check for the empty condition, and
move the normalization forward to unify the check on the now-normalized
structure.
With the check unified, the local nested function isn't needed anymore
and can be
>On Wed, Mar 24, 2021 at 4:52 PM Max Reitz wrote:
>On 22.03.21 10:25, ChangLimin wrote:
>> For Linux 5.10/5.11, qemu write zeros to a multipath device using
>> ioctl(fd, BLKZEROOUT, range) with cache none or directsync return -EBUSY
>> permanently.
>
>So as far as I can track back the discussion,
It needs to be an object (dict), not anything else.
Signed-off-by: John Snow
---
Note: this actually doesn't ... work, but on-list, we discussed wanting
tests first, then the fix. That can't happen here, because QAPI crashes
at runtime. So uh, just squash this into the following patch, I guess?
The function can just use the argument from the scope above. Otherwise,
we get shadowed argument errors because the parameter name clashes with
the name of a variable already in-scope.
Signed-off-by: John Snow
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
---
scripts/qapi/expr.py | 6 +
We don't actually check, so the user can get some unpleasant stacktraces.
Formalize it.
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 7 +++
tests/qapi-schema/alternate-invalid-data-type.err | 2 ++
tests/qapi-schema/union-invalid-data-type.err | 2 ++
This is a minor adjustment that allows the 'required' and 'optional'
keys fields to take a default value of an empty, immutable sequence (the
empty tuple).
This reveals a quirk of this function, which is that "a + b" is
list-specific behavior. We can accept a wider variety of types if we
avoid tha
mypy isn't fond of allowing you to check for bool membership in a
collection of str elements. Guard this lookup for precisely when we were
given a name.
Signed-off-by: John Snow
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
---
scripts/qapi/expr.py | 4 +++-
1 file changed, 3 insertion
PEP8's BDFL writes: "For flowing long blocks of text with fewer
structural restrictions (docstrings or comments), the line length should
be limited to 72 characters."
I do not like this patch. I have included it explicitly to recommend we
do not pay any further heed to the 72 column limit.
Signed
OrderedDict is a subtype of dict, so we can check for a more general
form. These functions do not themselves depend on it being any
particular type.
Signed-off-by: John Snow
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
---
scripts/qapi/expr.py | 5 ++---
1 file changed, 2 insertions(+
There's not a big obvious difference between the types of checks that
happen in the main function versus the kind that happen in the
functions. Now they're in one place for each of the main types.
As part of the move, spell out the required and optional keywords so
they're obvious at a glance. Use
For readability purposes only, shimmy the early return upwards to the
top of the function, so cases proceed in order from least to most
complex.
Signed-off-by: John Snow
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
---
scripts/qapi/expr.py | 8
1 file changed, 4 insertions(+)
Fixes: 0825f62c842
Signed-off-by: John Snow
---
scripts/qapi/expr.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/qapi/expr.py b/scripts/qapi/expr.py
index 540b3982b1..c207481f7e 100644
--- a/scripts/qapi/expr.py
+++ b/scripts/qapi/expr.py
@@ -241,7 +241,7 @@ def c
Hi, this series adds static types to the QAPI module.
This is part three, and it focuses on expr.py.
Environment:
- Python >= 3.6, <= 3.8 *
- mypy >= 0.770
- pylint >= 2.6.0
- flake8
- isort
Every commit should pass with (from ./scripts/):
- flake8 qapi/
- pylint --rcfile=qapi/pylintrc qapi/
-
Signed-off-by: Dylan Jhong
Signed-off-by: Ruinland ChuanTzu Tsai
---
target/riscv/cpu.c | 2 +-
target/riscv/cpu.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 7d6ed80f6b..4ac901245a 100644
--- a/target/riscv/cpu.c
+++ b/tar
John Snow writes:
> On 2/24/21 5:35 AM, Markus Armbruster wrote:
>> John Snow writes:
>>
>>> mypy isn't fond of allowing you to check for bool membership in a
>>> collection of str elements. Guard this lookup for precisely when we were
>>> given a name.
>>>
>>> Signed-off-by: John Snow
>>> Rev
On 24/03/2021 22.58, Philippe Mathieu-Daudé wrote:
On 3/24/21 7:33 PM, Philippe Mathieu-Daudé wrote:
On 3/24/21 7:01 PM, Philippe Mathieu-Daudé wrote:
Hi,
Peter's current workflow is push to /staging and if his
testing succeeds, he pushes the same commit as /master.
IMO there is no point in b
On 25-03-21, 13:09, Jie Deng wrote:
>
> On 2021/3/24 15:33, Viresh Kumar wrote:
> > +
> > +/* Definitions from virtio-i2c specifications */
> > +#define VHOST_USER_I2C_MAX_QUEUES 1
> > +
> > +/* Status */
> > +#define VIRTIO_I2C_MSG_OK 0
> > +#define VIRTIO_I2C_MSG_ERR
On 2/25/21 10:28 AM, Markus Armbruster wrote:
John Snow writes:
There's not a big obvious difference between the types of checks that
happen in the main function versus the kind that happen in the
functions. Now they're in one place for each of the main types.
As part of the move, spell out t
On 2021/3/24 15:33, Viresh Kumar wrote:
+
+/* Definitions from virtio-i2c specifications */
+#define VHOST_USER_I2C_MAX_QUEUES 1
+
+/* Status */
+#define VIRTIO_I2C_MSG_OK 0
+#define VIRTIO_I2C_MSG_ERR 1
+
+/* The bit 0 of the @virtio_i2c_out_hdr.@flags, used to
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime component of the firmware (RTAS) has
been implemented as a 2
On Thu, Mar 25, 2021 at 11:40 AM Bin Meng wrote:
>
> On Thu, Mar 25, 2021 at 11:32 AM Dylan Jhong wrote:
> >
> > On Wed, Mar 24, 2021 at 10:59:55PM +0800, Alistair Francis wrote:
> > > On Tue, Mar 23, 2021 at 5:15 AM Dylan Jhong wrote:
> > > >
> > > > Although the AE350 has not been upstream (pr
On Wed, 24 Mar 2021 at 22:39, Klaus Heinrich Kiwi
wrote:
>
> Complement the Aspeed HACE support with Scatter-Gather hash support for
> sha256 and sha512. Scatter-Gather is only supported on AST2600-series.
Please update the documentation at docs/system/arm/aspeed.rst too.
>
> Signed-off-by: Klau
On Thu, Mar 25, 2021 at 11:32 AM Dylan Jhong wrote:
>
> On Wed, Mar 24, 2021 at 10:59:55PM +0800, Alistair Francis wrote:
> > On Tue, Mar 23, 2021 at 5:15 AM Dylan Jhong wrote:
> > >
> > > Although the AE350 has not been upstream (preparing for v2),
> > > the reset vector of the AE350 is known to
On Wed, Mar 24, 2021 at 10:59:55PM +0800, Alistair Francis wrote:
> On Tue, Mar 23, 2021 at 5:15 AM Dylan Jhong wrote:
> >
> > Although the AE350 has not been upstream (preparing for v2),
> > the reset vector of the AE350 is known to be at the 2G position,
> > so this patch is corrected in advance
On 25/03/2021 13:52, David Gibson wrote:
On Tue, Mar 23, 2021 at 01:58:30PM +1100, Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmwa
On Wed, 2021-03-24 at 07:44 -0600, Richard Henderson wrote:
> On 3/24/21 2:00 AM, Robert Hoo wrote:
> > +if ((env->xcr0 & XFEATURE_AVX512) == XFEATURE_AVX512) {
> > +/* XSAVE enabled AVX512 */
> > +nb = (env->hflags & HF_CS64_MASK) ? 32 : 8;
> > +for (i =
On Tue, Mar 23, 2021 at 02:21:33PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 3/22/21 10:03 PM, David Gibson wrote:
> > On Fri, Mar 19, 2021 at 03:34:52PM -0300, Daniel Henrique Barboza wrote:
> > > Kernel commit 4bce545903fa ("powerpc/topology: Update
> > > topology_core_cpumask") cause a re
Instructions with multiple definitions require special handling
because the generator wants to create a helper, but helpers can
only return a single result. Therefore, we must override the
generated code.
The following instructions are added
A4_addp_cRdd32 = add(Rss32, Rtt32, Px4):car
Simplify TCG generation of hex_reg_written
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index 7481f4c..349b949
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
linux-user/hexagon/cpu_loop.c | 2 +-
target/hexagon/cpu.c | 9 -
target/hexagon/cpu.h | 6 ++
target/hexagon/decode.c | 6 +++---
target/hexagon/fma_emu.c | 39 +++
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
fpu/softfloat-specialize.c.inc | 5 +
target/hexagon/cpu.c | 5 +
target/hexagon/op_helper.c | 47 --
3 files changed, 10 insertions(+), 47 deletions(-)
dif
The following instructions are added
L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1)
L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1)
L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1)
L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1)
L4_loadbzw2_ur Rd32 = memubh
Remove unused carry_from_add64 function
Change type of softfloat_roundingmodes
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 15 +--
target/hexagon/arch.h | 1 -
target/hexagon/macros.h | 2 --
3 files changed, 1 insertion(+
The following instructions are added
L2_loadalignb_io Ryy32 = memb_fifo(Rs32+#s11:1)
L2_loadalignh_io Ryy32 = memh_fifo(Rs32+#s11:1)
L4_loadalignb_ur Ryy32 = memb_fifo(Rt32<<#u2+#U6)
L4_loadalignh_ur Ryy32 = memh_fifo(Rt32<<#u2+#U6)
L4_loadali
The following instruction is added
S2_cabacdecbinRdd32=decbin(Rss32,Rtt32)
Test cases added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 91 +++
target/hexagon/arch.h | 4 ++
Multiple writes to the same preg are and'ed together. Rather than
generating a runtime check, we can determine at TCG generation time
if the predicate has previously been written in the packet.
Test added to tests/tcg/hexagon/misc.c
Address feedback from Richard Henderson
Signed-off-by: Taylor
The following instructions are added
L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev)
L2_loadrb_pbr Rd32 = memb(Rx32++Mu2:brev)
L2_loadruh_pbr Rd32 = memuh(Rx32++Mu2:brev)
L2_loadrh_pbr Rd32 = memh(Rx32++Mu2:brev)
L2_loadri_pbr Rd32 = m
This patch series is a significant update for the Hexagon target
The first 9 patches address feedback from Richard Henderson
The next 6 patches add the remaining instructions for the Hexagon scalar
core
The patches are logically independent but are organized as a series to avoid
potent
The following instructions are added
L2_loadrub_pci Rd32 = memub(Rx32++#s4:0:circ(Mu2))
L2_loadrb_pci Rd32 = memb(Rx32++#s4:0:circ(Mu2))
L2_loadruh_pci Rd32 = memuh(Rx32++#s4:1:circ(Mu2))
L2_loadrh_pci Rd32 = memh(Rx32++#s4:1:circ(Mu2))
L2_l
When exiting a TB, generate all the code before returning from
hexagon_tr_translate_packet so that nothing needs to be done in
hexagon_tr_tb_stop.
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/translate.c | 62 +
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 28 +++-
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c
index bb51f19..40b6e3d 100644
--- a/target/hexagon/arc
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/cpu_bits.h | 2 +-
target/hexagon/decode.c| 80 +++---
target/hexagon/insn.h | 21 ++--
target/hexagon/op_helper.c | 8 ++---
target/hexagon/trans
From: "Rao, Lei"
When we use continuous dirty memory copy for flushing ram cache on
secondary VM, we can also clean up the bitmap of contiguous dirty
page memory. This also can reduce the VM stop time during checkpoint.
Signed-off-by: Lei Rao
---
migration/ram.c | 29 +-
From: "Rao, Lei"
Use the packet_new_nocopy instead of packet_new in the
filter-rewriter module. There will be one less memory
copy in the processing of each network packet.
Signed-off-by: Lei Rao
---
net/colo.c| 23 +++
net/colo.h| 1 +
net/filter-r
Use the proper return for helpers that convert to unsigned
Remove target/hexagon/conv_emu.[ch]
Address feedback from Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/conv_emu.c | 177
target/hexagon/conv_emu.h | 31
t
On Tue, Mar 23, 2021 at 01:58:30PM +1100, Alexey Kardashevskiy wrote:
> The PAPR platform which describes an OS environment that's presented by
> a combination of a hypervisor and firmware. The features it specifies
> require collaboration between the firmware and the hypervisor.
>
> Since the beg
From: "Rao, Lei"
We can detect disk migration in migrate_prepare, if disk migration
is enabled in COLO mode, we can directly report an error.and there
is no need to disable block migration at every checkpoint.
Signed-off-by: Lei Rao
Signed-off-by: Zhang Chen
Reviewed-by: Li Zhijian
---
migra
From: "Rao, Lei"
This patch fixes the following:
#0 __GI_raise (sig=sig@entry=6) at ../sysdeps/unix/sysv/linux/raise.c:50
#1 0x7f6ae4559859 in __GI_abort () at abort.c:79
#2 0x559aaa386720 in error_exit (err=16, msg=0x559aaa5973d0
<__func__.16227> "qemu_mutex_destroy") at
From: "Rao, Lei"
When flushing memory from ram cache to ram during every checkpoint
on secondary VM, we can copy continuous chunks of memory instead of
4096 bytes per time to reduce the time of VM stop during checkpoint.
Signed-off-by: Lei Rao
---
migration/ram.c | 45 +
From: "Rao, Lei"
This patch fixes the following:
qemu-system-x86_64: invalid runstate transition: 'colo' ->'shutdown'
Aborted (core dumped)
Signed-off-by: Lei Rao
Reviewed-by: Li Zhijian
---
softmmu/runstate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/softmmu/runstate.c b/so
From: "Rao, Lei"
The iov_size has been calculated in filter_send(). we can directly
return the size.In this way, this is no need to repeat calculations
in filter_redirector_receive_iov();
Signed-off-by: Lei Rao
Reviewed-by: Li Zhijian
---
net/filter-mirror.c | 8
1 file changed, 4 in
From: "Rao, Lei"
The data pointer has skipped vnet_hdr_len in the function of
parse_packet_early().So, we can not subtract vnet_hdr_len again
when calculating pkt->header_size in fill_pkt_tcp_info(). Otherwise,
it will cause network packet comparsion errors and greatly increase
the frequency of c
From: "Rao, Lei"
if we don't reset the auto-converge counter,
it will continue to run with COLO running,
and eventually the system will hang due to the
CPU throttle reaching DEFAULT_MIGRATE_MAX_CPU_THROTTLE.
Signed-off-by: Lei Rao
Reviewed-by: Dr. David Alan Gilbert
---
migration/colo.c | 4 +
From: "Rao, Lei"
There is the same trace code in the colo_compare_packet_payload.
Signed-off-by: Lei Rao
Reviewed-by: Li Zhijian
---
net/colo-compare.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index 9d1ad99..c142c08 100644
--- a
From: Rao, Lei
Changes since v3:
--Remove cpu_throttle_stop from mig_throttle_counter_reset.
Changes since v2:
--Add a function named packet_new_nocopy.
--Continue to optimize the function of colo_flush_ram_cache.
Changes since v1:
--Reset the state of the auto-c
Hi folks,
When I am writing qtest cases for an interrupt controller, I
encounter some problems.
*1) Can't intercept both the irq in and irq out for the same device.*
It's a necessary feature for an interrupt controller qtest. However, as
you can see from qtest.c, when a device has inter
在 2021/3/17 上午11:34, Jason Wang 写道:
在 2021/3/17 上午5:37, Peter Maydell 写道:
On Mon, 15 Mar 2021 at 09:15, Jason Wang wrote:
From: Alexey Kirillov
The query-netdev command is used to get the configuration of the
current
network device backends (netdevs).
This is the QMP analog of the HMP c
After testing, I think you are right.
Will remove the cpu_throttle_stop() in V4.
Thanks,
Lei.
-Original Message-
From: Dr. David Alan Gilbert
Sent: Thursday, March 25, 2021 12:40 AM
To: Rao, Lei
Cc: Zhang, Chen ; lizhij...@cn.fujitsu.com;
jasow...@redhat.com; quint...@redhat.com; pbon
On Wed, 24 Mar 2021 at 22:39, Klaus Heinrich Kiwi
wrote:
>
> Expand current Aspeed HACE testsuite to also include Scatter-Gather of
> sha256 and sha512 operations.
>
> Signed-off-by: Klaus Heinrich Kiwi
> ---
> tests/qtest/aspeed_hace-test.c | 164 ++---
> 1 file chan
On Tue, Mar 23, 2021 at 01:57:25PM +0100, BALATON Zoltan wrote:
> On Tue, 23 Mar 2021, David Gibson wrote:
> > On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> > > Hello,
> > >
> > > This is adding a new PPC board called pegasos2. More info on it can be
> > > found at:
> > >
> >
On Wed, Mar 24, 2021 at 12:21:02PM +0100, BALATON Zoltan wrote:
> On Wed, 24 Mar 2021, David Gibson wrote:
> > On Tue, Mar 23, 2021 at 02:01:27PM +0100, BALATON Zoltan wrote:
> > > On Tue, 23 Mar 2021, David Gibson wrote:
> > > > On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> > >
On Wed, Mar 24, 2021 at 12:11:50PM +0100, BALATON Zoltan wrote:
> On Wed, 24 Mar 2021, David Gibson wrote:
> > On Tue, Mar 23, 2021 at 02:31:07PM +0100, BALATON Zoltan wrote:
> > > On Tue, 23 Mar 2021, David Gibson wrote:
> > > > On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> > [
On Wed, Mar 24, 2021 at 04:09:59PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 3/23/21 10:40 PM, David Gibson wrote:
> > On Tue, Mar 23, 2021 at 02:10:22PM -0300, Daniel Henrique Barboza wrote:
> > >
> > >
> > > On 3/22/21 10:12 PM, David Gibson wrote:
> > > > On Fri, Mar 12, 2021 at 05:07:3
On Wed, Mar 24, 2021 at 09:34:06AM +0530, Aneesh Kumar K.V wrote:
> On 3/24/21 8:37 AM, David Gibson wrote:
> > On Tue, Mar 23, 2021 at 09:47:38AM -0400, Shivaprasad G Bhat wrote:
> > > The patch adds support for the SCM flush hcall for the nvdimm devices.
> > > To be available for exploitation by
Peter,
On 2021/3/24 23:09, Peter Xu wrote:
> On Wed, Mar 24, 2021 at 10:56:22AM +0800, Keqian Zhu wrote:
>> Hi Peter,
>>
>> On 2021/3/23 22:34, Peter Xu wrote:
>>> Keqian,
>>>
>>> On Tue, Mar 23, 2021 at 02:40:43PM +0800, Keqian Zhu wrote:
>> The second question is that you observed longer mig
Hi Cedric,
On 3/24/2021 7:57 PM, Cédric Le Goater wrote:
On 3/24/21 11:38 PM, Klaus Heinrich Kiwi wrote:
Basically using camelCase for some variables...
I don't think CamelCase applies to variables, only types.
Thanks, I think I mis-interpreted your comment on this.
Will re-factor the patch
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of the
first release candidate for the QEMU 6.0 release. This release is meant
for testing purposes and should not be used in a production environment.
http://download.qemu-project.org/qemu-6.0.0-rc0.tar.xz
http://downl
On Wed, Mar 24, 2021 at 05:35:07PM -0300, Willian Rampazzo wrote:
> On Tue, Mar 23, 2021 at 7:16 PM Cleber Rosa wrote:
> >
> > Slightly different versions for the same utility code are currently
> > present on different locations. This unifies them all, giving
> > preference to the version from v
On Wed, Mar 24, 2021 at 11:36:53AM +0100, Auger Eric wrote:
> Hi Cleber,
> On 3/23/21 11:15 PM, Cleber Rosa wrote:
> > For users of the LinuxTest class, let's set up the VM with the port
> > redirection for SSH, instead of requiring each test to set the same
> > arguments.
> >
> > Signed-off-by: C
On Wed, Mar 24, 2021 at 10:10:50AM +0100, Auger Eric wrote:
> Hi Cleber,
>
> On 3/23/21 11:15 PM, Cleber Rosa wrote:
> > For users of the LinuxTest class, let's set up the VM with the port
> > redirection for SSH, instead of requiring each test to set the same
> also sets the network device to vir
On Wed, Mar 24, 2021 at 07:01:12PM +0100, Philippe Mathieu-Daudé wrote:
> Hi,
>
> Peter's current workflow is push to /staging and if his
> testing succeeds, he pushes the same commit as /master.
>
> IMO there is no point in building /master branch, as it
> has already been built earlier as /stag
On Wed, Mar 24, 2021 at 12:30:18PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Wed, Mar 24, 2021 at 2:23 AM Cleber Rosa wrote:
>
> > For users of the LinuxTest class, let's set up the VM with the port
> > redirection for SSH, instead of requiring each test to set the same
> > arguments.
> >
> >
On Wed, Mar 24, 2021 at 10:07:31AM +0100, Auger Eric wrote:
> Hi Cleber,
>
> On 3/23/21 11:15 PM, Cleber Rosa wrote:
> > Both the virtiofs submounts and the linux ssh mips malta tests
> > contains useful methods related to ssh that deserve to be made
> > available to other tests. Let's move them
On Wed, Mar 24, 2021 at 10:22:47AM +0100, Auger Eric wrote:
> Hi Cleber,
>
> On 3/23/21 11:15 PM, Cleber Rosa wrote:
> > The LinuxTest specifically targets users that need to interact with Linux
> > guests. So, it makes sense to give a connection by default, and avoid
> > requiring it as boiler-p
On 3/24/21 11:38 PM, Klaus Heinrich Kiwi wrote:
> Basically using camelCase for some variables...
I don't think CamelCase applies to variables, only types.
https://qemu.readthedocs.io/en/latest/devel/style.html#variable-naming-conventions
C.
>
> Signed-off-by: Klaus Heinrich Kiwi
> ---
>
On Wed, 24 Mar 2021, Philippe Mathieu-Daudé wrote:
The motivation behind this series is to remove the
isa_get_irq(NULL) call to simplify the ISA generic model.
Could you please wait with this until after my pegasos2 series is merged?
Otherwise I'll have to rewrite that again for which I don't
Expand current Aspeed HACE testsuite to also include Scatter-Gather of
sha256 and sha512 operations.
Signed-off-by: Klaus Heinrich Kiwi
---
tests/qtest/aspeed_hace-test.c | 164 ++---
1 file changed, 153 insertions(+), 11 deletions(-)
diff --git a/tests/qtest/aspeed_
Complement the Aspeed HACE support with Scatter-Gather hash support for
sha256 and sha512. Scatter-Gather is only supported on AST2600-series.
Signed-off-by: Klaus Heinrich Kiwi
---
hw/misc/aspeed_hace.c | 127 --
include/hw/misc/aspeed_hace.h | 6 ++
2
Basically using camelCase for some variables...
Signed-off-by: Klaus Heinrich Kiwi
---
hw/misc/aspeed_hace.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 6e5b447a48..93313d2b80 100644
--- a/hw/mis
This series adds support for scatter-gather sha256 and sha512 operations
on Aspeed's HACE (Hash And Crypto Engine) to the Aspeed model. These
operations are supported on AST2600 series of machines.
-Klaus
On 3/23/21 9:46 AM, Claudio Fontana wrote:
@@ -296,7 +297,8 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
*/
bitmap_andnot(tmp, kvm_supported, cpu->sve_vq_init, max_vq);
bitmap_or(cpu->sve_vq_map, cpu->sve_vq_map, tmp, max_vq);
-} else
On 3/23/21 9:46 AM, Claudio Fontana wrote:
target/arm/kvm-stub.c | 24
Can you really get rid of this?
If so, I think this should be a separate step.
--- a/target/arm/kvm/meson.build
+++ b/target/arm/kvm/meson.build
@@ -1,3 +1,8 @@
arm_ss.add(when: 'CO
On 3/23/21 9:46 AM, Claudio Fontana wrote:
The QEMU PSCI implementation is not used for KVM,
we do not need the kvm constants header.
Signed-off-by: Claudio Fontana
---
target/arm/arm-powerctl.h | 2 --
target/arm/psci.c | 1 -
2 files changed, 3 deletions(-)
Reviewed-by: Richard H
On 3/23/21 9:46 AM, Claudio Fontana wrote:
After this patch it is possible to build only kvm:
./configure --disable-tcg --enable-kvm
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson
On 3/23/21 9:46 AM, Claudio Fontana wrote:
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/cpu-sysemu.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
Obviously, this should be done before the code moves.
r~
On 3/23/21 9:46 AM, Claudio Fontana wrote:
move exception code out of tcg/
as we need part of it for KVM too.
put the exception code into separate cpu modules as appropriate,
including:
cpu-sysemu.c
tcg/tcg-cpu.c
tcg/sysemu/tcg-cpu.c
to avoid naming confusion with the existing cpu_tcg.c,
conta
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