Ran into the same issue on Proxmox 6.3-3
Setting `bcdedit /set xsavedisable 1` and using cpu=host works for me
Without I get bootloops and other options that luqmana posted, Hyper-V fails to
start
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscrib
From: Bin Meng
This adds the target guide for SABRE Lite board, and documents how
to boot a Linux kernel and U-Boot bootloader.
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch: add sabrelite target guide
docs/system/arm/sabrelite.rst | 119 ++
From: Bin Meng
At present, when booting U-Boot on QEMU sabrelite, we see:
Net: Board Net Initialization Failed
No ethernet found.
U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
board, the Ethernet PHY is
From: Bin Meng
U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
bandgap has stabilized.
With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
sabrelite board (mx6qsabrelite_defconfig), with a sli
From: Bin Meng
Currently when U-Boot boots, it prints "??" for i.MX processor:
CPU: Freescale i.MX?? rev1.0 at 792 MHz
The register that was used to determine the silicon type is
undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we
can refer to get_cpu_rev() in arch/arm/mach-imx/mx
From: Jagannathan Raman
IOHUB object is added to manage PCI IRQs. It uses KVM_IRQFD
ioctl to create irqfd to injecting PCI interrupts to the guest.
IOHUB object forwards the irqfd to the remote process. Remote process
uses this fd to directly send interrupts to the guest, bypassing QEMU.
Signed-
** Summary changed:
- lan9118 bug peeking receive massage size not equal to received message size
+ lan9118 bug peeked received message size not equal to actual received message
size
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
h
From: Jagannathan Raman
Retrieve PCI configuration info about the remote device and
configure the Proxy PCI object based on the returned information
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/proxy
From: Jagannathan Raman
Proxy device object implements handler for PCI BAR writes and reads.
The handler uses BAR_WRITE/BAR_READ message to communicate to the
remote process with the BAR address and value to be written/read.
The remote process implements handler for BAR_WRITE/BAR_READ
message.
S
From: Elena Ufimtseva
Adds qio_channel_readv_full_all() to read both data and FDs.
Refactors existing code to use this function.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
---
include/io/channel.h | 25 +
io/channel.c | 8
From: Jagannathan Raman
x-remote-machine object sets up various subsystems of the remote
device process. Instantiate PCI host bridge object and initialize RAM, IO &
PCI memory regions.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: S
From: Jagannathan Raman
Runs the Avocado acceptance test to check if a
remote lsi53c895a device gets identified by the guest.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
---
tests/acceptance/multiprocess.py | 104 +
From: Elena Ufimtseva
Adds qio_channel_writev_full_all() to transmit both data and FDs.
Refactors existing code to use this function.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
include/io/channel.h | 25
From: Elena Ufimtseva
Perform device reset in the remote process when QEMU performs
device reset. This is required to reset the internal state
(like registers, etc...) of emulated devices
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by
From: Elena Ufimtseva
Defines MPQemuMsg, which is the message that is sent to the remote
process. This message is sent over QIOChannel and is used to
command the remote process to perform various tasks.
Define transmission functions used by proxy and by remote.
Signed-off-by: Jagannathan Raman
From: Jagannathan Raman
SyncSysMemMsg message format is defined. It is used to send
file descriptors of the RAM regions to remote device.
RAM on the remote device is configured with a set of file descriptors.
Old RAM regions are deleted and new regions, each with an fd, is
added to the RAM.
Sign
From: Jagannathan Raman
Add ProxyMemoryListener object which is used to keep the view of the RAM
in sync between QEMU and remote process.
A MemoryListener is registered for system-memory AddressSpace. The
listener sends SYNC_SYSMEM message to the remote process when memory
listener commits the ch
From: Jagannathan Raman
Initializes the message handler function in the remote process. It is
called whenever there's an event pending on QIOChannel that registers
this function.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan
From: Elena Ufimtseva
The Proxy Object sends the PCI config space accesses as messages
to the remote process over the communication channel
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/mpqemu
Patchew URL:
https://patchew.org/QEMU/20201223060204.576856-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201223060204.576856-1-richard.hender...@linaro.org
Subject: [PATCH 00/22] tcg
From: Elena Ufimtseva
Defines a PCI Device proxy object as a child of TYPE_PCI_DEVICE.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/proxy.h | 36 ++
hw/remote/proxy.c | 99
From: Elena Ufimtseva
Hi
This is the v15 of the patchset.
Thank you for your time reviewing v14.
This version has the following changes:
- [PATCH v15 08/20] multi-process: add qio channel read function
Prevent memory leaks by closing file descriptors and freeing memory
for fd array on fail
From: Jagannathan Raman
Allow RAM MemoryRegion to be created from an offset in a file, instead
of allocating at offset of 0 by default. This is needed to synchronize
RAM between QEMU & remote process.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
From: Jagannathan Raman
Add configuration options to enable or disable multiprocess QEMU code
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajnoczi
---
configure | 10 ++
meson.build | 2 ++
Kconfig.
All backends have now been converted to tcg-target-conset.h,
so we can remove the fallback code.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 1 -
tcg/arm/tcg-target.h | 1 -
tcg/i386/tcg-target.h| 1 -
tcg/mips/tcg-target.h| 1 -
tcg/ppc/tcg-target.h | 1
From: Elena Ufimtseva
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/mpqemu-link.h | 4
hw/remote/mpqemu-link.c | 34 +
2 files changed, 38 insertio
From: Bin Meng
At present the upstream U-Boot (as of today, v2021.01-rc3) does not
boot on QEMU sabrelite machine.
This fixes several issues to improve emulation fidelity of the i.MX6
sabrelite board. With this series, upstream U-Boot can boot to U-Boot
command shell. While we are here, add a ta
From: John G Johnson
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
docs/devel/index.rst | 1 +
docs/devel/multi-process.rst | 966 +++
MAINTAINERS | 7
From: Jagannathan Raman
Associate the file descriptor for a PCIDevice in remote process with
DeviceState object.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/remote-obj.c | 208 ++
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target-conset.h | 31
tcg/mips/tcg-target.h| 1 +
tcg/mips/tcg-target.c.inc| 96 +++-
3 files changed, 61 insertions(+), 67 deletions(-)
create mode 100644 tcg/mips/tcg-target-conset.h
di
From: Elena Ufimtseva
Adds documentation explaining the command-line arguments needed
to use multi-process.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
docs/multi-process.rst | 64
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-conset.h | 25 +++
tcg/riscv/tcg-target.h| 1 +
tcg/riscv/tcg-target.c.inc| 83 ++-
3 files changed, 49 insertions(+), 60 deletions(-)
create mode 100644 tcg/riscv/tcg-target-conset.h
From: Jagannathan Raman
PCI host bridge is setup for the remote device process. It is
implemented using remote-pcihost object. It is an extension of the PCI
host bridge setup by QEMU.
Remote-pcihost configures a PCI bus which could be used by the remote
PCI device to latch on to.
Signed-off-by:
All backends have now been converted to tcg-target-constr.h,
so we can remove the fallback code.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 1 -
tcg/arm/tcg-target.h | 1 -
tcg/i386/tcg-target.h| 1 -
tcg/mips/tcg-target.h| 1 -
tcg/ppc/tcg-target.h | 1
This exports the constraint sets from tcg_target_op_def to
a place we will be able to manipulate more in future.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target-conset.h | 44
tcg/i386/tcg-target.h| 1 +
tcg/tcg.c| 126 +++
tcg
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target-conset.h | 30
tcg/arm/tcg-target.h| 1 +
tcg/arm/tcg-target.c.inc| 94 +
3 files changed, 63 insertions(+), 62 deletions(-)
create mode 100644 tcg/arm/tcg-target-conset.h
diff
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target-conset.h | 37 ++
tcg/ppc/tcg-target.h| 1 +
tcg/ppc/tcg-target.c.inc| 136 +++-
3 files changed, 94 insertions(+), 80 deletions(-)
create mode 100644 tcg/ppc/tcg-target-conset.h
diff
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target-conset.h | 27 +
tcg/sparc/tcg-target.h| 1 +
tcg/sparc/tcg-target.c.inc| 75 +++
3 files changed, 51 insertions(+), 52 deletions(-)
create mode 100644 tcg/sparc/tcg-target-conset.h
Signed-off-by: Richard Henderson
---
tcg/s390/tcg-target-constr.h | 15 ++
tcg/s390/tcg-target.h| 1 +
tcg/s390/tcg-target.c.inc| 40
3 files changed, 16 insertions(+), 40 deletions(-)
create mode 100644 tcg/s390/tcg-target-constr.h
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target-conset.h | 31
tcg/aarch64/tcg-target.h| 1 +
tcg/aarch64/tcg-target.c.inc| 86 +++--
3 files changed, 60 insertions(+), 58 deletions(-)
create mode 100644 tcg/aarch64/tcg-target-con
This does require finishing the conversion to tcg_target_op_def.
Remove quite a lot of ifdefs, since we can reference opcodes
even if they are not implemented.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target-conset.h | 20 +++
tcg/tci/tcg-target.h| 2 +
tcg/tci/tcg-target.c.in
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target-constr.h | 24 +
tcg/riscv/tcg-target.h| 1 +
tcg/riscv/tcg-target.c.inc| 39 ---
3 files changed, 25 insertions(+), 39 deletions(-)
create mode 100644 tcg/riscv/tcg-target-
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target-constr.h | 31
tcg/mips/tcg-target.h| 1 +
tcg/mips/tcg-target.c.inc| 56
3 files changed, 32 insertions(+), 56 deletions(-)
create mode 100644 tcg/mips/tcg-target-cons
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target-constr.h | 37 +++
tcg/ppc/tcg-target.h| 1 +
tcg/ppc/tcg-target.c.inc| 58 -
3 files changed, 38 insertions(+), 58 deletions(-)
create mode 100644 tcg/ppc/tcg-target-cons
Signed-off-by: Richard Henderson
---
tcg/s390/tcg-target-conset.h | 24 +++
tcg/s390/tcg-target.h| 1 +
tcg/s390/tcg-target.c.inc| 121 +++
3 files changed, 76 insertions(+), 70 deletions(-)
create mode 100644 tcg/s390/tcg-target-conset.h
diff
Rather than check the type when filling in the constraint,
check it when matching the constant. This removes the only
use of the type argument to target_parse_constraint.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.c.inc | 28 +---
1 file changed, 17 inserti
This eliminates the target-specific function target_parse_constraint
and folds it into the single caller, process_op_defs. Since this is
done directly into the switch statement, duplicates are compilation
errors rather than silently ignored at runtime.
Signed-off-by: Richard Henderson
---
tcg/i
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target-constr.h | 16 ++
tcg/sparc/tcg-target.h| 1 +
tcg/sparc/tcg-target.c.inc| 39 ---
3 files changed, 17 insertions(+), 39 deletions(-)
create mode 100644 tcg/sparc/tcg-target-constr.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target-constr.h | 27 +++
tcg/aarch64/tcg-target.h| 1 +
tcg/aarch64/tcg-target.c.inc| 46 -
3 files changed, 28 insertions(+), 46 deletions(-)
create mode 100644 tcg/aarch64/tcg-tar
This pulls out constraints to a couple of headers, which
reduces the boilerplate just a little.
I have a longer term goal, which this aids, in which I
move some of the startup-time debug-only validation into
build/compile-time validation. But not yet.
r~
Richard Henderson (22):
tcg/tci: Dro
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target-constr.h | 9 +
tcg/tci/tcg-target.h| 2 ++
tcg/tci/tcg-target.c.inc| 14 --
3 files changed, 11 insertions(+), 14 deletions(-)
create mode 100644 tcg/tci/tcg-target-constr.h
diff --git a/tcg/tci/tcg-targe
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target-constr.h | 31 +++
tcg/arm/tcg-target.h| 1 +
tcg/arm/tcg-target.c.inc| 60 -
3 files changed, 32 insertions(+), 60 deletions(-)
create mode 100644 tcg/arm/tcg-target-constr.h
These are identical to the 'r' constraint.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.c.inc | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 231b9b1775..50a08bef03 100644
--- a/tcg/tci/tcg-target
On Tue, 2020-12-22 at 11:47 -0500, Alexander Bulekov wrote:
> Oops let me try to resend this..
>
> Qiuhao Li writes:
>
> > The original crash detection method is to fork a process to test
> > our new
> > trace input. If the child process exits in time and the second-to-
> > last line
> > is the
I don't think this is right.
On Tue, Dec 22, 2020 at 03:41:26PM -0800, Dylan Reid wrote:
>
> The `CONFIGURE_MEM_SLOTS` feature is specified by vhost, not by virtio.
> Check the vhost flags for it being set.
>
Agreed - VHOST_USER_PROTCOL_F_CONFIGURE_MEM_SLOTS is negotiated at the
vhost-user, not
> On 12/21/20 11:46 PM, Liang Li wrote:
> > Free page reporting only supports buddy pages, it can't report the
> > free pages reserved for hugetlbfs case. On the other hand, hugetlbfs
> > is a good choice for a system with a huge amount of RAM, because it
> > can help to reduce the memory managemen
> On 12/22/20 11:59 AM, Alexander Duyck wrote:
> > On Mon, Dec 21, 2020 at 11:47 PM Liang Li
> > wrote:
> >> +
> >> + if (huge_page_order(h) > MAX_ORDER)
> >> + budget = HUGEPAGE_REPORTING_CAPACITY;
> >> + else
> >> + budget = HUGEPAGE_REPORTING_CAPACITY *
> > +hugepage_reporting_cycle(struct page_reporting_dev_info *prdev,
> > +struct hstate *h, unsigned int nid,
> > +struct scatterlist *sgl, unsigned int *offset)
> > +{
> > + struct list_head *list = &h->hugepage_freelists[nid];
> > + unsi
On 12/22/20 5:21 PM, Atish Patra wrote:
> +++ b/target/riscv/pmp.c
> @@ -74,7 +74,7 @@ static inline int pmp_is_locked(CPURISCVState *env,
> uint32_t pmp_index)
> /*
> * Count the number of active rules.
> */
> -static inline uint32_t pmp_get_num_rules(CPURISCVState *env)
> +inline uint32_t p
From: Xuzhou Cheng
Auto Address Increment (AAI) Word-Program is a special command of
SST flashes. AAI-WP allows multiple bytes of data to be programmed
without re-issuing the next sequential address location.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
Changes in v5:
- remove the
From: Bin Meng
When write is disabled, the write to flash should be avoided
in flash_write8().
Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device")
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
---
(no changes since v2)
Ch
The `CONFIGURE_MEM_SLOTS` feature is specified by vhost, not by virtio.
Check the vhost flags for it being set.
I noticed this while testing a new vhost implementation that doesn't yet
support configuring memory slots and retested with dpdk's block example
as well.
Signed-off-by: Dylan Reid
---
As per the privilege specification, any access from S/U mode should fail
if no pmp region is configured.
Signed-off-by: Atish Patra
---
target/riscv/op_helper.c | 5 +
target/riscv/pmp.c | 4 ++--
target/riscv/pmp.h | 1 +
3 files changed, 8 insertions(+), 2 deletions(-)
diff --
Hi Atish,
On Wed, Dec 23, 2020 at 3:59 AM Atish Patra wrote:
>
> On Tue, 2020-12-22 at 13:35 +0800, Bin Meng wrote:
> > Hi Atish,
> >
> > On Sat, Dec 19, 2020 at 3:46 AM Atish Patra
> > wrote:
> > >
> > > On Fri, 2020-12-18 at 16:42 +0800, Bin Meng wrote:
> > > > Hi Atish,
> > > >
> > > > On Fri
On 12/22/20 2:57 PM, BALATON Zoltan wrote:
[ ... ]
> I've already forgot about the details but we have analysed it quite throughly
> back when the via ide changes were made. Here are some random pointers to
> threads that could have some info:
> This was the final solution that was merged as th
On Wed, Dec 23, 2020, at 2:41 AM, Wainer dos Santos Moschetta wrote:
> Hi,
>
> On 12/21/20 5:25 AM, Jiaxun Yang wrote:
> >
> > On Mon, Dec 21, 2020, at 9:06 AM, no-re...@patchew.org wrote:
> >> Patchew URL:
> >> https://patchew.org/QEMU/20201221005318.11866-1-jiaxun.y...@flygoat.com/
> >>
> >>
Implement _DSM according to:
PCI Firmware Specification 3.1
4.6.7. DSM for Naming a PCI or PCI Express Device Under
Operating Systems
and wire it up to cold and hot-plugged PCI devices.
Feature depends on ACPI hotplug being enabled (as that provides
PCI devices descriptions in
Series implements support for 'onboard' naming scheme for network
interfaces (1), which is based on PCI firmware spec and lets user
to explicitly specify index that will be used by guest to name
network interface, ex:
-device e1000,acpi-index=33
should make guest rename NIC name to 'eno33' wh
it will be used by follow up patches
Signed-off-by: Igor Mammedov
---
include/hw/acpi/aml-build.h | 3 +++
hw/acpi/aml-build.c | 28
2 files changed, 31 insertions(+)
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index e727bea1bc..6
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..5c695cdf37 100644
--- a/tests/qtest/
Expected change is addition of
AIDX and PDSM methods at PCI0 scope and
_DSM methods (+ _SUN field where it was missing) to each PCI device slot
@@ -277,6 +277,54 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT",
0x0001)
Release (BLCK)
Return (Zero)
In x86/ACPI world, since systemd v197, linux distros are
using predictable network interface naming since systemd
v197. Which on QEMU based VMs results into path based
naming scheme, that names network interfaces based on PCI
topology.
With this one has to plug NIC in exacly the same bus/slot,
whi
On 12/22/20 2:23 PM, BALATON Zoltan wrote:
> On Tue, 22 Dec 2020, BALATON Zoltan via wrote:
>> Hello,
>>
>> On Tue, 22 Dec 2020, Guenter Roeck wrote:
>>> Hi,
>>>
>>> commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
>>> pci_bus_change_irq_level") added sanity checks to the inte
On Tue, 22 Dec 2020, Guenter Roeck wrote:
On 12/22/20 10:23 AM, Mark Cave-Ayland wrote:
On 22/12/2020 16:16, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus
On 12/22/20 11:59 AM, Alexander Duyck wrote:
> On Mon, Dec 21, 2020 at 11:47 PM Liang Li
> wrote:
>> +
>> + if (huge_page_order(h) > MAX_ORDER)
>> + budget = HUGEPAGE_REPORTING_CAPACITY;
>> + else
>> + budget = HUGEPAGE_REPORTING_CAPACITY * 32;
>
> Wouldn'
On 22/12/20 16:39, Marian Posteuca wrote:
Qemu's ACPI table generation sets the fields OEM ID and OEM table ID
to "BOCHS " and "BXPC" where "" is replaced by the ACPI
table name.
Some games like Red Dead Redemption 2 seem to check the ACPI OEM ID
and OEM table ID for the strings "BOCHS"
On 12/21/20 11:46 PM, Liang Li wrote:
> Free page reporting only supports buddy pages, it can't report the
> free pages reserved for hugetlbfs case. On the other hand, hugetlbfs
> is a good choice for a system with a huge amount of RAM, because it
> can help to reduce the memory management overhead
On Tue, 22 Dec 2020, BALATON Zoltan via wrote:
Hello,
On Tue, 22 Dec 2020, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number
passed
to pci_bus_change_irq_level(). That makes s
On 12/22/20 10:23 AM, Mark Cave-Ayland wrote:
> On 22/12/2020 16:16, Guenter Roeck wrote:
>
>> Hi,
>>
>> commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
>> pci_bus_change_irq_level") added sanity checks to the interrupt number passed
>> to pci_bus_change_irq_level(). That ma
On Mon, Dec 21, 2020 at 11:47 PM Liang Li wrote:
>
> Free page reporting only supports buddy pages, it can't report the
> free pages reserved for hugetlbfs case. On the other hand, hugetlbfs
> is a good choice for a system with a huge amount of RAM, because it
> can help to reduce the memory manag
On Tue, 2020-12-22 at 13:35 +0800, Bin Meng wrote:
> Hi Atish,
>
> On Sat, Dec 19, 2020 at 3:46 AM Atish Patra
> wrote:
> >
> > On Fri, 2020-12-18 at 16:42 +0800, Bin Meng wrote:
> > > Hi Atish,
> > >
> > > On Fri, Dec 18, 2020 at 4:00 PM Atish Patra
> > > wrote:
> > > >
> > > > On Fri, 2020-
Hi,
On 12/21/20 5:25 AM, Jiaxun Yang wrote:
On Mon, Dec 21, 2020, at 9:06 AM, no-re...@patchew.org wrote:
Patchew URL:
https://patchew.org/QEMU/20201221005318.11866-1-jiaxun.y...@flygoat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Hi,
On 12/20/20 9:53 PM, Jiaxun Yang wrote:
Alpine Linux[1] is a security-oriented, lightweight Linux distribution
based on musl libc and busybox.
It it popular among Docker guests and embedded applications.
Adding it to test against different libc.
[1]: https://alpinelinux.org/
Signed-off-b
On 201222 1922, Qiuhao Li wrote:
> On Mon, 2020-12-21 at 16:17 -0500, Alexander Bulekov wrote:
> > On 201220 0256, Qiuhao Li wrote:
> > > Since programmers usually trigger an IO just before they need it.
> > > Try to
> > > delay some IO instructions may help us better understanding the
> > > timing
On 22/12/2020 16:16, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus_change_irq_level(). That makes sense, given that bus->irq_count
is indexed and sized by t
22.12.2020 21:00, Vladimir Sementsov-Ogievskiy wrote:
We shouldn't have use-cases when backing-fmt is set to something another than
final base node.
I mean, we shouldn't have use-cases when backing-file is [...]
--
Best regards,
Vladimir
22.12.2020 19:20, Max Reitz wrote:
On 16.12.20 07:17, Vladimir Sementsov-Ogievskiy wrote:
From: Andrey Shinkevich
This patch completes the series with the COR-filter applied to
block-stream operations.
Adding the filter makes it possible in future implement discarding
copied regions in backin
22.12.2020 19:07, Max Reitz wrote:
On 16.12.20 07:17, Vladimir Sementsov-Ogievskiy wrote:
The code already don't freeze base node and we try to make it prepared
for the situation when base node is changed during the operation. In
other words, block-stream doesn't own base node.
Let's introduce
Hello,
On Tue, 22 Dec 2020, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus_change_irq_level(). That makes sense, given that bus->irq_count
is indexed and siz
22.12.2020 18:59, Max Reitz wrote:
On 16.12.20 07:16, Vladimir Sementsov-Ogievskiy wrote:
From: Andrey Shinkevich
Stream in stream_prepare calls bdrv_change_backing_file() to change
backing-file in the metadata of bs.
It may use either backing-file parameter given by user or just take
filenam
Patchew URL:
https://patchew.org/QEMU/20201222082340.67405-1-zhangha...@huawei.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201222082340.67405-1-zhangha...@huawei.com
Subject: [PATCH 0/9] Fix some style proble
Oops let me try to resend this..
Qiuhao Li writes:
> The original crash detection method is to fork a process to test our new
> trace input. If the child process exits in time and the second-to-last line
> is the same as the first crash, we think it is a crash triggered by the same
> bug. Howe
On 22.12.20 16:35, Vladimir Sementsov-Ogievskiy wrote:
22.12.2020 18:15, Max Reitz wrote:
On 18.12.20 19:20, Vladimir Sementsov-Ogievskiy wrote:
Unfortunately commit "iotests: handle tmpfs" break running iotests
with -nbd -nocache, as _check_o_direct tries to create
$TEST_IMG.test_o_direct, but
On 16.12.20 07:17, Vladimir Sementsov-Ogievskiy wrote:
From: Andrey Shinkevich
This patch completes the series with the COR-filter applied to
block-stream operations.
Adding the filter makes it possible in future implement discarding
copied regions in backing files during the block-stream job,
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus_change_irq_level(). That makes sense, given that bus->irq_count
is indexed and sized by the number of interrupts.
However, as it turn
On 16.12.20 07:17, Vladimir Sementsov-Ogievskiy wrote:
The code already don't freeze base node and we try to make it prepared
for the situation when base node is changed during the operation. In
other words, block-stream doesn't own base node.
Let's introduce a new interface which should replace
> On 22 Dec 2020, at 17:30, Gerd Hoffmann wrote:
>
>
>>
>> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
>> index 259f9c9..e9512ab 100644
>> --- a/include/hw/pci/pci.h
>> +++ b/include/hw/pci/pci.h
>> @@ -108,6 +108,7 @@ extern bool pci_available;
>> #define PCI_DEVICE_ID_REDHAT_
On 16.12.20 07:16, Vladimir Sementsov-Ogievskiy wrote:
From: Andrey Shinkevich
Stream in stream_prepare calls bdrv_change_backing_file() to change
backing-file in the metadata of bs.
It may use either backing-file parameter given by user or just take
filename of base on job start.
Backing fil
On [2020 Dec 22] Tue 14:45:19, Bin Meng wrote:
> From: Bin Meng
>
> When write is disabled, the write to flash should be avoided
> in flash_write8().
>
> Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device")
> Signed-off-by: Bin Meng
Reviewed-by: Francisco Iglesias
>
>
Hi Francisco,
On Tue, Dec 22, 2020 at 11:43 PM Francisco Iglesias
wrote:
>
> Hi Bin,
>
> A couple of minor comments only!
>
> On [2020 Dec 22] Tue 14:45:20, Bin Meng wrote:
> > From: Xuzhou Cheng
> >
> > Auto Address Increment (AAI) Word-Program is a special command of
> > SST flashes. AAI-WP al
1 - 100 of 158 matches
Mail list logo
