On Fri, Nov 20, 2020 at 07:50:48PM +0100, Eugenio Pérez wrote:
> Signed-off-by: Eugenio Pérez
> ---
> hw/virtio/vhost-sw-lm-ring.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/virtio/vhost-sw-lm-ring.c b/hw/virtio/vhost-sw-lm-ring.c
> index cbf53965cd..cd7b5b
Miklos confirms it's *only* the FUSE_FORGET request that the client can
use for decrementing "lo_inode.nlookup".
Cc: "Dr. David Alan Gilbert"
Cc: Miklos Szeredi
Cc: Stefan Hajnoczi
Fixes: 1222f015558fc34cea02aa3a5a92de608c82cec8
Signed-off-by: Laszlo Ersek
---
tools/virtiofsd/passthrough_ll.c
On Mon, Dec 07, 2020 at 05:44:19PM +, Daniel P. Berrangé wrote:
> On Mon, Dec 07, 2020 at 11:46:22AM +0300, Roman Bolshakov wrote:
> > An outstanding issue is whether management applications can rely on the
> > value of /machine/accel/type and output of qom-list-types command [2][3]
> > to get
On Fri, Nov 20, 2020 at 07:50:47PM +0100, Eugenio Pérez wrote:
> Signed-off-by: Eugenio Pérez
> ---
> hw/virtio/vhost-sw-lm-ring.c | 3 +++
> hw/virtio/vhost.c| 20
> 2 files changed, 23 insertions(+)
I'm not sure I understand what is going here. The guest notif
On Fri, Nov 20, 2020 at 07:50:46PM +0100, Eugenio Pérez wrote:
> @@ -1571,6 +1577,13 @@ void vhost_dev_disable_notifiers(struct vhost_dev
> *hdev, VirtIODevice *vdev)
> BusState *qbus = BUS(qdev_get_parent_bus(DEVICE(vdev)));
> int i, r;
>
> +if (hdev->sw_lm_enabled) {
> +/
On Fri, Dec 04, 2020 at 03:57:23PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Thu, Dec 3, 2020 at 3:12 PM Gerd Hoffmann wrote:
>
> > The vnc server should send desktop resize notifications unconditionally
> > on a new client connect, for feature negotiation reasons. Add a bool
> > flag to vnc
The snapshot in each bs is deleted at the beginning, so there is no need
to find the snapshot again.
Signed-off-by: Tuguoyi
---
migration/savevm.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/migration/savevm.c b/migration/savevm.c
index 5f937a2..601b514 100644
On 24/11/2020 10.45, Cho, Yu-Chen wrote:
> v2:
> Drop some package from dockerfile to make docker image more light.
>
> v1:
> Add build-system-opensuse jobs and opensuse-leap.docker dockerfile.
> Use openSUSE Leap 15.2 container image in the gitlab-CI.
>
> Signed-off-by: Cho, Yu-Chen
> ---
> .g
bdrv_all_create_snapshot() can fails with some snapshots created,
so it's better to delete those snapshots before returns to the caller
Signed-off-by: Tuguoyi
---
migration/savevm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/migration/savevm.c b/migration/savevm.c
index 601b514..4a18c9d
These two patches just clear dead code and delete stale snapshots
in case of error in save_snapshot()
Tuguoyi (2):
savevm: Remove dead code in save_snapshot()
savevm: Delete snapshots just created in case of error
migration/savevm.c | 11 +++
1 file changed, 3 insertions(+), 8 deleti
The current timestamp format doesn't help me visually notice small jumps
in time ("small" as defined on human scale, such as a few seconds or a few
ten seconds). Replace it with a local time format where such differences
stand out.
Before:
> [13316826770337] [ID: 0004] unique: 62, opcode: REL
08.12.2020 04:46, Tuguoyi wrote:
The following steps will cause qemu assertion failure:
- pause vm by executing 'virsh suspend'
- create external snapshot of memory and disk using 'virsh snapshot-create-as'
- doing the above operation again will cause qemu crash
The backtrace looks like:
#0 0x0
Hi Vivek,
On 12/07/20 19:30, Vivek Goyal wrote:
> Laszlo is writing a virtiofs client for OVMF and noticed that if he
> sends fuse FLUSH command for directory object, virtiofsd crashes.
> virtiofsd does not expect a FLUSH arriving for a directory object.
>
> This patch series has one of the patch
On Mon, Dec 07, 2020 at 02:37:04PM +0100, Greg Kurz wrote:
> It is currently impossible to hot-unplug a memory device between
> machine reset and CAS.
>
> (qemu) device_del dimm1
> Error: Memory hot unplug not supported for this guest
>
> This limitation was introduced in order to provide an expl
On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote:
> On Fri, 4 Dec 2020 13:07:27 +
> "Dr. David Alan Gilbert" wrote:
>
> > * Cornelia Huck (coh...@redhat.com) wrote:
> > > On Fri, 4 Dec 2020 09:06:50 +0100
> > > Christian Borntraeger wrote:
> > >
> > > > On 04.12.20 06:44, Dav
On Fri, Dec 04, 2020 at 02:02:05PM +0100, Cornelia Huck wrote:
> On Fri, 4 Dec 2020 09:06:50 +0100
> Christian Borntraeger wrote:
>
> > On 04.12.20 06:44, David Gibson wrote:
> > > A number of hardware platforms are implementing mechanisms whereby the
> > > hypervisor does not have unfettered acc
On 12/7/20 1:07 PM, Igor Mammedov wrote:
On Wed, 2 Dec 2020 03:18:49 -0500
Paolo Bonzini wrote:
Machine options can be retrieved as properties of the machine object.
Encourage that by removing the "easy" accessor to machine options.
Signed-off-by: Paolo Bonzini
---
accel/kvm/kvm-all.c
On 07/12/2020 22:48, BALATON Zoltan wrote:
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 2e89e36cfbdc..048bf49592aa 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -175,6 +175,13 @@ struct SpaprMachineState {
long kernel_size;
bool kernel_le;
On 12/2/20 5:18 AM, Paolo Bonzini wrote:
Machine options can be retrieved as properties of the machine object.
Encourage that by removing the "easy" accessor to machine options.
Signed-off-by: Paolo Bonzini
---
accel/kvm/kvm-all.c | 11 ---
hw/arm/boot.c | 2 +-
hw
Patchew URL:
https://patchew.org/QEMU/20201208001727.17433-1-mcr...@linux.microsoft.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201208001727.17433-1-mcr...@linux.microsoft.com
Subject: [PATCH] linux-user: add
From: Matteo Croce
Add a '-c' option which does a chroot() just before starting the
emulation. This is useful when the static QEMU user binary can't
be copied into the target root filesystem, e.g. if it's readonly.
Move some code which accesses /proc/sys/vm/mmap_min_addr before
the chroot, other
On Fri, Dec 04, 2020 at 03:43:10PM +0100, Halil Pasic wrote:
> On Fri, 4 Dec 2020 09:29:59 +0100
> Christian Borntraeger wrote:
>
> > On 04.12.20 09:17, Cornelia Huck wrote:
> > > On Fri, 4 Dec 2020 09:10:36 +0100
> > > Christian Borntraeger wrote:
> > >
> > >> On 04.12.20 06:44, David Gibson w
The following steps will cause qemu assertion failure:
- pause vm by executing 'virsh suspend'
- create external snapshot of memory and disk using 'virsh snapshot-create-as'
- doing the above operation again will cause qemu crash
The backtrace looks like:
#0 0x7fbf958c5c37 in raise () from /l
On December 07, 2020 6:06 PM Vladimir Sementsov-Ogievskiy wrote:
> 07.12.2020 10:44, Tuguoyi wrote:
> > The following steps will cause qemu assertion failure:
> > - pause vm by executing 'virsh suspend'
> > - create external snapshot of memory and disk using 'virsh
> snapshot-create-as'
> > - doing
Make gen_msa() and gen_msa_branch() public declarations
so we can keep calling them once extracted from the big
translate.c in the next commit.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.h | 2 ++
target/mips/translate.c | 4 ++--
2 files changed, 4 insertions(+), 2 deletion
Introduce the 'mod-msa32' decodetree config for the 32-bit MSA ASE.
We decode the branch instructions, and all instructions based
on the MSA opcode.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.h | 1 +
target/mips/mod-msa32.decode| 24
t
We have ~400 lines of MSA helpers in the generic op_helper.c,
move them with the other helpers in 'mod-msa_helper.c'.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201123204448.3260804-5-f4...@amsat.org>
---
target/mips/mod-msa_helper.c | 393 ++
The gen_msa*() methods don't use the "CPUMIPSState *env"
argument. Remove it to simplify.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.c | 57 -
1 file changed, 28 insertions(+),
Keep all MSA-related code altogether.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201120210844.2625602-4-f4...@amsat.org>
---
target/mips/helper.h | 436 +-
target/mips/mod-msa_helper.h.inc | 443 +++
On Tue, Dec 8, 2020 at 1:37 AM Philippe Mathieu-Daudé wrote:
>
> Finally, we use decodetree with the MIPS target.
>
> Starting easy with the MSA ASE. 2700+ lines extracted
> from helper.h and translate.c, now built as an new
> object: mod-msa_translate.o.
>
> While the diff stat is positive by 86
Now that we can decode the MSA ASE opcodes with decode_msa32(),
use it and remove the unreachable code.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/fpu_translate.h | 10 --
target/mips/translate.h | 2 --
target/mips/mod-msa_translate.c | 29 +--
Commits 863f264d10f ("add msa_reset(), global msa register") and
cb269f273fd ("fix multiple TCG registers covering same data")
removed the FPU scalar registers and replaced them by aliases to
the MSA vector registers.
While this might be the case for CPU implementing MSA, this makes
QEMU code incoh
translate_init.c.inc mostly contains CPU definitions.
msa_reset() doesn't belong here, move it with the MSA
helpers.
One comment style is updated to avoid checkpatch.pl warning.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 2 ++
target/mips/mod-msa_helper.c
We don't use ASE_MSA anymore (replaced by ase_msa_available()
checking MSAP bit from CP0_Config3). Remove it.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/mips-defs.h | 1 -
target/mips/translate_init.c.inc | 8
MSA means 'MIPS SIMD Architecture' and is defined as a Module by
MIPS.
To keep the directory sorted, we use the 'mod' prefix for MIPS
modules. Rename msa_helper.c as mod-msa_helper.c.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201123204448.3260804-4-f4...
In preparation of using the decodetree script, explode
gen_msa_branch() as following:
- OPC_BZ_V -> BxZ_V(EQ)
- OPC_BNZ_V -> BxZ_V(NE)
- OPC_BZ_[BHWD] -> BxZ(false)
- OPC_BNZ_[BHWD]-> BxZ(true)
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Sign
Only decode MSA opcodes if MSA is present (implemented).
Now than check_msa_access() will only be called if MSA is
present, the only way to have MIPS_HFLAG_MSA unset is if
MSA is disabled (bit CP0C5_MSAEn cleared, see previous
commit). Therefore we can remove the 'reserved instruction'
exception.
MSA presence is expressed by the MSAP bit of CP0_Config3.
We don't need to check anything else.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mi
Extract the logic initialization of the MSA registers from
the generic initialization.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.h | 3 +++
target/mips/translate.c | 33 +++--
2 files cha
Call msa_reset() unconditionally, but only reset
the MSA registers if MSA is implemented.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.c | 5 +
target/mips/translate_init.c.inc | 4
2 files changed, 5
Instead of accessing CP0_Config3 directly and checking
the 'MSA Present' bit, introduce an explicit helper,
making the code easier to read.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.h | 6 ++
target/mips/kvm.c
Finally, we use decodetree with the MIPS target.
Starting easy with the MSA ASE. 2700+ lines extracted
from helper.h and translate.c, now built as an new
object: mod-msa_translate.o.
While the diff stat is positive by 86 lines, we actually
(re)moved code, but added (C) notices.
The most interest
On 11/16/20 5:12 AM, Markus Armbruster wrote:
John Snow writes:
This replaces _make_tree with Annotated(). By creating it as a generic
container, we can more accurately describe the exact nature of this
particular value. i.e., each Annotated object is actually an
Annotated, describing its cont
On 11/16/20 4:55 AM, Markus Armbruster wrote:
John Snow writes:
This is only used to pass in a dictionary with a comment already set, so
skip the runaround and just accept the comment.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 17 -
1 file changed, 8 insert
On 11/16/20 4:46 AM, Markus Armbruster wrote:
John Snow writes:
Returning two different types conditionally can be complicated to
type. Let's always return a tuple for consistency. Prohibit the use of
annotations with dict-values in this circumstance. It can be implemented
later if and when th
Extract FPU specific definitions that can be used by
ISA / ASE / extensions to fpu_translate.h header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/fpu_translate.h | 71 +
target/mips/translate.c | 70
2 files
On 11/16/20 3:47 AM, Markus Armbruster wrote:
John Snow writes:
_make_tree might receive a dict or some other type.
Are you talking about @obj?
Yes. It *usually* takes a dict. sometimes it doesn't.
Adding features
information should a
Some FPU translation functions / registers can be used by
ISA / ASE / extensions out of the big translate.c file.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/fpu_translate.h | 25 +
target/mips/translate.c | 14 --
2 files changed, 33 insertions(
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/fpu_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 7d949cd8e3a..a3c05160b35 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -21,15 +21,11 @@
*
Use the FloatRoundMode enum type introduced in commit 3dede407cc6
("softfloat: Name rounding mode enum") instead of 'unsigned int'.
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201123204448.3260804-2-f4...@amsat.org>
---
ta
Extract FPU specific helpers from "internal.h" to "fpu_helper.h".
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201120210844.2625602-2-f4...@amsat.org>
---
target/mips/fpu_helper.h | 59 ++
target/mips/internal.h |
Some CPU translation functions / registers / macros and
definitions can be used by ISA / ASE / extensions out of
the big translate.c file. Declare them in "translate.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.h | 33
target/mips/translate
Extract DisasContext to a new 'translate.h' header so
different translation files (ISA, ASE, extensions)
can use it.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.h | 50 +
target/mips/translate.c | 38 +--
2 f
As the 'extract MSA' series keep growing, yet another
preliminary series.
Basically we add declarations for everything that will
be reused by code extracted from the big translate.c.
Doing so now, we avoid the intermediate step of using
.c.inc files, and we compile as different objects.
(We would
On 11/13/20 11:48 AM, Markus Armbruster wrote:
John Snow writes:
The typing of _make_tree and friends is a bit involved, but it can be
done with some stubbed out types and a bit of elbow grease. The
forthcoming patches attempt to make some simplifications, but having the
type hints in advance
On 08/12/2020 04:47, Cédric Le Goater wrote:
On 12/7/20 6:15 PM, Greg Kurz wrote:
On Mon, 7 Dec 2020 18:33:27 +1100
Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
requ
Em seg, 7 de dez de 2020 19:14, Philippe Mathieu-Daudé
escreveu:
> Hi Willian,
>
> On 12/7/20 10:35 PM, Willian Rampazzo wrote:
> > On Mon, Dec 7, 2020 at 5:10 PM Alex Bennée
> wrote:
> >>
> >> While attempting to debug some console weirdness I thought it would be
> >> worth making it easier to
On 12/5/20 10:22 AM, Huacai Chen wrote:
> Use @kernel.org address as the main communications end point. Update the
> corresponding M-entries and .mailmap (for git shortlog translation).
>
> Signed-off-by: Huacai Chen
> ---
> .mailmap| 2 ++
> MAINTAINERS | 8
> 2 files changed, 6 in
On 11/23/20 9:44 PM, Philippe Mathieu-Daudé wrote:
> Since v1:
> - Addressed Richard review comments
>
> Patches missing review: 1,3,4,21,22,25
>
> Hi,
>
> This series, while boring, helps maintainability.
>
> I simply exploded 60% of the huge target/mips/translate.c,
> reducing it from 32K lin
On 12/4/20 11:26 PM, Philippe Mathieu-Daudé wrote:
> Reviewing the MIPS code, ASE after ASE.
> Time for MT ASE.
>
> - Introduce/use ase_mt_available() helper to check
> if MT ASE is present
> - Avoid setting MT specific registers if MT ASE is absent
>
> Philippe Mathieu-Daudé (5):
> target/mi
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 8f943f93ba7..0836e72b5ac 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
We want to add macros similar to GET_FEATURE().
As this one use the 'insn_flags' field, rename it
GET_FEATURE_INSN().
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/linux-u
Userland ELF binaries using Loongson SIMD instructions have the
HWCAP_LOONGSON_MMI bit set [1].
Binaries compiled for LLoongson 3A [2] have the HWCAP_LOONGSON_EXT
bit set for the LQ / SQ instructions.
[1] commit 8e2d5831e4b ("target/mips: Legalize Loongson insn flags")
[2] commit af868995e1b ("tar
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_EQU() macro which
checks if a CPU register has bits set to a specific value.
Use the macro to check the 'Architecture Revision' level
of the Config0 register, which is '2' when the Release 6
ISA is imple
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_SET() macro which
checks if a CPU register has bits set.
Use the macro to check for MSA (which sets the MSAP bit of
the Config3 register when the ASE implementation is present).
Reviewed-by: Richard Hen
As we are going to add more macros, keep the function body clear.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 0b02a9
Series now fully reviewed.
Since v3:
- Add CP0C0_AR_LENGTH definition (Richard)
- Fixed 3E -> 3A, Longsoon -> Loongson typos (Huacai)
Since v2:
- Use extract32() in GET_FEATURE_REG_EQU (rth)
Introduce the GET_FEATURE_REG_SET() and GET_FEATURE_REG_EQU()
macros to check if an instruction set is su
On 12/1/20 2:28 PM, Philippe Mathieu-Daudé wrote:
> Add some MIPS3 and R6 definitions to ease code review.
>
> Philippe Mathieu-Daudé (3):
> target/mips: Add CP0 Config0 register definitions for MIPS3 ISA
> target/mips: Replace CP0_Config0 magic values by proper definitions
> target/mips: Ex
On 11/30/20 11:22 AM, Philippe Mathieu-Daudé wrote:
> The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html
>
> Commit af868995e1b correctly set the 'MSA present' bit of Config3
> register, but forgot to allow the MSA
On 11/24/20 12:02 PM, Paolo Bonzini wrote:
> On 24/11/20 11:41, Philippe Mathieu-Daudé wrote:
>> Huacai, ping?
>>
>> On 5/12/20 9:09 AM, Philippe Mathieu-Daudé wrote:
>>> +Paolo
>>>
>>> On 4/29/20 10:29 AM, Philippe Mathieu-Daudé wrote:
This code must not be used outside of KVM. Abort if it is
Hi Willian,
On 12/7/20 10:35 PM, Willian Rampazzo wrote:
> On Mon, Dec 7, 2020 at 5:10 PM Alex Bennée wrote:
>>
>> While attempting to debug some console weirdness I thought it would be
>> worth making it easier to see what it had inside.
>>
>> Signed-off-by: Alex Bennée
>> ---
>> python/qemu/c
fw-path-provider.c is only consumed by qdev-fw.c, which itself
is in softmmu_ss[], so we can restrict fw-path-provider.c to
softmmu too.
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Fix author email.
---
hw/core/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/
From: Philippe Mathieu-Daudé
fw-path-provider.c is only consumed by qdev-fw.c, which itself
is in softmmu_ss[], so we can restrict fw-path-provider.c to
softmmu too.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Introduce cpu_supports_isa() which takes a CPUMIPSState
argument, more useful at runtime when the CPU is created
(no need to call the extensive object_class_by_name()).
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.h | 1 +
target/mips/cpu.c | 5 +
2 files changed, 6 insertions(+
Hi Jiaxun,
Here goes the cpu_supports_isa() helper for your bootloader API:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg764582.html
Regards,
Phil.
Philippe Mathieu-Daudé (2):
target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
target/mips: Introduce cpu_supports_is
As cpu_supports_isa() / cpu_supports_cps_smp() take a 'cpu_type'
name argument, rename them cpu_type_supports_FEAT().
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.h | 4 ++--
hw/mips/boston.c| 4 ++--
hw/mips/malta.c | 4 ++--
target/mips/translate.c | 4 ++--
On Mon, 7 Dec 2020 at 21:26, Eduardo Habkost wrote:
> My understanding is that there's no reason for ARM KVM to use
> another approach, and that CPUClass.do_interrupt is not really
> TCG-specific.
>
> Do we have any case where the CPUClass.do_interrupt
> implementation is really TCG-specific, or i
On Mon, Dec 7, 2020 at 5:10 PM Alex Bennée wrote:
>
> While attempting to debug some console weirdness I thought it would be
> worth making it easier to see what it had inside.
>
> Signed-off-by: Alex Bennée
> ---
> python/qemu/console_socket.py | 8
> 1 file changed, 8 insertions(+)
>
On 11/6/20 9:12 PM, Cleber Rosa wrote:
On Mon, Oct 26, 2020 at 03:42:45PM -0400, John Snow wrote:
The typing of _make_tree and friends is a bit involved, but it can be
done with some stubbed out types and a bit of elbow grease. The
forthcoming patches attempt to make some simplifications, but ha
On Mon, Dec 07, 2020 at 09:12:34PM +, Peter Maydell wrote:
> On Mon, 7 Dec 2020 at 21:06, Claudio Fontana wrote:
> > As I understand it, for the purpose of code separation,
> > we could:
> >
> > 1) skip do_interrupt move to the separate tcg_ops structure, wait until
> > KVM/ARM uses another a
On Mon, Dec 07, 2020 at 10:06:55PM +0100, Claudio Fontana wrote:
> On 12/7/20 9:56 PM, Peter Maydell wrote:
> > On Mon, 7 Dec 2020 at 18:28, Eduardo Habkost wrote:
> >> All signs seem to indicate that CPUClass.do_interrupt is
> >> TCG-specific, except for those two lines of code in
> >> target/arm
I'm trying to migrate to using the new plugin interface. I see the
following in include/qemu/qemu-plugin.h:
> enum qemu_plugin_cb_flags {
> QEMU_PLUGIN_CB_NO_REGS, /* callback does not access the CPU's regs */
> QEMU_PLUGIN_CB_R_REGS, /* callback reads the CPU's regs */
> QEMU_PLUGIN_
On 12/7/20 10:12 PM, Peter Maydell wrote:
> On Mon, 7 Dec 2020 at 21:06, Claudio Fontana wrote:
>> As I understand it, for the purpose of code separation,
>> we could:
>>
>> 1) skip do_interrupt move to the separate tcg_ops structure, wait until
>> KVM/ARM uses another approach (if ever)
>> 2) do
On Mon, 7 Dec 2020 at 21:06, Claudio Fontana wrote:
> As I understand it, for the purpose of code separation,
> we could:
>
> 1) skip do_interrupt move to the separate tcg_ops structure, wait until
> KVM/ARM uses another approach (if ever)
> 2) do the move, and just call arm_cpu_do_interrupt() di
On 12/7/20 9:56 PM, Peter Maydell wrote:
> On Mon, 7 Dec 2020 at 18:28, Eduardo Habkost wrote:
>> All signs seem to indicate that CPUClass.do_interrupt is
>> TCG-specific, except for those two lines of code in
>> target/arm/kvm64.c. The point of this patch would be to allow us
>> to separate TCG-
On 12/7/20 3:07 PM, Alex Bennée wrote:
While attempting to debug some console weirdness I thought it would be
worth making it easier to see what it had inside.
Signed-off-by: Alex Bennée
---
python/qemu/console_socket.py | 8
1 file changed, 8 insertions(+)
diff --git a/python/qemu
On Mon, 7 Dec 2020 at 20:56, Peter Maydell wrote:
> These are fairly obscure, and it wouldn't surprise me if
> other target archs had picked a different separation of
> concerns between userspace and the kernel such that userspace
> didn't need to manually deliver an exception.
...looking at the
On Mon, 7 Dec 2020 at 18:28, Eduardo Habkost wrote:
> All signs seem to indicate that CPUClass.do_interrupt is
> TCG-specific, except for those two lines of code in
> target/arm/kvm64.c. The point of this patch would be to allow us
> to separate TCG-specific code from accel-independent code later
Public bug reported:
I am trying to boot Android (just the non-GUI parts for now) under QEMU
with MTE enabled. This can be done by following the instructions here to
build the fvp-eng target with MTE support:
https://cs.android.com/android/platform/superproject/+/master:device/generic/goldfish/fv
On 10/26/20 8:28 PM, Cleber Rosa wrote:
On Mon, Oct 26, 2020 at 11:43:36PM +0100, Philippe Mathieu-Daudé wrote:
Cc'ing avocado-devel@
On 10/26/20 11:35 PM, Peter Maydell wrote:
So, I somehow ended up with this process still running on my
local machine after a (probably failed) 'make check-acce
While attempting to debug some console weirdness I thought it would be
worth making it easier to see what it had inside.
Signed-off-by: Alex Bennée
---
python/qemu/console_socket.py | 8
1 file changed, 8 insertions(+)
diff --git a/python/qemu/console_socket.py b/python/qemu/console_so
We setup per inode hash table ->posix_lock to support remote posix locks.
But we forgot to initialize this table for root inode.
Laszlo managed to trigger an issue where he sent a FUSE_FLUSH request for
root inode and lo_flush() found inode with inode->posix_lock NULL and
accessing this table cras
On 11/20/20 10:40 AM, Paolo Bonzini wrote:
They are going to be deprecated, avoid warnings on stdout while the
tests run.
Signed-off-by: Paolo Bonzini
---
python/qemu/machine.py | 2 +-
Acked-by: John Snow
tests/qtest/pflash-cfi02-test.c | 4 ++--
tests/qtest/test-fi
On 11/17/20 9:32 AM, Markus Armbruster wrote:
Paolo Bonzini writes:
On 17/11/20 10:20, Markus Armbruster wrote:
-chardev = ('socket,id=console,path=%s,server,nowait' %
+chardev = ('socket,id=console,path=%s,server=yes,wait=no' %
Let's stick to the canonical 'on' and
Patchew URL: https://patchew.org/QEMU/20201207183021.22752-1-vgo...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201207183021.22752-1-vgo...@redhat.com
Subject: [PATCH 0/3] virtiofsd: Fix lo_flush() and
On 2020-12-07 4:48 a.m., Igor Mammedov wrote:
On Mon, 7 Dec 2020 00:47:13 -0800
Ankur Arora wrote:
On 2020-12-06 10:31 p.m., Ankur Arora wrote:
On 2020-12-04 9:09 a.m., Igor Mammedov wrote:
Adds bit #4 to status/control field of CPU hotplug MMIO interface.
New bit will be used OSPM to mark C
On Mon, 07 Dec 2020 16:34:05 +,
Catalin Marinas wrote:
>
> On Mon, Dec 07, 2020 at 04:05:55PM +, Marc Zyngier wrote:
> > What I'd really like to see is a description of how shared memory
> > is, in general, supposed to work with MTE. My gut feeling is that
> > it doesn't, and that you nee
On 07/12/2020 17.34, Thomas Huth wrote:
> On 07/12/2020 17.30, Cornelia Huck wrote:
>> On Mon, 7 Dec 2020 15:28:47 +0100
>> Thomas Huth wrote:
>>
>>> On 04/12/2020 13.14, Cornelia Huck wrote:
Hotplug a virtio-net-ccw device, and then hotunplug it again.
Signed-off-by: Cornelia Huck
Laszlo is writing a virtiofs client for OVMF and noticed that if he
sends fuse FLUSH command for directory object, virtiofsd crashes.
virtiofsd does not expect a FLUSH arriving for a directory object.
This patch series has one of the patches which fixes that. It also
has couple of posix lock fixes
If remote posix locks are not enabled (lo->posix_lock == false), then disable
code paths taken to initialize inode->posix_lock hash table and corresponding
destruction and search etc.
lo_getlk() and lo_setlk() have been modified to return ENOSYS if daemon
does not support posix lock but client sti
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