Re: [PATCH 1/2] qapi/block-core: Improve MapEntry documentation

Max Reitz writes: > MapEntry and BlockDeviceMapEntry are kind of the same thing, and the > latter is not used, so we want to remove it. However, the documentation > it provides for some fields is better than that of MapEntry, so steal > some of it for the latter. > > (And adjust them a bit in th

Re: [PATCH v2 5/6] macio: don't reference serial_hd() directly within the device

On 05/11/2020 05:31, Thomas Huth wrote: (goes and looks) Ah okay it appears to be because the object property link to the PIC is missing, which is to be expected as it is only present on the Mac machines. With the latest round of QOM updates I can see the solution but it's probably a bit much

Re: [PATCH] target/openrisc: fix icount handling for timer instructions

On 06.11.2020 00:39, Richard Henderson wrote: On 11/5/20 3:54 AM, Pavel Dovgalyuk wrote: This patch adds icount handling to mfspr/mtspr instructions that may deal with hardware timers. Signed-off-by: Pavel Dovgalyuk --- target/openrisc/translate.c | 15 +++ 1 file changed, 15

Re: [PATCH V2] qtest: Fix bad printf format specifiers

AlexChen writes: > We should use printf format specifier PRIu32 instead of "%d" for > argument of type 'uint32_t'. I prefer v1, which uses %u. [...]

Re: [PATCH] qtest: Fix bad printf format specifiers

Thomas Huth writes: > On 05/11/2020 06.14, AlexChen wrote: >> On 2020/11/4 18:44, Thomas Huth wrote: >>> On 04/11/2020 11.23, AlexChen wrote: We should use printf format specifier "%u" instead of "%d" for argument of type "unsigned int". Reported-by: Euler Robot Signed-o

Re: [PATCH] migration/dirtyrate: simplify inlcudes in dirtyrate.c

Kindly ping for not forgetting this trivial fix:) On 2020/10/30 22:09, Mark Kanda wrote: > On 10/29/2020 10:58 PM, Chuan Zheng wrote: >> Remove redundant blank line which is left by Commit 662770af7c6e8c, >> also take this opportunity to remove redundant includes in dirtyrate.c. >> >> Signed-off-b

[PATCH] scripts/checkpatch.pl: Modify the line length limit of the code

Modify the rule that limit the length of lines according to the following ideas: --add a variable max_line_length to indicate the limit of line length and set it to 100 by default --when the line length exceeds max_line_length, output warning information instead of error --if/while/etc brace do

[PATCH] migration/multifd: fix hangup with TLS-Multifd due to blocking handshake

The qemu main loop could hang up forever when we enable TLS+Multifd. The Src multifd_send_0 invokes tls handshake, it sends hello to sever and wait response. However, the Dst main qemu loop has been waiting recvmsg() for multifd_recv_1. Both of Src and Dst main qemu loop are blocking and waiting fo

Re: Emulation for riscv

On Thu, 22 Oct 2020 17:56:38 PDT (-0700), alistai...@gmail.com wrote: On Thu, Oct 22, 2020 at 4:58 PM Moises Arreola wrote: Hello everyone, my name is Moses and I'm trying to set up a VM for a risc-v processor, I'm using the Risc-V Getting Started Guide and on the final step I'm getting an e

[PATCH V17 3/6] hw/mips: Implement fw_cfg_arch_key_name()

Implement fw_cfg_arch_key_name(), which returns the name of a mips-specific key. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang Signed-off-by: Jiaxun Yang --- hw/mips/fw_cfg.c| 35 +++ hw/mips/fw_cfg.h| 19 ++

[PATCH V17 6/6] docs/system: Update MIPS machine documentation

Update MIPS machine documentation to add Loongson-3 based machine description. Signed-off-by: Huacai Chen --- docs/system/target-mips.rst | 10 ++ 1 file changed, 10 insertions(+) diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst index cd2a931..138441b 100644 --- a/

[PATCH V17 2/6] hw/intc: Rework Loongson LIOINTC

As suggested by Philippe Mathieu-Daudé, rework Loongson's liointc: 1, Move macro definitions to loongson_liointc.h; 2, Remove magic values and use macros instead; 3, Replace dead D() code by trace events. Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Huacai Chen --- hw/intc/loongson_lioin

[PATCH V17 5/6] hw/mips: Add Loongson-3 machine support

Add Loongson-3 based machine support, it use liointc as the interrupt controler and use GPEX as the pci controller. Currently it can work with both TCG and KVM. As the machine model is not based on any exiting physical hardware, the name of the machine is "loongson3-virt". It may be superseded in

[PATCH V17 4/6] hw/mips: Add Loongson-3 boot parameter helpers

Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a UEFI-like interface for BIOS-Kernel boot parameters) helpers first. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang Signed-off-by: Jiaxun Yang --- hw/mips/loongson3_bootp.c | 165

[PATCH V17 0/6] mips: Add Loongson-3 machine support

Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while Loongson-3A R4 is the newest and its ISA is almost the superset of all others. To reduce complexity, in QEMU we just define two CPU types: 1, "Loongson-3A100

[PATCH V17 1/6] target/mips: Fix PageMask with variable page size

From: Jiaxun Yang Our current code assumed the target page size is always 4k when handling PageMask and VPN2, however, variable page size was just added to mips target and that's no longer true. Fixes: ee3863b9d414 ("target/mips: Support variable page size") Signed-off-by: Jiaxun Yang Signed-of

RE: [PATCH v2 4/4] hw/riscv: Load the kernel after the firmware

> -Original Message- > From: Qemu-riscv bounces+anup.patel=wdc@nongnu.org> On Behalf Of Palmer Dabbelt > Sent: 06 November 2020 08:19 > To: alistai...@gmail.com > Cc: qemu-ri...@nongnu.org; bmeng...@gmail.com; Alistair Francis > ; qemu-devel@nongnu.org > Subject: Re: [PATCH v2 4/4] h

[PATCH 1/2] file-posix: Use OFD lock only if the filesystem supports the lock

From: Masayoshi Mizuma locking=auto doesn't work if the filesystem doesn't support OFD lock. In that situation, following error happens: qemu-system-x86_64: -blockdev driver=qcow2,node-name=disk,file.driver=file,file.filename=/mnt/guest.qcow2,file.locking=auto: Failed to lock byte 100 qemu_

Re: [PATCH v3 00/41] Mirror map JIT memory for TCG

Patchew URL: https://patchew.org/QEMU/20201106032921.600200-1-richard.hender...@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20201106032921.600200-1-richard.hender...@linaro.org Subject: [PATCH v3 00/41]

[PATCH 2/2] tests/test-image-locking: Pass the fd to the argument of qemu_has_ofd_lock()

From: Masayoshi Mizuma Pass the file descriptor of /dev/null to qemu_has_ofd_lock() because former patch is changed the argument. Signed-off-by: Masayoshi Mizuma --- tests/test-image-locking.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/tests/test-image-locking.c

[PATCH v3 40/41] tcg: Constify tcg_code_gen_epilogue

Now that all native tcg hosts support splitwx, make this pointer const. Signed-off-by: Richard Henderson --- include/tcg/tcg.h| 2 +- tcg/tcg.c| 2 +- tcg/aarch64/tcg-target.c.inc | 3 +-- tcg/arm/tcg-target.c.inc | 3 +-- tcg/i386/tcg-target.c.inc| 3 +--

[PATCH v3 38/41] tcg/arm: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 37 + 2 files changed, 22 insertions(+), 17 deletions(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index e355d6a4b2..17f6be9cfc 100644 --- a/tcg/ar

[PATCH v3 37/41] tcg/mips: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.h | 2 +- tcg/mips/tcg-target.c.inc | 43 ++- 2 files changed, 25 insertions(+), 20 deletions(-) diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index d231522dc9..d7d8e6ea1c 100644 --- a/

[PATCH v3 34/41] tcg/riscv: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.h | 2 +- tcg/riscv/tcg-target.c.inc | 41 +- 2 files changed, 24 insertions(+), 19 deletions(-) diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 3c2e8305b0..0eb19f2b11 100644 ---

[PATCH v3 36/41] tcg/mips: Do not assert on relocation overflow

This target was not updated with 7ecd02a06f8, and so did not allow re-compilation with relocation overflow. Remove reloc_26 and reloc_26_val as unused. Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 53 ++- 1 file changed, 19 insertions(+),

[PATCH v3 28/41] tcg/sparc: Use tcg_tbrel_diff

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c.inc | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc index d599ae27b5..8f04fdf981 100644 --- a/tcg/sparc/tcg-target.c.inc +++ b/tcg/sparc/tcg-targ

[PATCH v3 35/41] accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd

Re-use the 256MiB region handling from alloc_code_gen_buffer_anon, and replace that with the shared file mapping. Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 46 --- 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/accel/tcg/

[PATCH v3 31/41] tcg/s390: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.h | 2 +- tcg/s390/tcg-target.c.inc | 69 +-- 2 files changed, 31 insertions(+), 40 deletions(-) diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 8324197127..1fd8b3858e 100644 --- a/

[PATCH v3 41/41] tcg: Constify TCGLabelQemuLdst.raddr

Now that all native tcg hosts support splitwx, make this pointer const. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 3 +-- tcg/arm/tcg-target.c.inc | 3 +-- tcg/i386/tcg-target.c.inc| 3 +-- tcg/mips/tcg-target.c.inc| 3 +-- tcg/ppc/tcg-target.c.inc | 3 +-

[PATCH v3 29/41] tcg/sparc: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.h | 2 +- tcg/sparc/tcg-target.c.inc | 24 +--- 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 517840705f..bb2505bfc7 100644 --- a/tcg/sparc/t

[PATCH v3 23/41] tcg/tci: Push const down through bytecode reading

Signed-off-by: Richard Henderson --- tcg/tci.c | 60 +++ 1 file changed, 34 insertions(+), 26 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 262a2b39ce..388c1dbee8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -163,34 +163,34 @@ static uint6

[PATCH v3 22/41] disas: Push const down through host disasassembly

Signed-off-by: Richard Henderson --- include/disas/dis-asm.h | 4 ++-- disas.c | 4 +--- disas/capstone.c| 2 +- 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h index 2164762b46..d1133a4e04 100644 --- a/inclu

[PATCH v3 32/41] tcg/riscv: Fix branch range checks

The offset even checks were folded into the range check incorrectly. By offsetting by 1, and not decrementing the width, we silently allowed out of range branches. Assert that the offset is always even instead. Move tcg_out_goto down into the CONFIG_SOFTMMU block so that it is not unused. Signed

[PATCH v3 21/41] tcg/aarch64: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 2 +- tcg/aarch64/tcg-target.c.inc | 57 2 files changed, 33 insertions(+), 26 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index e62d38ba55..abb94f9458 1006

[PATCH v3 27/41] tcg/ppc: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.h | 2 +- tcg/ppc/tcg-target.c.inc | 53 +++- 2 files changed, 31 insertions(+), 24 deletions(-) diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 78d6a5e96f..a8628b6cad 100644 --- a/tcg

[PATCH v3 20/41] tcg/aarch64: Implement flush_idcache_range manually

Copy the single pointer implementation from libgcc and modify it to support the double pointer interface we require. This halves the number of cache operations required when split-rwx is enabled. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 11 +-- tcg/aarch64/tcg-tar

[PATCH v3 19/41] tcg/aarch64: Use B not BL for tcg_out_goto_long

A typo generated a branch-and-link insn instead of plain branch. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index fea784cf75..bd888bc66d 100644 -

[PATCH v3 26/41] tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB

The maximum TB code gen size is UINT16_MAX, which the current code does not support. Use our utility function to optimally add an arbitrary constant. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/tcg/ppc/tc

[PATCH v3 25/41] tcg/ppc: Use tcg_tbrel_diff

Use tcg_tbrel_diff when we need a displacement to a label, and with a NULL argument when we need the normalizing addend. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-

[PATCH v3 16/41] accel/tcg: Support split-wx for darwin/iOS with vm_remap

Cribbed from code posted by Joelle van Dyne , and rearranged to a cleaner structure. Completely untested. Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 65 +++ 1 file changed, 65 insertions(+) diff --git a/accel/tcg/translate-all.c b/accel

[PATCH v3 18/41] tcg/i386: Support split-wx code generation

Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 2 +- tcg/i386/tcg-target.c.inc | 20 +++- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 1b9d41bd56..bbbd1c2d4a 100644 --- a/tcg/i386/tcg-target

[PATCH v3 39/41] tcg: Remove TCG_TARGET_SUPPORT_MIRROR

Now that all native tcg hosts support splitwx, remove the define. Replace the one use with a test for CONFIG_TCG_INTERPRETER. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 - tcg/arm/tcg-target.h | 1 - tcg/i386/tcg-target.h | 1 - tcg/mips/tcg-target.h | 1

[PATCH v3 13/41] tcg: Use Error with alloc_code_gen_buffer

Report better error messages than just "could not allocate". Let alloc_code_gen_buffer set ctx->code_gen_buffer_size and ctx->code_gen_buffer, and simply return bool. Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 60 ++- 1 file changed, 34 i

[PATCH v3 12/41] tcg: Make tb arg to synchronize_from_tb const

There is nothing within the translators that ought to be changing the TranslationBlock data, so make it const. This does not actually use the read-only copy of the data structure that exists within the rx region. Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 3 ++- target/arm/c

[PATCH v3 30/41] tcg/s390: Use tcg_tbrel_diff

Use tcg_tbrel_diff when we need a displacement to a label, and with a NULL argument when we need the normalizing addend. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.c.inc | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tcg/s390/tcg-target.c.inc b

[PATCH v3 24/41] tcg: Introduce tcg_tbrel_diff

Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 13 + 1 file changed, 13 insertions(+) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 67d57695c2..90ec7c1445 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -1141,6 +1141,19 @@ static inline ptrdiff_t tcg_pc

[PATCH v3 09/41] tcg: Adjust tcg_register_jit for const

We must change all targets at once, since all must match the declaration in tcg.c. Signed-off-by: Richard Henderson --- include/tcg/tcg.h| 2 +- tcg/tcg.c| 10 +- tcg/aarch64/tcg-target.c.inc | 2 +- tcg/arm/tcg-target.c.inc | 2 +- tcg/i386/tcg-tar

[PATCH v3 11/41] tcg: Make DisasContextBase.tb const

There is nothing within the translators that ought to be changing the TranslationBlock data, so make it const. This does not actually use the read-only copy of the data structure that exists within the rx region. Signed-off-by: Richard Henderson --- include/exec/gen-icount.h | 4 ++-- include/

[PATCH v3 17/41] tcg: Return the TB pointer from the rx region from exit_tb

This produces a small pc-relative displacement within the generated code to the TB structure that preceeds it. Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 35 ++- tcg/tcg-op.c | 13 - 2 files changed, 34 insertions(+), 14 deleti

[PATCH v3 33/41] tcg/riscv: Remove branch-over-branch fallback

Since 7ecd02a06f8, we are prepared to re-start code generation with a smaller TB if a relocation is out of range. We no longer need to leave a nop in the stream Just In Case. Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 56 -- 1 file chan

[PATCH v3 05/41] tcg: Introduce tcg_splitwx_to_{rx,rw}

Add two helper functions, using a global variable to hold the displacement. The displacement is currently always 0, so no change in behaviour. Begin using the functions in tcg common code only. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 2 +- include/disas/disas.h |

[PATCH v3 15/41] accel/tcg: Support split-wx for linux with memfd

We cannot use a real temp file, because we would need to find a filesystem that does not have noexec enabled. However, a memfd is not associated with any filesystem. Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 84 +++ 1 file changed, 76 i

[PATCH v3 10/41] tcg: Adjust tb_target_set_jmp_target for split-wx

Pass both rx and rw addresses to tb_target_set_jmp_target. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 2 +- tcg/arm/tcg-target.h | 2 +- tcg/i386/tcg-target.h| 6 +++--- tcg/mips/tcg-target.h| 2 +- tcg/ppc/tcg-target.h | 2 +- tcg/ri

[PATCH v3 14/41] tcg: Add --accel tcg,split-wx property

Plumb the value through to alloc_code_gen_buffer. This is not supported by any os or tcg backend, so for now enabling it will result in an error. Signed-off-by: Richard Henderson --- include/sysemu/tcg.h | 3 ++- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386

[PATCH v3 03/41] tcg: Move tcg epilogue pointer out of TCGContext

This value is constant across all thread-local copies of TCGContext, so we might as well move it out of thread-local storage. Signed-off-by: Richard Henderson --- include/tcg/tcg.h| 2 +- accel/tcg/tcg-runtime.c | 2 +- tcg/tcg.c| 3 ++- tcg/aarch64/tcg-targe

[PATCH v3 06/41] tcg: Adjust TCGLabel for const

Change TCGLabel.u.value_ptr to const, and initialize it with tcg_splitwx_to_rx. Propagate const through tcg/host/ only as far as needed to avoid errors from the value_ptr change. Signed-off-by: Richard Henderson --- include/tcg/tcg.h| 2 +- tcg/tcg.c| 2 +- tcg/a

[PATCH v3 08/41] tcg: Adjust tcg_out_label for const

Simplify the arguments to always use s->code_ptr instead of take it as an argument. That makes it easy to ensure that the value_ptr is always the rx version. Signed-off-by: Richard Henderson --- tcg/tcg.c | 6 +++--- tcg/i386/tcg-target.c.inc | 10 +- 2 files changed, 8

[PATCH v3 02/41] tcg: Move tcg prologue pointer out of TCGContext

This value is constant across all thread-local copies of TCGContext, so we might as well move it out of thread-local storage. Use the correct function pointer type, and name the variable tcg_qemu_tb_exec, which means that we are able to remove the macro that does the casting. Replace HAVE_TCG_QEM

[PATCH v3 01/41] tcg: Enhance flush_icache_range with separate data pointer

We are shortly going to have a split rw/rx jit buffer. Depending on the host, we need to flush the dcache at the rw data pointer and flush the icache at the rx code pointer. For now, the two passed pointers are identical, so there is no effective change in behaviour. Signed-off-by: Richard Hende

[PATCH v3 07/41] tcg: Adjust tcg_out_call for const

We must change all targets at once, since all must match the declaration in tcg.c. Signed-off-by: Richard Henderson --- tcg/tcg.c| 2 +- tcg/aarch64/tcg-target.c.inc | 2 +- tcg/arm/tcg-target.c.inc | 2 +- tcg/i386/tcg-target.c.inc| 4 ++-- tcg/mips/tcg-target.c.inc

[PATCH v3 00/41] Mirror map JIT memory for TCG

This is my take on Joelle's patch set: https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg07837.html Changes for v3: * Even more patches -- all tcg backends converted. * Fixups for darwin/ios merged (Joelle). * Feature renamed to splitwx (Paolo). r~ Richard Henderson (41): tcg

[PATCH v3 04/41] tcg: Add in_code_gen_buffer

Create a function to determine if a pointer is within the buffer. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 6 ++ accel/tcg/translate-all.c | 26 -- 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/include/tcg/tcg.h b/include/tc

Re: [RFC PATCH 02/15] hw/riscv: migrate fdt field to generic MachineState

On Fri, Nov 6, 2020 at 1:57 AM Alex Bennée wrote: > > This is a mechanical change to make the fdt available through > MachineState. > > Signed-off-by: Alex Bennée > Reviewed-by: Alistair Francis > Message-Id: <20201021170842.25762-3-alex.ben...@linaro.org> > Signed-off-by: Alex Bennée > --- >

Re: [PATCH v2 4/4] hw/riscv: Load the kernel after the firmware

On Tue, 20 Oct 2020 08:46:45 PDT (-0700), alistai...@gmail.com wrote: On Mon, Oct 19, 2020 at 4:17 PM Palmer Dabbelt wrote: On Tue, 13 Oct 2020 17:17:33 PDT (-0700), Alistair Francis wrote: > Instead of loading the kernel at a hardcoded start address, let's load > the kernel at the next allign

[PATCH v1 1/1] hw/intc/ibex_plic: Clear the claim register when read

After claiming the interrupt by reading the claim register we want to clear the register to make sure the interrupt doesn't appear at the next read. This matches the documentation for the claim register as it clears the pending bit (which we already do): https://docs.opentitan.org/hw/ip/rv_plic/d

Re: [PATCH] quorum: Implement bdrv_co_block_status()

I test this patch in COLO, it resolve the issue qcow2 image become larger after drive-mirror. Thank you! Tested-by: Tao Xu On 11/5/2020 2:04 AM, Alberto Garcia wrote: The quorum driver does not implement bdrv_co_block_status() and because of that it always reports to contain data even if all

[Bug 1902470] Re: migration with TLS-MultiFD is stuck when the dst-libvirtd service restarts

** Changed in: qemu Status: New => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1902470 Title: migration with TLS-MultiFD is stuck when the dst-libvirtd service restarts Status

RE: [PATCH] block: Fix integer promotion error in bdrv_getlength()

On Wed, 2019-07-03 at 10:13 -0500, Eric Blake wrote: > On 11/5/20 2:31 AM, Max Reitz wrote: > > On 05.11.20 06:40, Tuguoyi wrote: > >> As BDRV_SECTOR_SIZE is of type uint64_t, the expression will > >> automatically convert the @ret to uint64_t. When an error code > >> returned from bdrv_nb_sectors(

[PATCH V2 2/2] plugins: Fix two resource leaks in setup_socket()

Either accept() fails or exits normally, we need to close the fd. Reported-by: Euler Robot Signed-off-by: Alex Chen --- contrib/plugins/lockstep.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c index 319bd44b83..5aad50869d 100644 --

[PATCH V2 1/2] plugins: Fix resource leak in connect_socket()

Close the fd when the connect() fails. Reported-by: Euler Robot Signed-off-by: Alex Chen --- contrib/plugins/lockstep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c index a696673dff..319bd44b83 100644 --- a/contrib/plugins/lockstep.

[PATCH V2 0/2] plugins: Fix some resource leaks

There are 3 resource leaks in contrib/plugins/lockstep.c, fix it. v1->v2: - add the cover letter - modify the subject of the patch[2/2] alexchen (2): plugins: Fix resource leak in connect_socket() plugins: Fix two resource leaks in setup_socket() contrib/plugins/lockstep.c | 3 +++ 1 file c

Re: [PATCH v5] introduce vfio-user protocol specification

> On Nov 2, 2020, at 3:51 AM, Thanos Makatos wrote: > > > >> -Original Message- >> From: Qemu-devel > bounces+thanos.makatos=nutanix@nongnu.org> On Behalf Of John >> Levon >> Sent: 02 November 2020 11:41 >> To: Thanos Makatos >> Cc: benjamin.wal...@intel.com; Elena Ufimtseva >>

Re: [PATCH 1/2] plugins: Fix resource leak in connect_socket()

On 2020/11/5 18:37, Alex Bennée wrote: > > AlexChen writes: > >> Kindly ping. > > Ahh sorry I missed these. Was there a cover letter for the series? > I forgot to send the cover letter, I will send the patch V2 with the cover letter. Thanks, Alex Chen

[PATCH v3 1/3] hw/block/m25p80: Fix Numonyx NVCFG DIO and QIO bit polarity

QIO and DIO modes should be enabled when the bits in NVCFG are set to 0. This matches the behavior of the other bits in the NVCFG register. Signed-off-by: Joe Komlodi --- hw/block/m25p80.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/block/m25p80.c b/hw/block/m25p80

[PATCH v3 3/3] hw/block/m25p80: Fix Numonyx fast read dummy cycle count

Numonyx chips determine the number of cycles to wait based on bits 7:4 in the volatile configuration register. However, if these bits are 0x0 or 0xF, the number of dummy cycles to wait is 10 on a QIOR or QIOR4 command, or 8 on any other currently supported fast read command. [1] [1] https://www.m

[PATCH v3 0/3] hw/block/m25p80: Numonyx: Fix dummy cycles and check for SPI mode on cmds

Changelog: v2 -> v3 - 1/3: Added, Fixes NVCFG polarity for DIO/QIO. - 2/3: Added, Checks if we can execute the current command in standard/DIO/QIO mode. - 3/3: Was 1/1 in v2. Added cycle counts for DIO/QIO mode. v1 -> v2 - 1/2: Change function name to be more accurate - 2/2: Dropped Hi all,

[PATCH v3 2/3] hw/block/m25p80: Check SPI mode before running some Numonyx commands

Some Numonyx flash commands cannot be executed in DIO and QIO mode, such as trying to do DPP or DOR when in QIO mode. Signed-off-by: Joe Komlodi --- hw/block/m25p80.c | 132 -- 1 file changed, 119 insertions(+), 13 deletions(-) diff --git a/hw

[Bug 1901981] Re: assert issue locates in hw/usb/dev-storage.c:248: usb_msd_send_status

** Changed in: qemu Status: New => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1901981 Title: assert issue locates in hw/usb/dev-storage.c:248: usb_msd_send_status Status in QEM

Re: [PULL v3 04/32] vfio: Add migration region initialization and finalize function

On Thu, 5 Nov 2020 23:55:32 + Peter Maydell wrote: > On Sun, 1 Nov 2020 at 21:02, Alex Williamson > wrote: > > > > From: Kirti Wankhede > > > > Whether the VFIO device supports migration or not is decided based of > > migration region query. If migration region query is successful and > >

Re: [PULL v3 04/32] vfio: Add migration region initialization and finalize function

On Sun, 1 Nov 2020 at 21:02, Alex Williamson wrote: > > From: Kirti Wankhede > > Whether the VFIO device supports migration or not is decided based of > migration region query. If migration region query is successful and migration > region initialization is successful then migration is supported

Re: [PULL v3 06/12] qga: add implementation of guest-get-disks for Linux

On Tue, 3 Nov 2020 at 02:45, Michael Roth wrote: > > From: Tomáš Golembiovský > > The command lists all disks (real and virtual) as well as disk > partitions. For each disk the list of dependent disks is also listed and > /dev path is used as a handle so it can be matched with "name" field of > o

Re: [PULL 0/3] ppc-for-5.2 patch queue 2020-11-05

available in the Git repository at: > > https://gitlab.com/dgibson/qemu.git tags/ppc-for-5.2-20201105 > > for you to fetch changes up to f29b959dc6871c9d8df781d1bedcfaebc76d5565: > > spapr: Convert hpt_prepare_thread() to use

Re: VFIO Migration

On Tue, Nov 03, 2020 at 10:13:05AM -0700, Alex Williamson wrote: > On Tue, 3 Nov 2020 11:03:24 + > Stefan Hajnoczi wrote: <...> > > > Management tools need to match the device model/configuration from the > > source device against the destination device. If the destination is > > capable of

Re: [PATCH for-5.2 1/3] linux-user/sparc: Fix errors in target_ucontext structures

On Thu, 5 Nov 2020 at 22:15, Richard Henderson wrote: > > On 11/5/20 1:23 PM, Peter Maydell wrote: > > +} __attribute__((aligned(16))); > > Hmph, 96 uses of the attribute directly, 20 uses of QEMU_ALIGNED. I suppose > we > should just remove the wrapper... Oops, I forget about that. We're bette

[PATCH v3 3/9] hw/usb: reorder fields in UASStatus

The UASStatus data structure has a variable sized field inside of type uas_iu, that however is not placed at the end of the data structure. This placement triggers a warning with clang 11, and while not a bug right now, (the status is never a uas_iu_command, which is the variable-sized case), it c

Re: [PATCH for-5.2 3/3] linux-user/sparc: Don't zero high half of PC, NPC, PSR in sigreturn

On 11/5/20 1:23 PM, Peter Maydell wrote: > The function do_sigreturn() tries to store the PC, NPC and PSR in > uint32_t local variables, which implicitly drops the high half of > these fields for 64-bit guests. > > The usual effect was that a guest which used signals would crash on > return from a

[PATCH v3 9/9] configure,meson: support Control-Flow Integrity

This patch adds a flag to enable/disable control flow integrity checks on indirect function calls. This feature only allows indirect function calls at runtime to functions with compatible signatures. This feature is only provided by LLVM/Clang, and depends on link-time optimization which is curren

[PATCH v3 5/9] scsi: fix overflow in scsi_disk_new_request_dump

scsi_disk_new_request_dump is used to dump the content of a scsi request for tracing. It does that by decoding the command to get the size of the command buffer, and then printing the content of such buffer on a string. When using gcc with link-time optimizations, it warns that the argument of mal

[PATCH v3 8/9] check-block: enable iotests with cfi-icall

cfi-icall is a form of Control-Flow Integrity for indirect function calls implemented by llvm. It is enabled with a -fsanitize flag. iotests are currently disabled when -fsanitize options is used, with the exception of SafeStack. This patch implements a generic filtering mechanism to allow iotest

[PATCH v3 2/9] s390x: fix clang 11 warnings in cpu_models.c

There are void * pointers that get casted to enums, in cpu_models.c Such casts can result in a small integer type and are caught as warnings with clang, starting with version 11: Clang 11 finds a bunch of spots in the code that trigger this new warnings: ../qemu-base/target/s390x/cpu_models.c:985

[PATCH v3 6/9] configure,meson: add option to enable LTO

This patch allows to compile QEMU with link-time optimization (LTO). Compilation with LTO is handled directly by meson. This patch only adds the option in configure and forwards the request to meson Tested with all major versions of clang from 6 to 12 Signed-off-by: Daniele Buono --- configure

Re: [PATCH for-5.2 2/3] linux-user/sparc: Correct set/get_context handling of fp and i7

On 11/5/20 1:23 PM, Peter Maydell wrote: > Because QEMU's user-mode emulation just directly accesses guest CPU > state, for SPARC the guest register window state is not the same in > the sparc64_get_context() and sparc64_set_context() functions as it > is for the real kernel's versions of those fun

[PATCH v3 4/9] s390x: Avoid variable size warning in ipl.h

S390IPLState contains two IplParameterBlock, which may in turn have either a IPLBlockPV or a IplBlockFcp, both ending with a variable sized field (an array). This causes a warning with clang 11 or greater, which checks that variable sized type are only allocated at the end of the struct: In file

[PATCH v3 1/9] fuzz: Make fork_fuzz.ld compatible with LLVM's LLD

LLVM's linker, LLD, supports the keyword "INSERT AFTER", starting with version 11. However, when multiple sections are defined in the same "INSERT AFTER", they are added in a reversed order, compared to BFD's LD. This patch makes fork_fuzz.ld generic enough to work with both linkers. Each section

[PATCH v3 7/9] cfi: Initial support for cfi-icall in QEMU

LLVM/Clang, supports runtime checks for forward-edge Control-Flow Integrity (CFI). CFI on indirect function calls (cfi-icall) ensures that, in indirect function calls, the function called is of the right signature for the pointer type defined at compile time. For this check to work, the code must

[PATCH v3 0/9] Add support for Control-Flow Integrity

This patch adds supports for Control-Flow Integrity checks on indirect function calls. Requires the use of clang, and link-time optimizations Changes in v3: - clang 11+ warnings are now handled directly at the source, instead of disabling specific warnings for the whole code. Some more work may

Re: [PATCH for-5.2 1/3] linux-user/sparc: Fix errors in target_ucontext structures

On 11/5/20 1:23 PM, Peter Maydell wrote: > The various structs that make up the SPARC target_ucontext had some > errors: > * target structures must not include fields which are host pointers, >which might be the wrong size. These should be abi_ulong instead > * because we don't have the 'lon

Re: [PATCH] target/openrisc: fix icount handling for timer instructions

On 11/5/20 3:54 AM, Pavel Dovgalyuk wrote: > This patch adds icount handling to mfspr/mtspr instructions > that may deal with hardware timers. > > Signed-off-by: Pavel Dovgalyuk > --- > target/openrisc/translate.c | 15 +++ > 1 file changed, 15 insertions(+) Looks correct, but it

Re: [PATCH] target/alpha: fix icount handling for timer instructions

On 11/5/20 1:04 AM, Pavel Dovgalyuk wrote: > This patch handles icount mode for timer read/write instructions, > because it is required to call gen_io_start in such cases. > > Signed-off-by: Pavel Dovgalyuk > --- > target/alpha/translate.c |9 +++-- > 1 file changed, 7 insertions(+), 2 d

[PATCH for-5.2 3/3] linux-user/sparc: Don't zero high half of PC, NPC, PSR in sigreturn

The function do_sigreturn() tries to store the PC, NPC and PSR in uint32_t local variables, which implicitly drops the high half of these fields for 64-bit guests. The usual effect was that a guest which used signals would crash on return from a signal unless it was lucky enough to take it while t

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