On 05/08/20 10:55, Philippe Mathieu-Daudé wrote:
> 2 trivial patches to fix the link error reported by Thomas:
>
> LINKtests/test-timed-average.exe
> libqemuutil.a(main-loop.o): In function `qemu_notify_event':
> util/main-loop.c:139: multiple definition of `qemu_notify_event'
>
> tests/
On 05/08/20 13:49, Thomas Huth wrote:
>> ... as this is the current behavior.
> But could we maybe end up in a scenario, where the stub from
> stubs/cpu-get-icount.c is used, which then calls the real implementation
> of qemu_notify_event() in main-loop.c ?
Yes, definitely. It would happen in too
On 06/08/20 17:26, Philippe Mathieu-Daudé wrote:
> Add trace events to audit MemoryRegionOps field such:
> - are all the valid/impl fields provided?
> - is the region a power of two?
>
> These cases are accepted, but it is interesting to list them.
>
> Example:
>
> $ qemu-system-i386 -S -tra
On Mon, Aug 17, 2020 at 04:57:55PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Mon, Aug 17, 2020 at 4:21 PM Gerd Hoffmann wrote:
> >
> > On Mon, Aug 17, 2020 at 04:00:53PM +0400, marcandre.lur...@redhat.com wrote:
> > > From: Marc-André Lureau
> > >
> > > Add width_mm/height_mm to qemu_edid_in
On Tue, Aug 18, 2020 at 1:23 AM wrote:
>
> On 8/17/20 8:28 PM, Alistair Francis wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > On Mon, Aug 17, 2020 at 11:12 AM via wrote:
> >> Hi Anup,
> >>
> >> On 8/17/20 11:30 AM, Bin Meng wrot
On 13/08/20 18:34, Vladimir Sementsov-Ogievskiy wrote:
> I thought bs is attached to one aio context and aio context attached to
> one iothread.
For now yes, but with multiqueue there would be many iothreads sending
requests to the AioContext. The BDS would still have a "home"
aiocontext to reque
On 8/17/20 7:16 PM, i.kononenko wrote:
> No, the ext ID wasn't be checked at a real HW.
> Just copied it from the U-boot official repository
> https://github.com/u-boot/u-boot/blob/789bfb52668ee609b2043de645e2f94bbd24fd1f/drivers/mtd/spi/spi-nor-ids.c#L183
OK.
Reviewed-by: Cédric Le Goater
> D
On Mon, Aug 17, 2020 at 06:42:02PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi Gerd
>
> Have another small question. Do you know how force show cursor working
> in this case?
Which display and which vga do you use?
take care,
Gerd
From: Greg Kurz
Since kvm_device_access() returns a negative errno on failure, convert
kvmppc_xive_set_source_config() to use it for error checking. This allows
to get rid of the local_err boilerplate.
Propagate the return value so that callers may use it as well to check
failures.
Signed-off-b
From: Greg Kurz
Now that all these functions return a negative errno on failure, check
that and get rid of the local_err boilerplate.
Signed-off-by: Greg Kurz
Message-Id: <159707851537.1489912.1030839306195472651.st...@bahia.lan>
Signed-off-by: David Gibson
---
hw/intc/spapr_xive_kvm.c | 24 +
From: Greg Kurz
Now that all these functions return a negative errno on failure, check
that because it is preferred to local_err. And most of all, propagate it
because vmstate expects negative errnos.
Signed-off-by: Greg Kurz
Message-Id: <159707850148.1489912.18355118622296682631.st...@bahia.la
From: Greg Kurz
Now that kvmppc_xive_cpu_get_state() returns negative on error, use that
and get rid of the temporary Error object and error_propagate().
Signed-off-by: Greg Kurz
Message-Id: <159707852916.1489912.8376334685349668124.st...@bahia.lan>
Signed-off-by: David Gibson
---
hw/intc/spa
From: Greg Kurz
Now that kvmppc_xive_cpu_get_state() and kvmppc_xive_cpu_set_state()
return negative errnos on failures, use that instead local_err because
it is the recommended practice. Also return that instead of -1 since
vmstate expects negative errnos.
Signed-off-by: Greg Kurz
Message-Id:
From: Greg Kurz
Since commit 61f20b9dc5b7 ("spapr_nvram: Pre-initialize the NVRAM to
support the -prom-env parameter"), pseries machines can pre-initialize
the "system" partition in the NVRAM with the data passed to all -prom-env
parameters on the QEMU command line.
In this case it is assumed th
From: Greg Kurz
Now that kvmppc_xive_get_queues() returns a negative errno on failure, check
with that because it is preferred to local_err. And most of all, propagate
it because vmstate expects negative errnos.
Signed-off-by: Greg Kurz
Message-Id: <159707849455.1489912.6034461176847728064.st..
From: Greg Kurz
static inline size_t xive_source_esb_len(XiveSource *xsrc)
{
return (1ull << xsrc->esb_shift) * xsrc->nr_irqs;
}
Signed-off-by: Greg Kurz
Message-Id: <159733969034.320580.6571451425779179477.st...@bahia.lan>
Signed-off-by: David Gibson
---
hw/intc/spapr_xive.c | 2 +-
From: Greg Kurz
Since kvm_device_access() returns a negative errno on failure, convert
kvmppc_xive_get_queue_config() and kvmppc_xive_set_queue_config() to
use it for error checking. This allows to get rid of the local_err
boilerplate.
Propagate the return value so that callers may use it as wel
From: Greg Kurz
Since kvmppc_xive_get_queue_config() has a return value, convert
kvmppc_xive_get_queues() to use it for error checking. This allows
to get rid of the local_err boiler plate.
Propagate the return value so that callers may use it as well to check
failures.
Signed-off-by: Greg Kurz
From: Greg Kurz
kvm_set_one_reg() returns a negative errno on failure, use that instead
of errno. Also propagate it to callers so they can use it to check
for failures and hopefully get rid of their local_err boilerplate.
Signed-off-by: Greg Kurz
Message-Id: <159707846665.1489912.14267225652103
From: Greg Kurz
Callers currently check failures of kvmppc_xive_mmap() through the
@errp argument, which isn't a recommanded practice. It is preferred
to use a return value when possible.
Since NULL isn't an invalid address in theory, it seems better to
return MAP_FAILED and to teach callers to
From: Greg Kurz
The spapr_phb_realize() function has a local_err variable which
is used to:
1) check failures of spapr_irq_findone() and spapr_irq_claim()
2) prepend extra information to the error message
Recent work from Markus Armbruster highlighted we get better
code when testing the return
From: Greg Kurz
Now that kvmppc_xive_cpu_connect() returns a negative errno on failure,
use that and get rid of the local_err boilerplate.
Signed-off-by: Greg Kurz
Message-Id: <159707852234.1489912.16410314514265848075.st...@bahia.lan>
Signed-off-by: David Gibson
---
hw/intc/xive.c | 5 +
From: Greg Kurz
Since this function begins with:
/* The KVM XIVE device is not in use */
if (!xive || xive->fd == -1) {
return;
}
we obviously don't need to check xive->fd again.
Signed-off-by: Greg Kurz
Message-Id: <159673297296.766512.14780055521619233656.st...@bahia.lan
From: Greg Kurz
Since kvmppc_xive_source_reset_one() has a return value, convert
kvmppc_xive_source_reset() to use it for error checking. This
allows to get rid of the local_err boiler plate.
Propagate the return value so that callers may use it as well to check
failures.
Signed-off-by: Greg Ku
From: Greg Kurz
Depending on whether XIVE is emultated or backed with a KVM XIVE device,
the ESB MMIOs of a XIVE source point to an I/O memory region or a mapped
memory region.
This is currently handled by checking kvm_irqchip_in_kernel() returns
false in xive_source_realize(). This is a bit awk
From: Greg Kurz
Use error_setg_errno() instead of error_setg(strerror()). While here,
use -ret instead of errno since kvm_vcpu_enable_cap() returns a negative
errno on failure.
Use ERRP_GUARD() to ensure that errp can be passed to error_append_hint(),
and get rid of the local_err boilerplate.
P
From: Greg Kurz
If the creation of the KVM XIVE device fails for some reasons, the
negative errno ends up in xive->fd, but the rest of the code assumes
that xive->fd either contains an open fd, ie. positive value, or -1.
This doesn't cause any misbehavior except kvmppc_xive_disconnect()
that wil
From: Matthieu Bucchianeri
When emulating certain floating point instructions or vector instructions on
PowerPC machines, QEMU did not properly generate the SPE/Embedded Floating-
Point Unavailable interrupt. See the buglink further below for references to
the relevant NXP documentation.
This pa
From: Greg Kurz
All callers guard these functions with an xive_in_kernel() helper. Make
it clear that they are only to be called when the KVM XIVE device exists.
Note that the check on xive is dropped in kvmppc_xive_disconnect(). It
really cannot be NULL since it comes from set_active_intc() whi
From: Greg Kurz
Calls to the KVM XIVE device are guarded by kvm_irqchip_in_kernel(). This
ensures that QEMU won't try to use the device if KVM is disabled or if
an in-kernel irqchip isn't required.
When using ic-mode=dual with the pseries machine, we have two possible
interrupt controllers: XIVE
From: Anton Blanchard
When testing large LMB sizes (eg 4GB), I found a couple of places
that assume they are 32bit in size.
Signed-off-by: Anton Blanchard
Message-Id: <20200715004228.1262681-1-an...@ozlabs.org>
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 6 --
1 file changed, 4 inser
From: Greg Kurz
When starting an L2 KVM guest with `ic-mode=dual,kernel-irqchip=on`,
QEMU fails with:
KVM is too old to support ic-mode=dual,kernel-irqchip=on
This error message was introduced to detect older KVM versions that
didn't allow destruction and re-creation of the XICS KVM device that
From: Gustavo Romero
Currently if option '-icount auto' is passed to the QEMU TCG to enable
counting instructions the VM crashes with the following error report when
Linux runs on it:
qemu-system-ppc64: Bad icount read
This happens because read/write access to the SPRs PURR, VTB, and TBU40
is n
From: Lijun Pan
Add PPC2_FEATURE2_ARCH_3_10 to the PowerPC AT_HWCAP2 definitions.
Signed-off-by: Lijun Pan
Message-Id: <20200724045845.89976-2-...@linux.ibm.com>
Signed-off-by: David Gibson
Reviewed-by: Richard Henderson
---
include/elf.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/i
From: Lijun Pan
Group vmuluwm and vmulld. Make vmulld-specific
changes since it belongs to new ISA 3.1.
Signed-off-by: Lijun Pan
Message-Id: <20200724045845.89976-3-...@linux.ibm.com>
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
tcg/ppc/tcg-target.h | 2 ++
tcg/ppc/tcg
From: Cédric Le Goater
It is not yet supported.
Signed-off-by: Cédric Le Goater
Message-Id: <20200804131639.407049-1-...@kaod.org>
Signed-off-by: David Gibson
---
docs/specs/ppc-spapr-xive.rst | 5 +
1 file changed, 5 insertions(+)
diff --git a/docs/specs/ppc-spapr-xive.rst b/docs/specs/
From: Daniel Henrique Barboza
This patch adds a new documentation file, ppc-spapr-numa.rst,
informing what developers and user can expect of the NUMA distance
support for the pseries machine, up to QEMU 5.1.
In the (hopefully soon) future, when we rework the NUMA mechanics
of the pseries machine
From: Greg Kurz
We have a dedicated error API for hints. Use it instead of embedding
the hint in the error message, as recommanded in the "qapi/error.h"
header file.
While here, have cap_fwnmi_apply(), which already uses
error_append_hint(), to call ERRP_GUARD() as well.
Signed-off-by: Greg Kur
From: Lijun Pan
vmulhsw: Vector Multiply High Signed Word
vmulhuw: Vector Multiply High Unsigned Word
Signed-off-by: Lijun Pan
Message-Id: <20200724045845.89976-4-...@linux.ibm.com>
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target/ppc/helper.h | 2 ++
ta
From: Lijun Pan
Convert the original implementation of vmuluwm to the more generic
tcg_gen_gvec_mul.
Signed-off-by: Lijun Pan
Message-Id: <20200701234344.91843-5-...@linux.ibm.com>
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target/ppc/helper.h | 1 -
targ
From: Lijun Pan
This patch enables the Power ISA 3.1 in QEMU.
Signed-off-by: Lijun Pan
Message-Id: <20200701234344.91843-3-...@linux.ibm.com>
Signed-off-by: David Gibson
---
target/ppc/cpu.h| 2 +-
target/ppc/translate_init.inc.c | 2 +-
2 files changed, 2 insertions(+), 2 del
From: Lijun Pan
vmulhsd: Vector Multiply High Signed Doubleword
vmulhud: Vector Multiply High Unsigned Doubleword
Signed-off-by: Lijun Pan
Message-Id: <20200724045845.89976-5-...@linux.ibm.com>
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target/ppc/helper.h
From: Greg Kurz
Nested KVM HV only works if the kernel is using the radix MMU mode, ie.
the CPU is POWER9 and it is not running in some pre-power9 compat mode.
Otherwise, the KVM HV module fails to load in the guest with -ENODEV.
It might be painful for a user to discover this late that nested ca
From: Lijun Pan
vmulld: Vector Multiply Low Doubleword.
Signed-off-by: Lijun Pan
Message-Id: <20200701234344.91843-6-...@linux.ibm.com>
Signed-off-by: David Gibson
---
target/ppc/translate/vmx-impl.inc.c | 1 +
target/ppc/translate/vmx-ops.inc.c | 4
2 files changed, 5 insertions(+)
di
From: Lijun Pan
POWER ISA 3.1 introduces following byte-reverse instructions:
brd: Byte-Reverse Doubleword X-form
brw: Byte-Reverse Word X-form
brh: Byte-Reverse Halfword X-form
Signed-off-by: Lijun Pan
Message-Id: <20200701234344.91843-4-...@linux.ibm.com>
Signed-off-by: David Gibson
---
tar
From: Gustavo Romero
Fix some typos in comments about code modeling coalescing points in the
XIVE routing engine (IVRE).
Signed-off-by: Gustavo Romero
Message-Id: <1595461434-27725-1-git-send-email-grom...@linux.ibm.com>
Signed-off-by: David Gibson
---
hw/intc/xive.c | 6 +++---
1 file change
The following changes since commit d0ed6a69d399ae193959225cdeaa9382746c91cc:
Update version for v5.1.0 release (2020-08-11 17:07:03 +0100)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-5.2-20200818
for you to fetch changes up to 3110f0ee19ccdb50adff3
From: Matthieu Bucchianeri
Fix double-call to tcg_temp_new_i64(), where a temp is allocated both at
declaration time and further down the implementation of gen_evmwsmiaa().
Note that gen_evmwsmia() and gen_evmwsmiaa() are still not implemented
correctly, as they invoke gen_evmwsmi() which may re
From: Lijun Pan
This flag will be used for Power10 instructions.
Signed-off-by: Lijun Pan
Message-Id: <20200701234344.91843-2-...@linux.ibm.com>
Signed-off-by: David Gibson
---
target/ppc/cpu.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index e7d
Instead of setting CPUState::halted to 1 in s390_cpu_initfn(), use the
start-powered-off property which makes cpu_common_reset() initialize it
to 1 in common code.
Note that this changes behavior by setting cs->halted to 1 on reset, which
didn't happen before.
Acked-by: Cornelia Huck
Signed-off-
Instead of setting CPUState::halted to 1 in secondary_cpu_reset(), use the
start-powered-off property which makes cpu_common_reset() initialize it
to 1 in common code.
This makes secondary_cpu_reset() unnecessary, so remove it.
Also remove setting of cs->halted from cpu_devinit(), which seems out
We rely on cpu_common_reset() to set cs->halted to 0, so main_cpu_reset()
is pointless.
Suggested-by: Philippe Mathieu-Daudé
Reviewed-by: David Gibson
Signed-off-by: Thiago Jung Bauermann
---
hw/sparc/sun4m.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/hw/
Instead of setting CPUState::halted to 1 in main_cpu_reset(), use the
start-powered-off property which makes cpu_common_reset() initialize it
to 1 in common code.
Also change creation of CPU object from cpu_create() to object_new() and
qdev_realize() because cpu_create() realizes the CPU and it's
There are other platforms which also have CPUs that start powered off, so
generalize the start-powered-off property so that it can be used by them.
Note that ARMv7MState also has a property of the same name but this patch
doesn't change it because that class isn't a subclass of CPUState so it
woul
Instead of setting CPUState::halted to 1 in ppce500_cpu_reset_sec(), use
the start-powered-off property which makes cpu_common_reset() initialize it
to 1 in common code.
Also change creation of CPU object from cpu_create() to object_new() and
qdev_realize() because cpu_create() realizes the CPU an
This change is in a separate patch because it's not so obvious that it
won't cause a regression.
Suggested-by: Eduardo Habkost
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: David Gibson
Reviewed-by: Greg Kurz
Signed-off-by: Thiago Jung Bauermann
---
hw/core/cpu.c| 2 +-
target/arm/cpu
PowerPC sPAPR CPUs start in the halted state, and spapr_reset_vcpu()
attempts to implement this by setting CPUState::halted to 1. But that's too
late for the case of hotplugged CPUs in a machine configure with 2 or more
threads per core.
By then, other parts of QEMU have already caused the vCPU to
This version tries to fix an issue found by David Gibson when running
the Travis CI:
Unexpected error in qdev_prop_set_after_realize() at
/home/travis/build/dgibson/qemu/hw/core/qdev-properties.c:30:
qemu-system-mips64el: Attempt to set property 'start-powered-off' on anonymous
device (type 'I64
On 2020/8/14 下午1:16, Yan Zhao wrote:
On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote:
On 2020/8/10 下午3:46, Yan Zhao wrote:
driver is it handled by?
It looks that the devlink is for network device specific, and in
devlink.h, it says
include/uapi/linux/devlink.h - Network physical d
On Mon, 17 Aug 2020 15:44:03 -0600
Alex Williamson wrote:
> On Mon, 17 Aug 2020 17:20:57 -0400
> Steven Sistare wrote:
>
> > On 8/17/2020 4:48 PM, Alex Williamson wrote:
> > > On Mon, 17 Aug 2020 14:30:51 -0400
> > > Steven Sistare wrote:
> > >
> > >> On 7/30/2020 11:14 AM, Steve Sistar
David Gibson writes:
> On Mon, Aug 17, 2020 at 07:24:43AM +0200, Philippe Mathieu-Daudé wrote:
>> On 8/17/20 6:47 AM, David Gibson wrote:
>> > On Wed, Jul 22, 2020 at 11:56:49PM -0300, Thiago Jung Bauermann wrote:
>> >> The ARM code has a start-powered-off property in ARMCPU, which is a
>> >> s
If I connect a serial mouse to the built-in serial port on an old
(kernel 2.4) box and go
stty -F /dev/ttyS0 1200 cs7
dd if=/dev/ttyS0 bs=1|hexdump -C
The bytes received/printed when the mouse is moved all have bit7=0.
--
You received this bug notification because you are a member of qemu-
deve
Paolo Bonzini 于2020年8月18日周二 上午1:05写道：
> On 15/08/20 16:19, Li Qiang wrote:
> > Currently in 'megasas_map_sgl' when 'iov_count=0' will just return
> > success however the 'cmd' doens't contain any iov. This will cause
> > the assert in 'scsi_dma_complete' failed. This is because in
> > 'dma_blk_cb
On 8/17/20 6:04 AM, Chenqun (kuhn) wrote:
> Other branches(eg:' CASE_OP_32_64(brcond)') have changed the opc value too.
> Do we need to assign a value to nb_iargs for it?
In those cases nb_iargs does not change.
r~
On 8/17/20 10:30 AM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Trap mbar-sleeps from user-space.
>
> Reported-by: Richard Henderson
> Signed-off-by: Edgar E. Iglesias
> ---
> target/microblaze/translate.c | 5 +
> 1 file changed, 5 insertions(+)
Reviewed-by: Richard Hender
Signed-off-by: Andrew Aladjev
---
linux-user/syscall.c | 12 ++--
linux-user/syscall_proc.c | 113 +++---
linux-user/syscall_proc.h | 5 +-
3 files changed, 101 insertions(+), 29 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 0
Signed-off-by: Andrew Aladjev
---
linux-user/Makefile.objs | 5 +++--
linux-user/syscall.c | 33 +
linux-user/syscall_proc.c | 32
linux-user/syscall_proc.h | 7 +++
4 files changed, 43 insertions(+), 34 deletions(-)
cr
User opens /proc/self/exe symlink, than kernel should create
/proc/self/fd/ symlink. We should be able to detect both exe and
fd/ symlinks to provide common behaviour. The easiest solution is to
make execfd global and keep it open. This solution looks acceptable because
exec_path is already glo
On Mon, 17 Aug 2020 17:20:57 -0400
Steven Sistare wrote:
> On 8/17/2020 4:48 PM, Alex Williamson wrote:
> > On Mon, 17 Aug 2020 14:30:51 -0400
> > Steven Sistare wrote:
> >
> >> On 7/30/2020 11:14 AM, Steve Sistare wrote:
> >>> Anonymous memory segments used by the guest are preserved acros
Host CPU : Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz
Host Memory : 15.49 GB
Start Time (UTC) : 2020-08-17 21:00:02
End Time (UTC) : 2020-08-17 21:32:56
Execution Time : 0:32:54.21
Status : SUCCESS
On 8/17/2020 4:48 PM, Alex Williamson wrote:
> On Mon, 17 Aug 2020 14:30:51 -0400
> Steven Sistare wrote:
>
>> On 7/30/2020 11:14 AM, Steve Sistare wrote:
>>> Anonymous memory segments used by the guest are preserved across a re-exec
>>> of qemu, mapped at the same VA, via a proposed madvise(MADV
On Fri, Aug 14, 2020 at 9:49 AM Bin Meng wrote:
>
> From: Bin Meng
>
> Microchip PolarFire SoC has 5 MMUARTs, and the Icicle Kit board
> wires 4 of them out. Let's connect all 5 MMUARTs.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> hw/riscv/Kconfig
On Fri, Aug 14, 2020 at 9:45 AM Bin Meng wrote:
>
> From: Bin Meng
>
> Microchip PolarFire SoC MMUART is ns16550 compatible, with some
> additional registers. Create a simple MMUART model built on top
> of the existing ns16550 model.
>
> Signed-off-by: Bin Meng
> ---
>
> MAINTAINERS
On 8/17/20 1:42 PM, Richard Henderson wrote:
> On 8/17/20 1:38 PM, Richard Henderson wrote:
>> On 8/17/20 9:48 AM, Daniel P. Berrangé wrote:
>>> On Wed, Aug 12, 2020 at 08:25:21PM -0700, Richard Henderson wrote:
This allows header files to declare pointers without pulling
in the entire cr
On 8/17/20 10:09 AM, Daniel P. Berrangé wrote:
> What were you measuring performance with ? Did you use the
> benchmark-crypto-cipher program or something else ?
Perf of a boot of an aarch64 kernel, which
* debug enabled for regression testing,
* the v8.3-pauth instructions enabled,
* a l
On Mon, 17 Aug 2020 14:30:51 -0400
Steven Sistare wrote:
> On 7/30/2020 11:14 AM, Steve Sistare wrote:
> > Anonymous memory segments used by the guest are preserved across a re-exec
> > of qemu, mapped at the same VA, via a proposed madvise(MADV_DOEXEC) option
> > in the Linux kernel. For the mad
On 8/17/20 1:38 PM, Richard Henderson wrote:
> On 8/17/20 9:48 AM, Daniel P. Berrangé wrote:
>> On Wed, Aug 12, 2020 at 08:25:21PM -0700, Richard Henderson wrote:
>>> This allows header files to declare pointers without pulling
>>> in the entire crypto subsystem.
>>>
>>> Signed-off-by: Richard Hend
On 8/17/20 9:48 AM, Daniel P. Berrangé wrote:
> On Wed, Aug 12, 2020 at 08:25:21PM -0700, Richard Henderson wrote:
>> This allows header files to declare pointers without pulling
>> in the entire crypto subsystem.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> include/crypto/cipher.h | 2 --
>>
Patchew URL: https://patchew.org/QEMU/20200817161853.593247-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!
On 8/17/20 8:28 PM, Alistair Francis wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On Mon, Aug 17, 2020 at 11:12 AM via wrote:
>> Hi Anup,
>>
>> On 8/17/20 11:30 AM, Bin Meng wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachme
On Fri, Aug 14, 2020 at 9:43 AM Bin Meng wrote:
>
> From: Bin Meng
>
> This is an initial support for Microchip PolarFire SoC Icicle Kit.
> The Icicle Kit board integrates a PolarFire SoC, with one SiFive's
> E51 plus four U54 cores and many on-chip peripherals and an FPGA.
>
> For more details a
Patchew URL:
https://patchew.org/QEMU/20200817143723.343284-1-pbonz...@redhat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN =
Patchew URL:
https://patchew.org/QEMU/20200817143723.343284-1-pbonz...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20200817143723.343284-1-pbonz...@redhat.com
Subject: [PATCH v3 000/150] Meson integratio
On Mon, Aug 17, 2020 at 11:12 AM via wrote:
>
> Hi Anup,
>
> On 8/17/20 11:30 AM, Bin Meng wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > Hi Anup,
> >
> > On Sat, Aug 15, 2020 at 1:44 AM Anup Patel wrote:
> >> On Fri, Aug 14, 202
Hi,
Interesting suggestion Philippe. I modelled the initial code of the H3 SoC
mostly in-line with the aspeed SoC,
to let it use commonly applied code structures where possible. And it looks
like in this series, aspeed_soc.h is also
getting the same change. I'll see if I can find some time to make
On 8/17/20 8:24 PM, no-re...@patchew.org wrote:
> Patchew URL:
> https://patchew.org/QEMU/20200817172331.598255-1-phi...@redhat.com/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you have Docker installe
Hi Philippe,
Same as the one for the SD device: I tested it with the avocado tests and
the official image OrangePi_pc_debian_stretch_server_linux5.3.5_v1.0.img
and networking is working good (ran some apt-get commands etc).
Reviewed-by: Niek Linnenbank
Tested-by: Niek Linnenbank
Regards,
Niek
Hi Philippe,
Nice improvement, I didnt know about this API. Makes sense to use it indeed.
The patch works fine. I tested your patches by applying the previous two
sets first, and then this one.
It ran well with the avocado tests and also with the official image
OrangePi_pc_debian_stretch_server_li
On 7/30/2020 11:14 AM, Steve Sistare wrote:
> Anonymous memory segments used by the guest are preserved across a re-exec
> of qemu, mapped at the same VA, via a proposed madvise(MADV_DOEXEC) option
> in the Linux kernel. For the madvise patches, see:
>
> https://lore.kernel.org/lkml/1595869887-233
Patchew URL: https://patchew.org/QEMU/20200817172331.598255-1-phi...@redhat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
On Mon 17 Aug 2020 05:53:07 PM CEST, Kevin Wolf wrote:
> Maybe the difference is in allocating 64k at once instead of doing a
> separate allocation for every 4k block? But with the extent size hint
> patches to file-posix, we should allocate 1 MB at once by default now
> (if your test image was new
Hi Anup,
On 8/17/20 11:30 AM, Bin Meng wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi Anup,
>
> On Sat, Aug 15, 2020 at 1:44 AM Anup Patel wrote:
>> On Fri, Aug 14, 2020 at 10:12 PM Bin Meng wrote:
>>> From: Bin Meng
>>>
>>> This ad
On 8/17/20 1:39 AM, Gerd Hoffmann wrote:
> Hi,
>
>> FWIW I'm still hitting issues with qemu-5.1.0 GA but maybe it's
>> unrelated to that specific fix. Issues reproduce on fedora 33+, not
>> fedora 32.
>
>> +Failed to open module:
>> /builddir/build/BUILD/qemu-5.1.0-rc3/build-dynamic/x86_64-soft
On Fri, Aug 14, 2020 at 9:45 AM Bin Meng wrote:
>
> From: Bin Meng
>
> Now that we have the newly introduced 'resetvec' property in the
> RISC-V CPU and HART, instead of hard-coding the reset vector addr
> in the CPU's instance_init(), move that to riscv_cpu_realize()
> based on the configured pr
On Fri, Aug 14, 2020 at 9:41 AM Bin Meng wrote:
>
> From: Bin Meng
>
> RISC-V machines do not instantiate RISC-V CPUs directly, instead
> they do that via the hart array. Add a new property for the reset
> vector address to allow the value to be passed to the CPU, before
> CPU is realized.
>
> Si
On Fri, Aug 14, 2020 at 9:43 AM Bin Meng wrote:
>
> From: Bin Meng
>
> Currently the reset vector address is hard-coded in a RISC-V CPU's
> instance_init() routine. In a real world we can have 2 exact same
> CPUs except for the reset vector address, which is pretty common in
> the RISC-V core IP
On 8/17/20 12:30 PM, Cornelia Huck wrote:
On Mon, 17 Aug 2020 10:17:34 -0400
"Jason J. Herne" wrote:
The POP states that the IPLB location is only written to 0x14 for
list-directed IPL. Some operating systems expect 0x14 to not change on
boot and will fail IPL if it does change.
Fixes: 9bfc04
+-- On Mon, 17 Aug 2020, Philippe Mathieu-Daudé wrote --+
| On 8/17/20 7:02 AM, P J P wrote:
| > +-- On Sun, 16 Aug 2020, Philippe Mathieu-Daudé wrote --+
| > | What about read_with_attrs()/write_with_attrs()? It seems they are part
| > | of the same problem.
| >
| > * read/write_with_attrs funct
From: "Edgar E. Iglesias"
Trap mbar-sleeps from user-space.
Reported-by: Richard Henderson
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/translate.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 530c15e5ad
From: "Edgar E. Iglesias"
As suggested by Richard, trap mbar/sleeps from user-space.
Cheers,
Edgar
Edgar E. Iglesias (1):
target/microblaze: mbar: Trap sleeps from user-space
target/microblaze/translate.c | 5 +
1 file changed, 5 insertions(+)
--
2.25.1
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