Paolo Bonzini writes:
> On 27/05/20 17:05, Peter Maydell wrote:
>> I disagree with these. We're in a realize function, the API
>> says "on errors, report them via the Error* you got passed",
>> so we should do that, not blow up. &error_abort only makes
>> sense if (a) we have no better way to rep
On 27/05/2020 18.36, Alex Bennée wrote:
>
> Thomas Huth writes:
>
>> On 27/05/2020 16.44, Laurent Vivier wrote:
>>> Le 25/05/2020 à 15:18, Thomas Huth a écrit :
From: Alex Bennée
Newer clangs rightly spot that you can never exceed the full address
space of 64 bit hosts with:
Patchew URL:
https://patchew.org/QEMU/20200528054807.21278-1-vishal.l.ve...@intel.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200528054807.21278-1-vishal.l.ve...@intel.com
Subject: [PATCH v2 0/3] account for NVDIMM nodes
On Wed, May 27, 2020 at 09:44:54PM +0200, BALATON Zoltan wrote:
> Hello,
>
> I've seen a case when QEMU hangs with a passed through USB device. This is
> with -device usb-ehci and pass through with usb-host. This works until the
> attached USB device reboots (so likely it disconnects and reconnect
On Thu, May 28, 2020 at 07:10:46AM +0200, Paolo Bonzini wrote:
> On 28/05/20 06:35, Yan Zhao wrote:
> > On Tue, May 26, 2020 at 10:26:35AM +0100, Peter Maydell wrote:
> >> On Mon, 25 May 2020 at 11:20, Paolo Bonzini wrote:
> >>> Not all of them, only those that need to return MEMTX_ERROR. I would
28.05.2020 00:57, Eric Blake wrote:
On 5/27/20 4:46 PM, no-re...@patchew.org wrote:
Patchew URL:
https://patchew.org/QEMU/20200527203733.16129-1-vsement...@virtuozzo.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If
On 27/05/2020 23.54, Eric Blake wrote:
> On 5/27/20 4:40 PM, Peter Maydell wrote:
>> On Wed, 27 May 2020 at 20:21, Philippe Mathieu-Daudé
>> <1881...@bugs.launchpad.net> wrote:
>>>
>>> Public bug reported:
>>>
>>> Last time I built QEMU was on commit
>>> d5c75ec500d96f1d93447f990cd5a4ef5ba27fae,
>>
On 27.05.2020 19:44, Alex Bennée wrote:
Pavel Dovgalyuk writes:
This patch adds a test for record/replay, which boots Linux
image from the disk and interacts with the network.
The idea and code of this test is borrowed from boot_linux.py
However, currently record/replay works only for x86_64
On 27.05.2020 18:41, Alex Bennée wrote:
Pavel Dovgalyuk writes:
This patch adds a test for record/replay an execution of x86_64 machine.
Execution scenario includes simple kernel boot, which allows testing
basic hardware interaction in RR mode.
Signed-off-by: Pavel Dovgalyuk
---
0 files
On 27/05/2020 19.35, Alistair Francis wrote:
> On Wed, May 27, 2020 at 12:17 AM Thomas Huth wrote:
>>
>> On 27/05/2020 00.47, Alistair Francis wrote:
>>>
>>> include/hw/riscv/spike.h | 6 +-
>>> target/riscv/cpu.h| 8 -
>>> hw/riscv/spike.c
Update the expected SRAT files for the change to account for NVDIMM numa
nodes in the SRAT.
AML Diff:
--- /tmp/asl-V49YJ0.dsl 2020-04-27 18:50:52.680043327 -0600
+++ /tmp/asl-48AZJ0.dsl 2020-04-27 18:50:52.679043344 -0600
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 201905
Changes since v1:
- Use error_abort for getters (Igor)
- Free the device list (Igor)
- Refactor the NVDIMM related portion into hw/acpi/nvdimm.c (Igor)
- Rebase onto latest master
- Add Jingqi's Reviewed-by
On the command line, one can specify a NUMA node for NVDIMM devices. If
we set up the topol
In anticipation of a change to the SRAT generation in qemu, add the AML
file to diffs-allowed.
Signed-off-by: Vishal Verma
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-te
NVDIMMs can belong to their own proximity domains, as described by the
NFIT. In such cases, the SRAT needs to have Memory Affinity structures
in the SRAT for these NVDIMMs, otherwise Linux doesn't populate node
data structures properly during NUMA initialization. See the following
for an example fa
Upstream patch
-> https://lists.gnu.org/archive/html/qemu-devel/2020-05/msg07313.html
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1878259
Title:
Null-pointer dereference in megasas_handle_frame
On 28/05/2020, Jon Doron wrote:
On 22/05/2020, Igor Mammedow wrote:
On Thu, 21 May 2020 18:02:07 +0200
Paolo Bonzini wrote:
On 13/05/20 17:34, Igor Mammedov wrote:
I'd rather avoid using random IRQ numbers (considering we are
dealing with black-box here). So if it's really necessary to have
On 22/05/2020, Igor Mammedow wrote:
On Thu, 21 May 2020 18:02:07 +0200
Paolo Bonzini wrote:
On 13/05/20 17:34, Igor Mammedov wrote:
> I'd rather avoid using random IRQ numbers (considering we are
> dealing with black-box here). So if it's really necessary to have
> IRQ described here, I'd sugg
On 28/05/20 06:35, Yan Zhao wrote:
> On Tue, May 26, 2020 at 10:26:35AM +0100, Peter Maydell wrote:
>> On Mon, 25 May 2020 at 11:20, Paolo Bonzini wrote:
>>> Not all of them, only those that need to return MEMTX_ERROR. I would
>>> like some guidance from Peter as to whether (or when) reads from R
The whole series works for us in general:
Reviewed-by: Yan Zhao
On Wed, May 20, 2020 at 11:38:00PM +0530, Kirti Wankhede wrote:
> Hi,
>
> This patch set adds:
> * IOCTL VFIO_IOMMU_DIRTY_PAGES to get dirty pages bitmap with
> respect to IOMMU container rather than per device. All page
> -Original Message-
> From: Atish Patra
> Sent: 28 May 2020 07:14
> To: Anup Patel
> Cc: Peter Maydell ; Palmer Dabbelt
> ; Alistair Francis ; Sagar
> Karandikar ; Atish Patra ;
> qemu-ri...@nongnu.org; qemu-devel@nongnu.org; Anup Patel
>
> Subject: Re: [PATCH v3 4/4] hw/riscv: virt:
On Tue, May 26, 2020 at 10:26:35AM +0100, Peter Maydell wrote:
> On Mon, 25 May 2020 at 11:20, Paolo Bonzini wrote:
> > Not all of them, only those that need to return MEMTX_ERROR. I would
> > like some guidance from Peter as to whether (or when) reads from ROMs
> > should return MEMTX_ERROR. Th
Versions of VMD with the Host Physical Address shadow register use this
register to calculate the bus address offset needed to do guest
passthrough of the domain. This register shadows the Host Physical
Address registers including the resource type bits. After calculating
the offset, the extra reso
VMD device 28C0 natively assists guest passthrough of the VMD endpoint
through the use of shadow registers that provide Host Physical Addresses
to correctly assign bridge windows. These shadow registers are only
available if VMD config space register 0x70, bit 1 is set.
In order to support this mo
This set contains 2 patches for Linux and 1 for QEMU. VMD device
8086:28C0 contains information in registers to assist with direct
assignment passthrough. Several other VMD devices don't have this
information, but hypervisors can easily provide the guest with this
information through various means.
The VMD endpoint provides a real PCIe domain to the guest, including
bridges and endpoints. Because the VMD domain is enumerated by the guest
kernel, the guest kernel will assign Guest Physical Addresses to the
downstream endpoint BARs and bridge windows.
When the guest kernel performs MMIO to VMD
On Thu, May 28, 2020 at 12:59 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> ---
> target/riscv/pmp.c | 14 +-
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
Reviewed-by: Bin Meng
On Thu, May 28, 2020 at 12:58 AM Alistair Francis
wrote:
>
> Previously if we didn't enable the MMU it would be enabled in the
> realize() function anyway. Let's ensure that if we don't want the MMU we
> disable it. We also don't need to enable the MMU as it will be enalbed
> in realize() by defau
On Wed, May 27, 2020 at 5:14 AM Anup Patel wrote:
>
> We extend RISC-V virt machine to allow creating a multi-socket machine.
> Each RISC-V virt machine socket is a set of HARTs, a CLINT instance,
> and a PLIC instance. Other peripherals are shared between all RISC-V
> virt machine sockets. We als
On Thu, 2020-05-21 at 17:16 +0200, Igor Mammedov wrote:
Hi Igor, Thanks for the review.
[..]
> >
> > @@ -2429,6 +2430,25 @@ build_srat(GArray *table_data, BIOSLinker *linker,
> > MachineState *machine)
> >MEM_AFFINITY_ENABLED);
> > }
> > }
> > +
>
Hi,
Thank you for forwarding my question to developers and sharing the
C6x implementation.
Perhaps I should follow up with another problem I encountered. The
senerio is the emulator keeps running eventhough the program it emulates
has already exited. And it keeps retrieving instructions w
Patchew URL:
https://patchew.org/QEMU/20200527203733.16129-1-vsement...@virtuozzo.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEG
On 5/27/20 3:37 PM, Vladimir Sementsov-Ogievskiy wrote:
This is the only coroutine wrapper from block.c and block/io.c which
doesn't return value, so let's convert it to the common behavior, to
s/value/a value/
simplify moving to generated coroutine wrappers in further commit.
s/in/in a/
On 5/27/20 4:46 PM, no-re...@patchew.org wrote:
Patchew URL:
https://patchew.org/QEMU/20200527203733.16129-1-vsement...@virtuozzo.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can p
On 5/27/20 4:40 PM, Peter Maydell wrote:
On Wed, 27 May 2020 at 20:21, Philippe Mathieu-Daudé
<1881...@bugs.launchpad.net> wrote:
Public bug reported:
Last time I built QEMU was on commit d5c75ec500d96f1d93447f990cd5a4ef5ba27fae,
I just pulled to fea8f3ed739536fca027cf56af7f5576f37ef9cd and no
Patchew URL:
https://patchew.org/QEMU/20200527203733.16129-1-vsement...@virtuozzo.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEG
For Hexagon, we have LLDB, not GDB. I tinkered with getting LLDB to talk to
qemu but never got if fully functional. I'm planning to get back to it at some
point.
With that caveat, I'll try to answer Xiaolei's questions
- The xml file is returned from qemu to gdb in response to the
Xfer:featur
On Wed, 27 May 2020 at 20:21, Philippe Mathieu-Daudé
<1881...@bugs.launchpad.net> wrote:
>
> Public bug reported:
>
> Last time I built QEMU was on commit d5c75ec500d96f1d93447f990cd5a4ef5ba27fae,
> I just pulled to fea8f3ed739536fca027cf56af7f5576f37ef9cd and now get:
>
> CC lm32-softmmu/fp
The following changes since commit 06539ebc76b8625587aa78d646a9d8d5fddf84f3:
Merge remote-tracking branch
'remotes/philmd-gitlab/tags/mips-hw-next-20200526' into staging (2020-05-26
20:25:06 +0100)
are available in the Git repository at:
https://repo.or.cz/qemu/ericb.git tags/pull-bitmaps-
It's useful to know how much space can be occupied by qcow2 persistent
bitmaps, even though such metadata is unrelated to the guest-visible
data. Report this value as an additional QMP field, present when
measuring an existing image and output format that both support
bitmaps. Update iotest 178 a
On 5/27/20 3:53 PM, Roman Kagan wrote:
---
v5 -> v6:
- add prop_size32 instead of going with 64bit
Would it be worth adding prop_size32 as its own patch, before using it here?
I've no strong opinion on this. Should I better split it out when
respinning?
Patch splitting is an art-form. Bu
Hello all,
I am proud to see that I have my barebones implementation of qemu finally
working. After starting earlier this year, I have slowly made progress to
fully integrate my kernel hardware into a gpu-passthrough vm. I went
through many settings and templates from various sources and finally h
On Wed, May 27, 2020 at 09:50:39AM -0500, Eric Blake wrote:
> On 5/27/20 7:45 AM, Roman Kagan wrote:
> > Several BlockConf properties represent respective sizes in bytes so it
> > makes sense to accept size suffixes for them.
> >
> > Turn them all into uint32_t and use size-suffix-capable setters/
Like for read/write in a previous commit, drop extra indirection layer,
generate directly bdrv_readv_vmstate() and bdrv_writev_vmstate().
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
block/coroutines.h| 10 +++
include/block/block.h | 6 ++--
block/io.c
We are going to keep coroutine-wrappers code (structure-packing
parameters, BDRV_POLL wrapper functions) in separate auto-generated
files. So, we'll need a header with declaration of original _co_
functions, for those which are static now. As well, we'll need
declarations for wrapper functions. Do
Now that we are not maintaining boilerplate code for coroutine
wrappers, there is no more sense in keeping the extra indirection layer
of bdrv_prwv(). Let's drop it and instead generate pure bdrv_preadv()
and bdrv_pwritev().
Currently, bdrv_pwritev() and bdrv_preadv() are returning bytes on
succe
Most of our coroutine wrappers already follow this convention:
We have 'coroutine_fn bdrv_co_()' as
the core function, and a wrapper 'bdrv_()' which does a polling loop.
The only outsiders are the bdrv_prwv_co and
bdrv_common_block_status_above wrappers. Let's refactor them to behave
as the other
We have a very frequent pattern of creating coroutine from function
with several arguments:
- create structure to pack parameters
- create _entry function to call original function taking parameters
from struct
- do different magic to handle completion: set ret to NOT_DONE or
EINPROG
Hi all!
The aim of the series is to reduce code-duplication and writing
parameters structure-packing by hand around coroutine function wrappers.
It's an alternative to "[PATCH v3] block: Factor out bdrv_run_co()"
patch.
Benefits:
- no code duplication
- less indirection
v5: mostly by Eric's s
Use code generation implemented in previous commit to generated
coroutine wrappers in block.c and block/io.c
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/coroutines.h| 7 +-
include/block/block.h | 17 ++-
block.c | 73
block/io.c| 260
This is the only coroutine wrapper from block.c and block/io.c which
doesn't return value, so let's convert it to the common behavior, to
simplify moving to generated coroutine wrappers in further commit.
Also, bdrv_invalidate_cache is a void function, returning error only
through **errp parameter
On 5/27/20 3:07 PM, Peter Maydell wrote:
iotest 190 failed on freebsd:
+++ /home/qemu/qemu-test.BE3Bvf/build/tests/qemu-iotests/190.out.bad
2020-05-27 15:30:50.377759533 +
@@ -17,7 +17,7 @@
fully allocated size: 10813440
required size: 219902322
fully allocated size: 2199023
> -Original Message-
> From: Laurent Vivier
> Sent: Wednesday, May 27, 2020 11:23 AM
> To: Sid Manning ; qemu-devel@nongnu.org
> Subject: [EXT] Re: linux-user - time64 question
>
> Le 05/05/2020 à 23:38, Sid Manning a écrit :
> > I’m looking at a testcase failure when my target uses 64bit
On Wed, May 27, 2020 at 2:41 AM Bin Meng wrote:
>
> On Wed, May 27, 2020 at 6:55 AM Alistair Francis
> wrote:
> >
> > The RISC-V ISA spec version 1.09.1 has been deprecated in QEMU since
> > 4.1. It's not commonly used so let's remove support for it.
> >
> > Signed-off-by: Alistair Francis
> > -
On Tue, 26 May 2020 at 17:43, Eric Blake wrote:
>
> The following changes since commit 8f72c75cfc9b3c84a9b5e7a58ee5e471cb2f19c8:
>
> Merge remote-tracking branch
> 'remotes/kraxel/tags/audio-20200526-pull-request' into staging (2020-05-26
> 10:59:01 +0100)
>
> are available in the Git reposito
Hi David, Vivek,
s
> >> Hi Vivek,
> >>
> >> you have to declare the maxMemory option. Memory devices like
> >> virtio-pmem-pci reside in RAM like a pc-dimm or a nvdimm. If your
> >> virtio-pmem device will be 4GB, you have to add that to maxMemory.
> >>
> >> 64
> >> 68
> >> 64
> >>
> >> (you
Hello,
I've seen a case when QEMU hangs with a passed through USB device. This is
with -device usb-ehci and pass through with usb-host. This works until the
attached USB device reboots (so likely it disconnects and reconnects) at
which point QEMU hangs and need to be SIGKILL-ed to end (that's
Public bug reported:
Last time I built QEMU was on commit d5c75ec500d96f1d93447f990cd5a4ef5ba27fae,
I just pulled to fea8f3ed739536fca027cf56af7f5576f37ef9cd and now get:
CC lm32-softmmu/fpu/softfloat.o
fpu/softfloat.c:3365:13: error: bitwise negation of a boolean expression; did
you mea
On Wed, May 27, 2020 at 07:06:51PM +0200, Cornelia Huck wrote:
> Personally, I find traces to be quite handy, and it's nice if you can
> just enable more of them if they are in your debugging workflow anyway.
> Probably boils down to a matter of preference :)
Totally agree. I am actually a heavy
21.05.2020 21:32, John Snow wrote:
On 5/19/20 7:41 AM, Kevin Wolf wrote:
Am 19.05.2020 um 13:32 hat Vladimir Sementsov-Ogievskiy geschrieben:
19.05.2020 12:07, Kevin Wolf wrote:
Am 18.05.2020 um 18:12 hat Thomas Huth geschrieben:
On 15/05/2020 23.15, Vladimir Sementsov-Ogievskiy wrote:
Ren
tags/pull-register-api-20200527
for you to fetch changes up to 5932a46c8a419db4a6402ac8ae42953b4d4fef1e:
hw/registerfields: Prefix local variables with underscore in macros
(2020-05-27 11:23:07 -0700)
A single patch to avoid clashe
From: Philippe Mathieu-Daudé
One can name a local variable holding a value as 'v', but it
currently clashes with the registerfields macros. To save others
to debug the same mistake, prefix the macro's local variables
with an underscore.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistai
On 5/25/20 1:08 PM, Alberto Garcia wrote:
Signed-off-by: Alberto Garcia
---
tests/qemu-iotests/271 | 705 +
tests/qemu-iotests/271.out | 603 +++
tests/qemu-iotests/group | 1 +
3 files changed, 1309 insertions(+)
cre
On 5/25/20 1:08 PM, Alberto Garcia wrote:
Now that the implementation of subclusters is complete we can finally
add the necessary options to create and read images with this feature,
which we call "extended L2 entries".
Signed-off-by: Alberto Garcia
---
Reviewed-by: Eric Blake
--
Eric Blake
On 5/25/20 1:08 PM, Alberto Garcia wrote:
This works now at the subcluster level and pwrite_zeroes_alignment is
updated accordingly.
qcow2_cluster_zeroize() is turned into qcow2_subcluster_zeroize() with
the following changes:
- The request can now be subcluster-aligned.
- The cluster-
Sorry, missed the question at the end of the email.
Will change the commit and error message to explain better in v2.
Similar to the ucontext, case, sigaltstack does not work out of the box
because it requires a stack to be allocated by the user.
I'll be honest, I didn't check the details of how
On Wed, May 27, 2020 at 12:17 AM Thomas Huth wrote:
>
> On 27/05/2020 00.47, Alistair Francis wrote:
> >
> > include/hw/riscv/spike.h | 6 +-
> > target/riscv/cpu.h| 8 -
> > hw/riscv/spike.c | 217 -
Thomas Huth writes:
> From: Cleber Rosa
>
> At this point it seems that all jobs depend on those steps, with
> maybe the EDK2 jobs as exceptions.
>
> The jobs that will be added later will not want those scripts to be
> run, so let's move these steps to the appropriate jobs, while
> still tryi
Thomas Huth writes:
> We have a dedicated folder for the gitlab-ci - so there is no need
> to clutter the top directory with these .yml files.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alex Bennée
> ---
> .gitlab-ci-edk2.yml => .gitlab-ci.d/edk2.yml | 0
> .gitlab-ci-opensbi.yml =>
On Wed, 27 May 2020 12:53:30 -0400
Peter Xu wrote:
> On Wed, May 27, 2020 at 06:27:38PM +0200, Philippe Mathieu-Daudé wrote:
> > On 5/27/20 6:16 PM, Peter Xu wrote:
> > > On Wed, May 27, 2020 at 05:53:16PM +0200, Philippe Mathieu-Daudé wrote:
> > > +for (i = 0; i < ARRAY_SIZE(iommu);
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/riscv/opentitan.h | 13 +
hw/riscv/opentitan.c | 24 ++--
2 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/include/hw/riscv/opentitan.h
The Ibex core contains a PLIC that although similar to the RISC-V spec
is not RISC-V spec compliant.
This patch implements a Ibex PLIC in a somewhat generic way.
As the current RISC-V PLIC needs tidying up, my hope is that as the Ibex
PLIC move towards spec compliance this PLIC implementation can
Signed-off-by: Alistair Francis
---
target/riscv/pmp.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 0e6b640fbd..9418660f1b 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -233,12 +233,16 @@ bool pmp_ha
Ibex is a small and efficient, 32-bit, in-order RISC-V core with
a 2-stage pipeline that implements the RV32IMC instruction set
architecture.
For more details on lowRISC see here:
https://github.com/lowRISC/ibex
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: LIU Zhiwei
---
The reset vector is set in the init function don't set it again in
realize.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 059d71f2c7..5eb3c02735 100
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/riscv/opentitan.h | 3 +++
hw/riscv/opentitan.c | 19 +--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/r
Previously if we didn't enable the MMU it would be enabled in the
realize() function anyway. Let's ensure that if we don't want the MMU we
disable it. We also don't need to enable the MMU as it will be enalbed
in realize() by default.
Signed-off-by: Alistair Francis
---
target/riscv/cpu.c | 7 ++
This is the initial commit of the Ibex UART device. Serial TX is
working, while RX has been implemeneted but untested.
This is based on the documentation from:
https://docs.opentitan.org/hw/ip/uart/doc/
Signed-off-by: Alistair Francis
---
include/hw/char/ibex_uart.h | 110
hw/char/ibex
This adds a barebone OpenTitan machine to QEMU.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
default-configs/riscv32-softmmu.mak | 1 +
default-configs/riscv64-softmmu.mak | 11 +-
include/hw/riscv/opentitan.h| 63 +++
hw/riscv/opentitan.c| 169 +
OpenTitan is an open source silicon Root of Trust (RoT) project. This
series adds initial support for the OpenTitan machine to QEMU.
This series add the Ibex CPU to the QEMU RISC-V target. It then adds the
OpenTitan machine, the Ibex UART and the Ibex PLIC.
The UART has been tested sending and re
As the functions declared in this header use the symbol_fn_t
typedef itself declared in "hw/loader.h", we need to include
it here to make the header file self-contained.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
---
include/hw/riscv/boot.h | 1 +
On Tue, May 26, 2020 at 6:58 PM LIU Zhiwei wrote:
>
>
>
> On 2020/5/27 1:12, Alistair Francis wrote:
> > On Fri, May 22, 2020 at 12:51 AM LIU Zhiwei wrote:
> >>
> >>
> >> On 2020/5/20 5:31, Alistair Francis wrote:
> >>> Ibex is a small and efficient, 32-bit, in-order RISC-V core with
> >>> a 2-st
On Wed, May 27, 2020 at 06:27:38PM +0200, Philippe Mathieu-Daudé wrote:
> On 5/27/20 6:16 PM, Peter Xu wrote:
> > On Wed, May 27, 2020 at 05:53:16PM +0200, Philippe Mathieu-Daudé wrote:
> > +for (i = 0; i < ARRAY_SIZE(iommu); i++) {
> > +if (ioctl(container->fd, VFIO_CHECK_EXTEN
On 5/25/20 1:08 PM, Alberto Garcia wrote:
The L2 bitmap needs to be updated after each write to indicate what
new subclusters are now allocated. This needs to happen even if the
cluster was already allocated and the L2 entry was otherwise valid.
In some cases however a write operation doesn't ne
On 5/25/20 1:08 PM, Alberto Garcia wrote:
Two things need to be taken into account here:
1) With full_discard == true the L2 entry must be cleared completely.
This also includes the L2 bitmap if the image has extended L2
entries.
2) With full_discard == false we have to make the discard
Thomas Huth writes:
> From: Philippe Mathieu-Daudé
>
> QEMU does not use flex/bison packages.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Message-Id: <20200515163029.12917-4-phi...@redhat.com>
> Signed-off-by: Thomas Huth
Reviewed-by: Alex Bennée
> ---
> .gitlab-ci.yml | 2 +-
> 1 file c
Pavel Dovgalyuk writes:
> This patch adds a test for record/replay, which boots Linux
> image from the disk and interacts with the network.
> The idea and code of this test is borrowed from boot_linux.py
> However, currently record/replay works only for x86_64,
> therefore other tests were excl
On 5/25/20 1:08 PM, Alberto Garcia wrote:
The QCOW_OFLAG_ZERO bit that indicates that a cluster reads as
zeroes is only used in standard L2 entries. Extended L2 entries use
individual 'all zeroes' bits for each subcluster.
This must be taken into account when updating the L2 entry and also
when
On 5/25/20 1:08 PM, Alberto Garcia wrote:
The logic of this function remains pretty much the same, except that
it uses count_contiguous_subclusters(), which combines the logic of
count_contiguous_clusters() / count_contiguous_clusters_unallocated()
and checks individual subclusters.
qcow2_cluste
Thomas Huth writes:
> On 27/05/2020 16.44, Laurent Vivier wrote:
>> Le 25/05/2020 à 15:18, Thomas Huth a écrit :
>>> From: Alex Bennée
>>>
>>> Newer clangs rightly spot that you can never exceed the full address
>>> space of 64 bit hosts with:
>>>
>>> linux-user/elfload.c:2076:41: error: res
On 5/27/20 6:16 PM, Peter Xu wrote:
> On Wed, May 27, 2020 at 05:53:16PM +0200, Philippe Mathieu-Daudé wrote:
> +for (i = 0; i < ARRAY_SIZE(iommu); i++) {
> +if (ioctl(container->fd, VFIO_CHECK_EXTENSION, iommu[i].type)) {
> +trace_vfio_get_iommu_type(iommu[i].ty
Le 05/05/2020 à 23:38, Sid Manning a écrit :
> I’m looking at a testcase failure when my target uses 64bit time in
> msg.h (struct msqid_ds). I’ve been able to get around this but changing
> target_msqid_ds like so:
>
>
> @@ -3900,18 +3901,9 @@ static inline abi_long do_semop(int semid,
> abi_lo
Alex Bennée writes:
> Pavel Dovgalyuk writes:
>
>> This patch adds a test for record/replay an execution of x86_64 machine.
>> Execution scenario includes simple kernel boot, which allows testing
>> basic hardware interaction in RR mode.
>>
>> Signed-off-by: Pavel Dovgalyuk
>> ---
>> 0 files
On Wed, May 27, 2020 at 05:53:16PM +0200, Philippe Mathieu-Daudé wrote:
> >>> +for (i = 0; i < ARRAY_SIZE(iommu); i++) {
> >>> +if (ioctl(container->fd, VFIO_CHECK_EXTENSION, iommu[i].type)) {
> >>> +trace_vfio_get_iommu_type(iommu[i].type, iommu[i].name);
> >> Just wonderin
Aleksandar Markovic writes:
> сре, 27. мај 2020. у 14:05 Aleksandar Markovic
> је написао/ла:
>>
>> сре, 27. мај 2020. у 12:07 Alex Bennée је
>> написао/ла:
>> >
>> > We rely on the pointer to wrap when accessing the high address of the
>> > COMMPAGE so it lands somewhere reasonable. However
Peter Maydell writes:
> On Wed, 27 May 2020 at 15:12, Markus Armbruster wrote:
>> * PATCH 08: in a realize method. Can't actually fail, so let's use
>> &error_abort.
>>
>> * PATCH 09 (this one): likewise.
>
> I disagree with these. We're in a realize function, the API
> says "on errors, repor
On Wed, 27 May 2020 17:55:55 +0200
Philippe Mathieu-Daudé wrote:
> One might want to check which IOMMU version the host kernel
> provide. Add a trace event to see in which mode we opened
> our container.
>
> Reviewed-by: Cornelia Huck
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2: Only di
On 5/25/20 1:08 PM, Alberto Garcia wrote:
If an image has subclusters then there are more copy-on-write
scenarios that we need to consider. Let's say we have a write request
from the middle of subcluster #3 until the end of the cluster:
1) If we are writing to a newly allocated cluster then we n
One might want to check which IOMMU version the host kernel
provide. Add a trace event to see in which mode we opened
our container.
Reviewed-by: Cornelia Huck
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Only display string description (Eric)
Supersedes: <20200526173542.28710-1-phi...@redhat.
On 5/27/20 9:43 AM, Philippe Mathieu-Daudé wrote:
> On 5/27/20 9:08 AM, Auger Eric wrote:
>> Hi Philippe,
>>
>> On 5/26/20 7:35 PM, Philippe Mathieu-Daudé wrote:
>>> One might want to check which IOMMU version the host kernel
>>> provide. Add a trace event to see in which mode we opened
>>> our con
On Mon, May 11, 2020 at 07:09:51PM +0300, Maxim Levitsky wrote:
> This will help us to avoid the scsi device disappearing
> after we took a reference to it.
>
> It doesn't by itself forbid case when we try to access
> an unrealized device
>
> Suggested-by: Stefan Hajnoczi
> Signed-off-by: Maxim
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