Ho hum, failed to send to the list first time.
Forwarded Message
Subject: Re: [PATCH v5 48/60] target/riscv: vector mask-register logical
instructions
Date: Sat, 14 Mar 2020 23:41:59 -0700
From: Richard Henderson
To: LIU Zhiwei
[ Patch didn't make it to the list, so reviewing
On 3/14/20 11:49 PM, LIU Zhiwei wrote:
>>> +if (offset > vl) {\
>>> +offset = vl; \
>>> +} \
>> This isn't rig
On 2020/3/15 13:16, Richard Henderson wrote:
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
+#define GEN_VEXT_VSLIDEUP_VX(NAME, ETYPE, H, CLEAR_FN)\
+void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
+CPURISCVState *env, uint32_t desc)
On 3/14/20 11:13 PM, LIU Zhiwei wrote:
>> SEW == MO_8 should raise illegal instruction exception.
> I agree. But I didn't find a reference in Section 17.3 both in v0.7.1 and
> v0.8.
>
> Perhaps I should refer
>
> "If the current SEW does not correspond to a supported IEEE floating-point
> type,
On 2020/3/15 12:39, Richard Henderson wrote:
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h | 9 +
target/riscv/insn32.decode | 2 ++
target/riscv/insn_trans/trans_rvv.inc.c | 47 +
t
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +static bool vrgather_vx_check(DisasContext *s, arg_rmrr *a)
> +{
> +return (vext_check_isa_ill(s, RVV) &&
> +vext_check_overlap_mask(s, a->rd, a->vm, true) &&
> +vext_check_reg(s, a->rd, false) &&
> +vext_check_reg(s,
On Fri, Mar 13, 2020 at 10:14:34PM +0100, BALATON Zoltan wrote:
> This removes pci_piix4_ide_init() function similar to clean up done to
> other ide devices.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/ide/piix.c| 12 +---
> hw/isa/piix4.c | 5 -
> include/hw/ide.h | 1 -
>
On 3/14/20 10:15 PM, LIU Zhiwei wrote:
>
>
> On 2020/3/15 10:53, Richard Henderson wrote:
>> On 3/12/20 7:58 AM, LIU Zhiwei wrote:
>>> +static bool trans_vext_x_v(DisasContext *s, arg_r *a)
>>> +{
>>> + if (vext_check_isa_ill(s, RVV)) {
>>> + TCGv_ptr src2;
>>> + TCGv dest, src1;
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +#define GEN_VEXT_VSLIDEUP_VX(NAME, ETYPE, H, CLEAR_FN)\
> +void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
> +CPURISCVState *env, uint32_t desc)\
> +{
On 2020/3/15 10:53, Richard Henderson wrote:
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
+static bool trans_vext_x_v(DisasContext *s, arg_r *a)
+{
+if (vext_check_isa_ill(s, RVV)) {
+TCGv_ptr src2;
+TCGv dest, src1;
+gen_helper_vext_x_v fns[4] = {
+gen_helper
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 9 +
> target/riscv/insn32.decode | 2 ++
> target/riscv/insn_trans/trans_rvv.inc.c | 47 +
> target/riscv/vector_helper.c| 36
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 5 +
> target/riscv/insn32.decode | 1 +
> target/riscv/insn_trans/trans_rvv.inc.c | 26 +
> target/riscv/vector_helper.c| 15
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +static bool trans_vext_x_v(DisasContext *s, arg_r *a)
> +{
> +if (vext_check_isa_ill(s, RVV)) {
> +TCGv_ptr src2;
> +TCGv dest, src1;
> +gen_helper_vext_x_v fns[4] = {
> +gen_helper_vext_x_v_b, gen_helper_vext_x_v_h,
>
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 5 +
> target/riscv/insn32.decode | 2 ++
> target/riscv/insn_trans/trans_rvv.inc.c | 21
> target/riscv/vector_helper.c| 26
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 5
> target/riscv/insn32.decode | 1 +
> target/riscv/insn_trans/trans_rvv.inc.c | 22 ++
> target/riscv/vector_helper.c| 31
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +/* vmfirst find-first-set mask bit*/
> +target_ulong HELPER(vmfirst_m)(void *v0, void *vs2, CPURISCVState *env,
> +uint32_t desc)
> +{
> +uint32_t mlen = vext_mlen(desc);
> +uint32_t vm = vext_vm(desc);
> +uint32_t vl = env->vl;
> +in
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +target_ulong HELPER(vmpopc_m)(void *v0, void *vs2, CPURISCVState *env,
> +uint32_t desc)
> +{
> +target_ulong cnt = 0;
> +uint32_t mlen = vext_mlen(desc);
> +uint32_t vm = vext_vm(desc);
> +uint32_t vl = env->vl;
> +int i;
> +
> +
On 3/14/20 4:12 PM, LIU Zhiwei wrote:
> I am not sure whether I get it. In my opinion, the code should be modified
> like
>
> static inline int8_t aadd8_rnu(CPURISCVState *env, int8_t a, int8_t b)
> {
> int16_t res = (int16_t)a + (int16_t)b;
> uint8_t round = res & 0x1;
> res = (res
On 14/03/2020 23:52, Michael S. Tsirkin wrote:
On Sat, Mar 14, 2020 at 12:44:55AM +0200, Liran Alon wrote:
On 13/03/2020 22:07, Philippe Mathieu-Daudé wrote:
On 3/12/20 5:54 PM, Liran Alon wrote:
diff --git a/include/hw/i386/vmport.h b/include/hw/i386/vmport.h
index 34cc050b1ffa..aee809521aa
On Sat, 14 Mar 2020, Philippe Mathieu-Daudé wrote:
On 3/13/20 10:14 PM, BALATON Zoltan wrote:
This removes pci_piix4_ide_init() function similar to clean up done to
other ide devices.
Signed-off-by: BALATON Zoltan
---
hw/ide/piix.c| 12 +---
hw/isa/piix4.c | 5 -
include
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 3 ++
> target/riscv/insn32.decode | 2 +
> target/riscv/insn_trans/trans_rvv.inc.c | 3 ++
> target/riscv/vector_helper.c| 50 +
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 10 +++
> target/riscv/insn32.decode | 4 +++
> target/riscv/insn_trans/trans_rvv.inc.c | 5
> target/riscv/vector_helper.c| 39 +
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 7 +++
> target/riscv/insn32.decode | 2 ++
> target/riscv/insn_trans/trans_rvv.inc.c | 4
> target/riscv/vector_helper.c| 11 +++
> 4 f
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 33 +++
> target/riscv/insn32.decode | 8 +++
> target/riscv/insn_trans/trans_rvv.inc.c | 17 ++
> target/riscv/vector_helper.c| 76 +++
On 2020/3/14 16:25, Richard Henderson wrote:
On 3/14/20 1:14 AM, Richard Henderson wrote:
I think you should have 4 versions of aadd8, for each of the rounding modes,
+RVVCALL(OPIVV2_ENV, vaadd_vv_b, OP_SSS_B, H1, H1, H1, aadd8)
then use this, or something like it, to define 4 functions co
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +static uint32_t vfncvtffv32(uint64_t a, float_status *s)
> +{
> +return float64_to_float32(a, s);
> +}
> +RVVCALL(OPFVV1, vfncvt_f_f_v_h, NOP_UU_H, H2, H4, vfncvtffv16)
> +RVVCALL(OPFVV1, vfncvt_f_f_v_w, NOP_UU_W, H4, H8, vfncvtffv32)
> +GEN_VEXT_V_ENV(v
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +/*
> + * vfwcvt.f.f.v vd, vs2, vm #
> + * Convert single-width float to double-width float.
> + */
> +static uint32_t vfwcvtffv16(uint16_t a, float_status *s)
> +{
> +return float16_to_float32(a, true, s);
> +}
> +static uint64_t vfwcvtffv32(uint32_t a,
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei
> ---
> target/riscv/helper.h | 13 ++
> target/riscv/insn32.decode | 4 +++
> target/riscv/insn_trans/trans_rvv.inc.c | 6 +
> target/riscv/vector_helper.c| 33 +
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +
> +/* Vector Floating-Point Merge Instruction */
> +static bool opfvf_vfmerge_check(DisasContext *s, arg_rmrr *a)
> +{
> +return (vext_check_isa_ill(s, RVV) &&
> +vext_check_overlap_mask(s, a->rd, a->vm, false) &&
> +vext_check_r
On 3/14/20 2:50 PM, Philippe Mathieu-Daudé wrote:
[ ...]
> Missing Kconfig hunk:
>
> -- >8 --
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 4cf8fa4967..8af023abde 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -366,6 +366,7 @@ config FSL_IMX31
> select SERIAL
> sele
Hi Philippe,
On 3/14/20 2:46 PM, Philippe Mathieu-Daudé wrote:
[ ... ]
> Corrected hunk:
>
> -- >8 --
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index e5a876c8d1..c662d5f1e0 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -373,6 +373,7 @@ config FSL_IMX6
> select IMX
>
On 3/14/20 2:48 PM, Philippe Mathieu-Daudé wrote:
[ ... ]
> Here you also need:
>
> -- >8 --
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index c662d5f1e0..4cf8fa4967 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -358,6 +358,7 @@ config FSL_IMX25
> select IMX
> select IMX
On 3/14/20 2:15 AM, LIU Zhiwei wrote:
>>> +static uint64_t fclass_d(uint64_t frs1, float_status *s)
>>> +{
>>> + float64 f = frs1;
>>> + bool sign = float64_is_neg(f);
>>> +
>>> + if (float64_is_infinity(f)) {
>>> + return sign ? 1 << 0 : 1 << 7;
>>> + } else if (float64_is_zero(
On 3/13/20 10:14 PM, BALATON Zoltan wrote:
Spaces are required around a + operator and if statements should have
braces even for single line. Also make it simpler by reversing the
condition instead of breaking the loop.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
On 3/13/20 10:14 PM, BALATON Zoltan wrote:
After previous patches we don't need hw/pci/pci.h any more in
hw/ide.h. Some files depended on implicit inclusion by this header
which are also fixed up here.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/ide/ahci_inte
On 3/13/20 10:14 PM, BALATON Zoltan wrote:
This removes pci_piix4_ide_init() function similar to clean up done to
other ide devices.
Signed-off-by: BALATON Zoltan
---
hw/ide/piix.c| 12 +---
hw/isa/piix4.c | 5 -
include/hw/ide.h | 1 -
3 files changed, 5 insertions(+),
On 3/13/20 10:14 PM, BALATON Zoltan wrote:
This removes pci_piix3_ide_init() and pci_piix3_xen_ide_init()
functions similar to clean up done to other ide devices.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c | 10 +-
hw/ide/pci.c |
On Sat, Mar 14, 2020 at 12:44:55AM +0200, Liran Alon wrote:
>
> On 13/03/2020 22:07, Philippe Mathieu-Daudé wrote:
> > On 3/12/20 5:54 PM, Liran Alon wrote:
> > >
> > > diff --git a/include/hw/i386/vmport.h b/include/hw/i386/vmport.h
> > > index 34cc050b1ffa..aee809521aa0 100644
> > > --- a/inclu
> On Mar 14, 2020, at 5:33 PM, Philippe Mathieu-Daudé wrote:
>
> Extend the copyright range to include the current year.
>
> Reported-by: John Arbuckle
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/qemu-common.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On 3/14/20 6:27 PM, Guenter Roeck wrote:
With this patch, the watchdog on i.MX31 emulations is fully operational.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx31.c | 6 ++
include/hw/arm/fsl-imx31.h | 4
2 files changed, 10 insertions(+)
diff --git a/hw/arm/fsl-imx31.c b
On 3/14/20 6:27 PM, Guenter Roeck wrote:
With this commit, the watchdog on imx25-pdk is fully operational,
including pretimeout support.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx25.c | 10 ++
include/hw/arm/fsl-imx25.h | 5 +
2 files changed, 15 insertions(+)
dif
On 3/14/20 10:43 PM, Philippe Mathieu-Daudé wrote:
Hi Guenter,
On 3/14/20 6:27 PM, Guenter Roeck wrote:
In preparation for a full implementation, move i.MX watchdog driver
from hw/misc to hw/watchdog. While at it, add the watchdog files
to MAINTAINERS.
Signed-off-by: Guenter Roeck
---
MAINT
Hi Guenter,
On 3/14/20 6:27 PM, Guenter Roeck wrote:
In preparation for a full implementation, move i.MX watchdog driver
from hw/misc to hw/watchdog. While at it, add the watchdog files
to MAINTAINERS.
Signed-off-by: Guenter Roeck
---
MAINTAINERS | 2 +
Jason Andryuk, le jeu. 12 mars 2020 08:55:23 -0400, a ecrit:
> Linux guests wait ~30 seconds when closing the emulated /dev/ttyUSB0.
> During that time, the kernel driver is sending many control URBs
> requesting GetModemStat (5). Real hardware returns a status with
> FTDI_THRE (Transmitter Holdin
Jason Andryuk, le jeu. 12 mars 2020 08:55:22 -0400, a ecrit:
> A FTDI USB adapter on an xHCI controller can send 512 byte USB packets.
> These are 8 * ( 2 bytes header + 62 bytes data). A 384 byte receive
> buffer is insufficient to fill a 512 byte packet, so bump the receive
> size to 496 ( 512 -
Extend the copyright range to include the current year.
Reported-by: John Arbuckle
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/qemu-common.h b/include/qemu-common.h
index 082da59e85..d0142f29ac 10064
On Sat, Mar 14, 2020 at 10:05:20PM +0200, Liran Alon wrote:
> Michael, you can also refer to this VMware time-keeping whitepaper:
> https://www.vmware.com/pdf/vmware_timekeeping.pdf.
> According to section "Initializing and Correcting Wall-Clock Time":
> """
> VMware Tools can also optionally be us
On Sat, Mar 14, 2020 at 09:58:23PM +0200, Nikita Leshenko wrote:
> I think that the reason that open-vm-tools doesn't move time backwards is to
> help applications that treat wallclock time as if it's monotonic time and
> break
> if the date is moved backwards (which may happen more frequently in
> On 14 Mar 2020, at 21:26, Michael S. Tsirkin wrote:
>
> On Sat, Mar 14, 2020 at 09:17:30PM +0200, Liran Alon wrote:
>>
>> On 14/03/2020 21:14, Michael S. Tsirkin wrote:
>>> On Sat, Mar 14, 2020 at 09:04:30PM +0200, Liran Alon wrote:
On 14/03/2020 20:18, Michael S. Tsirkin wrote:
>
On 14/03/2020 21:58, Nikita Leshenko wrote:
On 14 Mar 2020, at 21:26, Michael S. Tsirkin wrote:
On Sat, Mar 14, 2020 at 09:17:30PM +0200, Liran Alon wrote:
On 14/03/2020 21:14, Michael S. Tsirkin wrote:
On Sat, Mar 14, 2020 at 09:04:30PM +0200, Liran Alon wrote:
On 14/03/2020 20:18, Mich
Hi Peter, in the About dialog for QEMU the copyright date shows as 2019. Can it
be updated to 2020 please?
Thank you.
On Sat, Mar 14, 2020 at 09:17:30PM +0200, Liran Alon wrote:
>
> On 14/03/2020 21:14, Michael S. Tsirkin wrote:
> > On Sat, Mar 14, 2020 at 09:04:30PM +0200, Liran Alon wrote:
> > > On 14/03/2020 20:18, Michael S. Tsirkin wrote:
> > > > On Fri, Mar 13, 2020 at 06:26:54PM +0200, Liran Alon wrote:
>
On 14/03/2020 21:14, Michael S. Tsirkin wrote:
On Sat, Mar 14, 2020 at 09:04:30PM +0200, Liran Alon wrote:
On 14/03/2020 20:18, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 06:26:54PM +0200, Liran Alon wrote:
On 13/03/2020 17:47, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 05:25:
On Sat, Mar 14, 2020 at 09:04:30PM +0200, Liran Alon wrote:
>
> On 14/03/2020 20:18, Michael S. Tsirkin wrote:
> > On Fri, Mar 13, 2020 at 06:26:54PM +0200, Liran Alon wrote:
> > > On 13/03/2020 17:47, Michael S. Tsirkin wrote:
> > > > On Fri, Mar 13, 2020 at 05:25:20PM +0200, Liran Alon wrote:
>
On 14/03/2020 20:25, Michael S. Tsirkin wrote:
On Sat, Mar 14, 2020 at 09:31:31AM +0100, Philippe Mathieu-Daudé wrote:
On 3/13/20 11:38 PM, Liran Alon wrote:
On 13/03/2020 21:57, Philippe Mathieu-Daudé wrote:
On 3/12/20 5:54 PM, Liran Alon wrote:
No functional change. This is mere refactori
On 14/03/2020 20:18, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 06:26:54PM +0200, Liran Alon wrote:
On 13/03/2020 17:47, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 05:25:20PM +0200, Liran Alon wrote:
@@ -168,6 +169,20 @@ static uint32_t vmport_cmd_ram_size(void *opaque, uint32_
On 14/03/2020 20:18, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 06:26:54PM +0200, Liran Alon wrote:
On 13/03/2020 17:47, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 05:25:20PM +0200, Liran Alon wrote:
@@ -168,6 +169,20 @@ static uint32_t vmport_cmd_ram_size(void *opaque, uint32_
On Fri, Mar 13, 2020 at 08:58:30AM -0700, no-re...@patchew.org wrote:
> Patchew URL:
> https://patchew.org/QEMU/20200313145009.144820-1-liran.a...@oracle.com/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Subject: [PATCH v2
On Sat, Mar 14, 2020 at 09:31:31AM +0100, Philippe Mathieu-Daudé wrote:
> On 3/13/20 11:38 PM, Liran Alon wrote:
> > On 13/03/2020 21:57, Philippe Mathieu-Daudé wrote:
> > > On 3/12/20 5:54 PM, Liran Alon wrote:
> > > > No functional change. This is mere refactoring.
> > > >
> > > > Suggested-by:
On Fri, Mar 13, 2020 at 03:27:59PM -0500, Brijesh Singh wrote:
>
> On 3/13/20 7:44 AM, Halil Pasic wrote:
> > [..]
> >>> CCing Tom. @Tom does vhost-vsock work for you with SEV and current qemu?
> >>>
> >>> Also, one can specify iommu_platform=on on a device that ain't a part of
> >>> a secure-capa
On Fri, Mar 13, 2020 at 06:26:54PM +0200, Liran Alon wrote:
>
> On 13/03/2020 17:47, Michael S. Tsirkin wrote:
> > On Fri, Mar 13, 2020 at 05:25:20PM +0200, Liran Alon wrote:
> > > > > @@ -168,6 +169,20 @@ static uint32_t vmport_cmd_ram_size(void
> > > > > *opaque, uint32_t addr)
> > > > >
Le 14/03/2020 à 18:01, Aleksandar Markovic a écrit :
> On Sat, Mar 14, 2020 at 11:45 AM Laurent Vivier wrote:
>>
>> Le 14/03/2020 à 04:06, Aleksandar Markovic a écrit :
>>> On Fri, Mar 13, 2020 at 1:28 AM Lirong Yuan wrote:
This change updates TASK_UNMAPPED_BASE (the base address for gu
Instantiating PWM, CAN, CAAM, and OCOTP devices is necessary to avoid
crashes when booting mainline Linux.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx7.c | 24
include/hw/arm/fsl-imx7.h | 16
2 files changed, 40 insertions(+)
diff --git a/hw
With this commit, the watchdog on mcimx6ul-evk is fully operational,
including pretimeout support.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx6ul.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index c405b68d1d..8d3b91dd85 100644
--
With this patch applied, the watchdog in the sabrelite emulation
is fully operational, including pretimeout support.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx6.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index ecc62855f2..b266d40881
With this patch, the watchdog on i.MX31 emulations is fully operational.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx31.c | 6 ++
include/hw/arm/fsl-imx31.h | 4
2 files changed, 10 insertions(+)
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 55e90d104b..cec7d0dd
i.MX7 supports watchdog pretimeout interupts. With this commit,
the watchdog in mcimx7d-sabre is fully operational, including
pretimeout support.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx7.c | 11 +++
include/hw/arm/fsl-imx7.h | 5 +
2 files changed, 16 insertions(+)
With this commit, the watchdog on imx25-pdk is fully operational,
including pretimeout support.
Signed-off-by: Guenter Roeck
---
hw/arm/fsl-imx25.c | 10 ++
include/hw/arm/fsl-imx25.h | 5 +
2 files changed, 15 insertions(+)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx2
The current i.MX watchdog implementation only supports resets.
This patch series implements the full watchdog, including optional
pretimeout support.
Notable changes:
- The existing i.MX watchdog emulation (which only emulates syste resets)
is moved from hw/misc to hw/watchdog and renamed to mat
In preparation for a full implementation, move i.MX watchdog driver
from hw/misc to hw/watchdog. While at it, add the watchdog files
to MAINTAINERS.
Signed-off-by: Guenter Roeck
---
MAINTAINERS | 2 ++
hw/misc/Makefile.objs |
Implement full support for the watchdog in i.MX systems.
Pretimeout support is optional because the watchdog hardware on i.MX31
does not support pretimeouts.
Signed-off-by: Guenter Roeck
---
hw/watchdog/Makefile.objs | 2 +-
hw/watchdog/wdt_imx2.c | 196 +++
On Sat, Mar 14, 2020 at 11:45 AM Laurent Vivier wrote:
>
> Le 14/03/2020 à 04:06, Aleksandar Markovic a écrit :
> > On Fri, Mar 13, 2020 at 1:28 AM Lirong Yuan wrote:
> >>
> >> This change updates TASK_UNMAPPED_BASE (the base address for guest
> >> programs) for aarch64. It is needed to allow qe
On Sat, Mar 14, 2020 at 1:28 PM Jiaxun Yang wrote:
>
>
>
> 在 星期六, 2020-03-14 17:09:08 Philippe Mathieu-Daudé
> 撰写
> > Hi Aleksandar,
> >
>
> > >>
> > >> This is annoying, because the CoreLV/CoreFPGA core cards only have 4
> > >> DIMM slots for PC-100 SDRAM, and the Memory Control
Cleber Rosa writes:
> Podman users will most often be using buildah to build containers.
> Among the differences between "buildah bud|build-using-dockerfile" and
> a traditional "docker build" is that buildah does not run a container
> during build.
>
> To the best of my knowledge and experimen
On 14/03/20 14:19, Mark Cave-Ayland wrote:
>> Observe that mac_via_init() has obvious side effects. In particular, it
>> creates two devices that are then visible in "info qtree", and that's
>> caught by device-introspect-test.
>>
>> I believe these things need to be done in .realize().
That is n
Hi
On Thu, Mar 12, 2020 at 11:49 AM Daniel P. Berrangé wrote:
>
> On Thu, Mar 12, 2020 at 10:41:42AM +, Alex Bennée wrote:
> > If you like running QEMU as a normal user (very common for TCG runs)
> > but you have to run virtiofsd as a root user you run into connection
> > problems. Adding sup
On Thu, Mar 12, 2020 at 10:41:42AM +, Alex Bennée wrote:
> If you like running QEMU as a normal user (very common for TCG runs)
> but you have to run virtiofsd as a root user you run into connection
> problems. Adding support for an optional --socket-group allows the
> users to keep using the c
On 14/03/2020 08:47, Pan Nengyuan wrote:
> This series delay timer_new from init into realize to avoid memleaks when we
> call 'device_list_properties'.
> And do timer_free only in s390x_cpu_finalize because it's hotplugable.
> However, mos6522_realize is never called
> at all due to the incorre
On 10/03/2020 09:07, Markus Armbruster wrote:
> Widespread QOM usage anti-pattern ahead; cc: QOM maintainers.
>
> Peter Maydell writes:
>
>> On Mon, 9 Mar 2020 at 10:02, Pan Nengyuan wrote:
>>> On 3/9/2020 5:21 PM, Peter Maydell wrote:
Could you explain more? My thought is that we should
在 星期六, 2020-03-14 17:09:08 Philippe Mathieu-Daudé 撰写
> Hi Aleksandar,
>
> >>
> >> This is annoying, because the CoreLV/CoreFPGA core cards only have 4
> >> DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A
> >> north bridge accept at most 256 MiB per SC
Patchew URL: https://patchew.org/QEMU/20200314113922.233353-1-laur...@vivier.eu/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
expor
On 14/03/2020 10:31, Philippe Mathieu-Daudé wrote:
On 3/13/20 11:38 PM, Liran Alon wrote:
On 13/03/2020 21:57, Philippe Mathieu-Daudé wrote:
On 3/12/20 5:54 PM, Liran Alon wrote:
No functional change. This is mere refactoring.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Liran Alon
---
On 14/03/20 12:45, Mark Cave-Ayland wrote:
> On 13/03/2020 21:14, BALATON Zoltan wrote:
>
>> These are some clean ups to remove more legacy init functions and
>> lessen dependence on include/hw/ide.h with some simplifications in
>> board code. There should be no functional change.
>>
>> BALATON Zo
On 13/03/2020 21:14, BALATON Zoltan wrote:
> These are some clean ups to remove more legacy init functions and
> lessen dependence on include/hw/ide.h with some simplifications in
> board code. There should be no functional change.
>
> BALATON Zoltan (8):
> hw/ide: Get rid of piix3_init functio
Use helper script scripts/gensyscalls.sh to generate the file.
Add TARGET_NR_or1k_atomic
Remove useless comments and blank lines.
Define diretly the __NR_XXX64 syscalls rather than using the
intermediate __NR3264 definition.
Remove wrong cut'n'paste (like "#ifdef __ARCH_WANT_SYNC_FILE_RANGE2")
A
This series adds a script to generate syscall_nr.h for
architectures that don't use syscall.tbl but asm-generic/unistd.h
The script uses several cpp passes and filters result with a grep/sed/tr
sequence.
The result must be checked before being used, so it's why the script is not
automatically run
Use helper script scripts/gensyscalls.sh to generate the file.
This change TARGET_NR_fstatat64 by TARGET_NR_newfstatat that is correct
because definitions from linux are:
arch/arm64/include/uapi/asm/unistd.h
#define __ARCH_WANT_NEW_STAT
include/uapi/asm-generic/unistd.h
#if defined(__ARCH_
Use helper script scripts/gensyscalls.sh to generate the file.
This adds TARGET_NR_llseek that was missing and remove syscalls 1024
to 1079.
Add new syscalls from 288 (pkey_mprotect) to 434 (pidfd_open)
Signed-off-by: Laurent Vivier
Reviewed-by: Alistair Francis
---
Notes:
v2: add comment
This script is needed for targets based on asm-generic syscall numbers
generation
Signed-off-by: Laurent Vivier
Reviewed-by: Alistair Francis
Reviewed-by: Taylor Simpson
---
Notes:
v2: add comments suggested by Taylor
scripts/gensyscalls.sh | 102
Peter Maydell writes:
> Currently if you try to ask for the list of CPUs for a target
> architecture which does not specify a default machine type
> you just get an error:
>
> $ qemu-system-arm -cpu help
> qemu-system-arm: No machine specified, and there is no default
> Use -machine help to
Le 14/03/2020 à 00:56, Alistair Francis a écrit :
> Add support for host and target futex_time64. If futex_time64 exists on
> the host we try that first before falling back to the standard futux
> syscall.
>
> Signed-off-by: Alistair Francis
> ---
> linux-user/syscall.c | 144 +++
Le 14/03/2020 à 00:56, Alistair Francis a écrit :
> Add support for host and target futex_time64. If futex_time64 exists on
> the host we try that first before falling back to the standard futux
> syscall.
>
> Signed-off-by: Alistair Francis
> ---
> linux-user/syscall.c | 144 +++
On 14/03/20 11:49, Philippe Mathieu-Daudé wrote:
>>>
>>> diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs
>>> index 6215e7c208..89bf247173 100644
>>> --- a/hw/core/Makefile.objs
>>> +++ b/hw/core/Makefile.objs
>>> @@ -8,6 +8,7 @@ common-obj-y += vmstate-if.o
>>> # irq.o needed for qdev
On 3/14/20 10:46 AM, Philippe Mathieu-Daudé wrote:
On 3/13/20 7:46 PM, Philippe Mathieu-Daudé wrote:
While user-mode does not use peripherals (devices), it uses a
CPU which is a device.
In the next commit we will reduce the QAPI generated code for
user-mode. Since qdev.c calls qapi_event_send_de
Le 14/03/2020 à 04:06, Aleksandar Markovic a écrit :
> On Fri, Mar 13, 2020 at 1:28 AM Lirong Yuan wrote:
>>
>> This change updates TASK_UNMAPPED_BASE (the base address for guest programs)
>> for aarch64. It is needed to allow qemu to work with Thread Sanitizer
>> (TSan), which has specific boun
On 13/03/20 23:16, BALATON Zoltan wrote:
>>
>> + pci_dev = pci_create_simple(pci_bus, -1, "cmd646-ide");
>> + pci_ide_create_devs(pci_dev);
>
> Additionally, I think it may also make sense to move pci_ide_create_devs
> call into the realize methods of these IDE controllers so boards do not
>
On 13/03/20 17:02, Peter Maydell wrote:
> Reviewed-by: Peter Maydell
Queued, thanks.
Paolo
On 3/13/20 7:46 PM, Philippe Mathieu-Daudé wrote:
While user-mode does not use peripherals (devices), it uses a
CPU which is a device.
In the next commit we will reduce the QAPI generated code for
user-mode. Since qdev.c calls qapi_event_send_device_deleted(),
let's add a stub for it.
Signed-off
On 12/03/20 00:23, Eduardo Habkost wrote:
> Changes v1 -> v2:
> * Use -isystem for $PWD/linux-headers too
> Reported-by: "Michael S. Tsirkin"
>
> This is an alternative to the patch submitted at:
>
> From: Jingqi Liu
> Subject: [PATCH] util: fix to get configuration macros in util/mmap-al
On 13/03/2020 17:57, John Snow wrote:
> On 3/13/20 4:24 AM, Mark Cave-Ayland wrote:
>> Following on from the earlier thread "Implement "non 100% native mode"
>> in via-ide", here is an updated patchset based upon the test cases
>> sent to me off-list.
>>
>> The VIA IDE controller is similar to ear
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