Re: [PATCH] MAINTAINERS: Add entry for Guest X86 HAXM CPUs

Cc'ing qemu-trivial@ On 2/26/20 5:32 AM, Colin Xu wrote: HAXM covers below files: include/sysemu/hax.h target/i386/hax-* Cc: Wenchao Wang Cc: Hang Yuan Signed-off-by: Colin Xu Please keep the Acked-by/Reviewed-by tags: https://www.mail-archive.com/qemu-devel@nongnu.org/msg623832.html This

Re: [PATCH v5 01/18] s390x: Use constant for ESA PSW address

On 2/26/20 6:51 PM, Cornelia Huck wrote: > On Wed, 26 Feb 2020 15:27:52 +0100 > David Hildenbrand wrote: > >> On 26.02.20 13:20, Janosch Frank wrote: >>> Lets make it a bit more clear that we're extracting the 31 bit address > > s/Lets/Let's/ :) Ack > >>> from the short psw. >>> >>> Signed-of

[PATCH v2 1/2] hw/arm/smmu-common: a fix to smmu_find_smmu_pcibus

From: Eric Auger Make sure a null SMMUPciBus is returned in case we were not able to identify a pci bus matching the @bus_num. This matches the fix done on intel iommu in commit: a2e1cd41ccfe796529abfd1b6aeb1dd4393762a2 Signed-off-by: Eric Auger Reviewed-by: Peter Xu Message-Id: <202002261726

[PATCH v2 0/2] hw/arm/smmu-common: Avoid smmu_find_smmu_pcibus return dangling pointer

This series include the previous patch from Eric, then a code refactor to avoid similar mistakes in the future. v1: https://www.mail-archive.com/qemu-devel@nongnu.org/msg683451.html Supersedes: <20200226172628.17449-1-eric.au...@redhat.com> Eric Auger (1): hw/arm/smmu-common: a fix to smmu_find

[PATCH v2 2/2] hw/arm/smmu-common: Simplify smmu_find_smmu_pcibus() logic

The smmu_find_smmu_pcibus() function was introduced (in commit cac994ef43b) in a code format that could return an incorrect pointer, which was then fixed by the previous commit. We could have avoid this by writing the if() statement differently. Do it now, in case this function is re-used. The code

[PATCH v3] hw/i386/intel_iommu: Simplify vtd_find_as_from_bus_num() logic

The vtd_find_as_from_bus_num() function was introduced (in commit dbaabb25f) in a code format that could return an incorrect pointer, which was later fixed by commit a2e1cd41ccf. We could have avoid this by writing the if() statement differently. Do it now, in case this function is re-used. The cod

Re: [PATCH v4 0/5] vhost-user block device backend implementation

On Wed, Feb 26, 2020 at 11:18:41PM +0800, Coiby Xu wrote: > Hi Stefan, > > Thank you for reviewing my code! > > I tried to reach you on IRC. But somehow either you missed my message > or I missed your reply. So I will reply by email instead. > > If we use qio_channel_set_aio_fd_handler to monito

[PATCH v1 6/8] iotests: add "compression type" for test output matching

Affected tests: 049, 060, 061, 065, 144, 182, 242, 255 After adding the compression type feature for qcow2, the compression type is reported on image quering. Add the corresponding values of the "compression type" for the tests' output matching. Signed-off-by: Denis Plotnikov --- tests/qemu-io

[PATCH v1 5/8] iotests: fix header size, feature table size and backing file offset

Affected tests: 031, 036, 061 Because of adding the compression type feature, some size values in the qcow2 v3 header are changed: header_size +=8: 1 byte compression type 7 bytes padding feature_table += 48: incompatible feture compression type backing_file_offset += 56 (8 + 48

[PATCH v1 2/8] qcow2: rework the cluster compression routine

The patch enables processing the image compression type defined for the image and chooses an appropriate method for image clusters (de)compression. Signed-off-by: Denis Plotnikov --- block/qcow2-threads.c | 77 +++ 1 file changed, 63 insertions(+), 14 dele

[PATCH v1 4/8] iotests: filter out compression_type

After adding compression type feature to qcow2 format, qemu framework commands reporting the image settingd, e.g. "qemu-img create", started reporting the compression type for the image which breaks the iotests output matching. To fix it, add compression_type=zlib to the list of filtered image par

[PATCH v1 0/8] qcow2: Implement zstd cluster compression method

zstd comression method is faster than the only available zlib. The series adds zstd to the methods available for clusters compression. The implementation is done with respect to the recently added compression type additional header to the qcow2 specification. Denis Plotnikov (8): qcow2: introdu

[PATCH v1 3/8] qcow2: add zstd cluster compression

zstd significantly reduces cluster compression time. It provides better compression performance maintaining the same level of the compression ratio in comparison with zlib, which, at the moment, is the only compression method available. The performance test results: Test compresses and decompresse

[PATCH v1 1/8] qcow2: introduce compression type feature

The patch adds some preparation parts for incompatible compression type feature to Qcow2 that indicates which allow to use different compression methods for image clusters (de)compressing. It is implied that the compression type is set on the image creation and can be changed only later by image c

[PATCH v1 7/8] iotests: 080: update header size value because of adding compression type

Signed-off-by: Denis Plotnikov --- tests/qemu-iotests/080 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qemu-iotests/080 b/tests/qemu-iotests/080 index a3d13c414e..7588c63b6c 100755 --- a/tests/qemu-iotests/080 +++ b/tests/qemu-iotests/080 @@ -45,7 +45,7 @@ _supported_

[PATCH v1 8/8] iotests: 287: add qcow2 compression type test

The test checks fulfilling qcow2 requiriements for the compression type feature and zstd compression type operability. Signed-off-by: Denis Plotnikov --- tests/qemu-iotests/287 | 123 + tests/qemu-iotests/287.out | 41 + tests/qemu-iotests/gro

Re: [PATCH v2 1/3] iotests: Specify explicit backing format where sensible

On Wed, Feb 26, 2020 at 20:39:26 -0600, Eric Blake wrote: > There are many existing qcow2 images that specify a backing file but > no format. This has been the source of CVEs in the past, but has > become more prominent of a problem now that libvirt has switched to > -blockdev. With older -drive,

Re: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC

On Thursday, February 27, 2020, Programmingkid wrote: > > > On Feb 26, 2020, at 12:27 PM, Aleksandar Markovic < > aleksandar.m.m...@gmail.com> wrote: > > > > On Wed, Feb 26, 2020 at 6:04 PM G 3 wrote: > >> > >> Accuracy is an important part of the IEEE 754 floating point standard. > The whole pu

Re: [PATCH v2 2/3] block: Add support to warn on backing file change without format

On Wed, Feb 26, 2020 at 20:39:27 -0600, Eric Blake wrote: > For now, this is a mechanical addition; all callers pass false. But > the next patch will use it to improve 'qemu-img rebase -u' when > selecting a backing file with no format. > > Signed-off-by: Eric Blake > --- > include/block/block.h

Re: [PATCH v2 3/3] qemu-img: Deprecate use of -b without -F

On Wed, Feb 26, 2020 at 20:39:28 -0600, Eric Blake wrote: > Creating an image that requires format probing of the backing image is > inherently unsafe (we've had several CVEs over the years based on > probes leaking information to the guest on a subsequent boot). If our > probing algorithm ever ch

RE: [PATCH v3 12/19] tests/plugin: prevent uninitialized warning

>-Original Message- >From: Philippe Mathieu-Daudé [mailto:phi...@redhat.com] >Sent: Wednesday, February 26, 2020 10:00 PM >To: Alex Bennée ; qemu-devel@nongnu.org >Cc: f...@euphon.net; Thomas Huth ; >berra...@redhat.com; robert.fo...@linaro.org; pbonz...@redhat.com; >stef...@linux.vnet.ibm

Re: [PATCH qemu v7 0/5] spapr: Kill SLOF

On 27/02/20 00:38, Alexey Kardashevskiy wrote: > > > On 26/02/2020 22:34, Paolo Bonzini wrote: >> On 26/02/20 00:58, Alexey Kardashevskiy wrote: >>> >>> >>> On 21/02/2020 19:27, Paolo Bonzini wrote: On 21/02/20 01:18, Alexey Kardashevskiy wrote: > I am not quite sure I understood the req

Re: [PATCH v3 6/6] hw/timer/cadence_ttc: move timer_new from init() into realize() to avoid memleaks

On Wed, Feb 26, 2020 at 6:37 PM Pan Nengyuan wrote: > > There are some memleaks when we call 'device_list_properties'. This patch > move timer_new from init into realize to fix it. > > Reported-by: Euler Robot > Signed-off-by: Pan Nengyuan Reviewed-by: Alistair Francis Alistair > --- > Cc:

Re: [PATCH 1/6] block: add bitmap-populate job

26.02.2020 22:11, John Snow wrote: On 2/26/20 12:07 AM, Vladimir Sementsov-Ogievskiy wrote: 25.02.2020 23:41, John Snow wrote: On 2/25/20 11:04 AM, Vladimir Sementsov-Ogievskiy wrote: 25.02.2020 3:56, John Snow wrote: This job copies the allocation map into a bitmap. It's a job because th

[Bug 1864955] [NEW] bundle QEMU installer with HAXM accelerator for Windows

Public bug reported: As you probably know HAXM is an accelerator for Windows. https://www.qemu.org/2017/11/22/haxm-usage-windows/ Currently it is required to first install QEMU and then install HAXM. For a better out of the box user experience on the Windows platform it would be nice if QEMU an

Re: [PATCH] hw/ide: Remove status register read side effect

> I'll submit a RFC V2 patch with a proposed fix. This will have to wait. Recent commits have caused Solaris 10 to error out of booting much earlier than previously. Jasper Lowell. On Thu, 2020-02-27 at 05:10 +, jasper.low...@bt.com wrote: > I've since looked at a Ultra 5 board and can conf

[PATCH v4 2/2] virtiofsd: Fix xattr operations

Current virtiofsd has problems about xattr operations and they does not work properly for directory/symlink/special file. The fundamental cause is that virtiofsd uses openat() + f...xattr() systemcalls for xattr operation but we should not open symlink/special file in the daemon. Therefore the fun

[PATCH v4 0/2] virtiofsd: Fix xattr operations

Currently xattr operations on virtiofs does not work properly in some case: - directory ... cannot set - special files (pipe) ... cause hang This fixes these problems and now xfstests generic/062 passes on virtiofs with -o xattr option (I tested with xfs). v3 -> v4: - No logic change - Some c

[PATCH v4 1/2] virtiofsd: passthrough_ll: cleanup getxattr/listxattr

This is a cleanup patch to simplify the following xattr fix and there is no functional changes. - Move memory allocation to head of the function - Unify fgetxattr/flistxattr call for both size == 0 and size != 0 case - Remove redundant lo_inode_put call in error path (Note: second call is igno

Re: [PATCH] hw/ide: Remove status register read side effect

I've since looked at a Ultra 5 board and can confirm that it shipped with a CMD646U chip like the Ultra 10. > Since both the generic PCI IDE and CMD646 Linux drivers mention irq > is > cleared on reading status I think using ide_ioport_read in > hw/ide/pci.c > may be correct for the generic case

[PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes

From: "Edgar E. Iglesias" Generate xlnx-versal-virt zdma FDT nodes. Signed-off-by: Edgar E. Iglesias --- hw/arm/xlnx-versal-virt.c | 28 1 file changed, 28 insertions(+) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index e7f4ca8bf9..878a27514

[PATCH v1 0/2] hw/arm: versal: Add the LPD zDMAs

From: "Edgar E. Iglesias" Instantiate the Versal LPD zDMAs. Cheers, Edgar Edgar E. Iglesias (2): hw/arm: versal: Add support for the LPD ADMAs hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes hw/arm/xlnx-versal-virt.c| 28 hw/arm/xlnx-versal.c

[PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs

From: "Edgar E. Iglesias" Add support for the Versal LPD ADMAs. Signed-off-by: Edgar E. Iglesias --- hw/arm/xlnx-versal.c | 24 include/hw/arm/xlnx-versal.h | 6 ++ 2 files changed, 30 insertions(+) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c

[PATCH v2 2/2] qtest: fix fuzzer-related 80-char limit violations

Signed-off-by: Alexander Bulekov Reviewed-by: Eric Blake --- qtest.c | 3 ++- tests/qtest/fuzz/qos_fuzz.c | 5 - 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/qtest.c b/qtest.c index 1af4e1b08d..5672b75c35 100644 --- a/qtest.c +++ b/qtest.c @@ -794,7 +794

[PATCH v2 0/2] Fix spelling/formatting in fuzzing patches

These patches fix some spelling and line-length violations introduced by the device-fuzzing changes: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg05965.html v2: fixes comment style in the fork_fuzz.ld linker script Alexander Bulekov (2): fuzz: fix style/typos in linker-script commen

[PATCH v2 1/2] fuzz: fix style/typos in linker-script comments

Signed-off-by: Alexander Bulekov Reviewed-by: Eric Blake --- tests/qtest/fuzz/fork_fuzz.ld | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/tests/qtest/fuzz/fork_fuzz.ld b/tests/qtest/fuzz/fork_fuzz.ld index b23a59f194..e086bba873 100644 --- a/tests/qtest/fuz

Re: [PATCH 1/2] fuzz: fix typos in linker-script comments

On 200226 2055, Eric Blake wrote: > On 2/26/20 8:48 PM, Alexander Bulekov wrote: > > Signed-off-by: Alexander Bulekov > > --- > > tests/qtest/fuzz/fork_fuzz.ld | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/tests/qtest/fuzz/fork_fuzz.ld b/tests/qtest/fuzz/fo

Re: [PATCH 2/2] qtest: fix fuzzer-related 80-char limit violations

On 2/26/20 8:48 PM, Alexander Bulekov wrote: Signed-off-by: Alexander Bulekov --- qtest.c | 3 ++- tests/qtest/fuzz/qos_fuzz.c | 5 - 2 files changed, 6 insertions(+), 2 deletions(-) Reviewed-by: Eric Blake diff --git a/qtest.c b/qtest.c index 1af4e1b08d..5672b7

Re: [PULL 24/31] fuzz: support for fork-based fuzzing.

On 200224 1135, Stefan Hajnoczi wrote: > On Sat, Feb 22, 2020 at 05:34:29AM -0600, Eric Blake wrote: > > On 2/22/20 2:50 AM, Stefan Hajnoczi wrote: > > > From: Alexander Bulekov > > > > > > fork() is a simple way to ensure that state does not leak in between > > > fuzzing runs. Unfortunately, the

Re: [PATCH 1/2] fuzz: fix typos in linker-script comments

On 2/26/20 8:48 PM, Alexander Bulekov wrote: Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/fork_fuzz.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/qtest/fuzz/fork_fuzz.ld b/tests/qtest/fuzz/fork_fuzz.ld index b23a59f194..b5aad06f20 100644 --- a/tests

[PATCH 1/2] fuzz: fix typos in linker-script comments

Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/fork_fuzz.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/qtest/fuzz/fork_fuzz.ld b/tests/qtest/fuzz/fork_fuzz.ld index b23a59f194..b5aad06f20 100644 --- a/tests/qtest/fuzz/fork_fuzz.ld +++ b/tests/qtest/fuzz/f

[PATCH 0/2] Fix spelling/formatting in fuzzing patches

These patches fix some spelling and line-length violations introduced by the device-fuzzing changes: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg05965.html Alexander Bulekov (2): fuzz: fix typos in linker-script comments qtest: fix fuzzer-related 80-char limit violations qtest.c

[PATCH 2/2] qtest: fix fuzzer-related 80-char limit violations

Signed-off-by: Alexander Bulekov --- qtest.c | 3 ++- tests/qtest/fuzz/qos_fuzz.c | 5 - 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/qtest.c b/qtest.c index 1af4e1b08d..5672b75c35 100644 --- a/qtest.c +++ b/qtest.c @@ -794,7 +794,8 @@ void qtest_server_i

Re: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC

> On Feb 26, 2020, at 12:27 PM, Aleksandar Markovic > wrote: > > On Wed, Feb 26, 2020 at 6:04 PM G 3 wrote: >> >> Accuracy is an important part of the IEEE 754 floating point standard. The >> whole purpose of this standard is to ensure floating point calculations are >> consistent across m

[PATCH v2 2/3] block: Add support to warn on backing file change without format

For now, this is a mechanical addition; all callers pass false. But the next patch will use it to improve 'qemu-img rebase -u' when selecting a backing file with no format. Signed-off-by: Eric Blake --- include/block/block.h | 4 ++-- block.c | 13 ++--- block/qcow2.c

[PATCH v3 1/6] s390x: fix memleaks in cpu_finalize

This patch fix memleaks when we call tests/qtest/cpu-plug-test on s390x. The leak stack is as follow: Direct leak of 48 byte(s) in 1 object(s) allocated from: #0 0x7fb43c7cd970 in __interceptor_calloc (/lib64/libasan.so.5+0xef970) #1 0x7fb43be2149d in g_malloc0 (/lib64/libglib-2.0.so.0+0x

[PATCH v2 0/3] Tighten qemu-img rules on missing backing format

In v2: - patch 3 changes to ALWAYS warn if -b provided without -F (rather than being silent on raw or json:) [Peter] - patch 3 changes to ONLY write implied format if probe read raw (all other probes are still mentioned, but not implicitly written) [Peter] - couple more tests converted in patch 1 [

[PATCH v2 3/3] qemu-img: Deprecate use of -b without -F

Creating an image that requires format probing of the backing image is inherently unsafe (we've had several CVEs over the years based on probes leaking information to the guest on a subsequent boot). If our probing algorithm ever changes, or if other tools like libvirt determine a different probe

[PATCH v3 5/6] hw/misc/mos6522: move timer_new from init() into realize() to avoid memleaks

There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Meanwhile, add calls to mos6522_realize() in mac_via_realize to make this move to be valid. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- Cc: Laurent Vivier --

[PATCH v3 6/6] hw/timer/cadence_ttc: move timer_new from init() into realize() to avoid memleaks

There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- Cc: "Edgar E. Iglesias" Cc: Alistair Francis --- hw/timer/cadence_ttc.c | 16 +++- 1 file changed, 1

[PATCH v3 2/6] hw/arm/pxa2xx: move timer_new from init() into realize() to avoid memleaks

There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- Cc: Andrzej Zaborowski --- hw/arm/pxa2xx.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(

[PATCH v3 0/6] delay timer_new from init to realize to fix memleaks.

This series delay timer_new from init into realize to avoid memleaks when we call 'device_list_properties'. And do timer_free only in s390x_cpu_finalize because it's hotplugable. However, It's not valid in mos6522 if we move timer_new from init to realize, because it's never called at all. So we

[PATCH v3 4/6] hw/arm/strongarm: move timer_new from init() into realize() to avoid memleaks

There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- hw/arm/strongarm.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/hw/arm/

[PATCH v3 3/6] hw/arm/spitz: move timer_new from init() into realize() to avoid memleaks

There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- Cc: Andrzej Zaborowski --- hw/arm/spitz.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --gi

qemu-system-x86_64: warning: Unknown X11 keycode mapping ''

This error occurs when using any version of vncviewer on any platform and connecting to Debian 10 Buster. The operating system is: Linux Debian 4.19.0-8-amd64 #1 SMP Debian 4.19.98-1 (2020-01-26) a86_64 GNU/Linux The X11 Server is: xfce4 The contents of xprop -root are in the attached xprop-root

Re: [PATCH v6 9/9] iotests: add pylintrc file

On 2/26/20 6:06 PM, John Snow wrote: Repeatable results. run `pylint iotests.py` and you should get a pass. Signed-off-by: John Snow --- tests/qemu-iotests/pylintrc | 20 1 file changed, 20 insertions(+) create mode 100644 tests/qemu-iotests/pylintrc +too-ma

[PULL 3/4] block/nbd: extract the common cleanup code

From: Pan Nengyuan The BDRVNBDState cleanup code is common in two places, add nbd_clear_bdrvstate() function to do these cleanups. Suggested-by: Stefano Garzarella Signed-off-by: Pan Nengyuan Reviewed-by: Vladimir Sementsov-Ogievskiy Message-Id: <1575517528-44312-2-git-send-email-pannengy...@

[PULL 2/4] nbd-client: Support leading / in NBD URI

The NBD URI specification [1] states that only one leading slash at the beginning of the URI path component is stripped, not all such slashes. This becomes important to a patch I just proposed to nbdkit [2], which would allow the exportname to select a file embedded within an ext2 image: ext2fs de

[PULL 4/4] block/nbd: fix memory leak in nbd_open()

From: Pan Nengyuan In currently implementation there will be a memory leak when nbd_client_connect() returns error status. Here is an easy way to reproduce: 1. run qemu-iotests as follow and check the result with asan: ./check -raw 143 Following is the asan output backtrack: Direct leak of

[PULL 1/4] nbd: Fix regression with multiple meta contexts

Detected by a hang in the libnbd testsuite. If a client requests multiple meta contexts (both base:allocation and qemu:dirty-bitmap:x) at the same time, our attempt to silence a false-positive warning about a potential uninitialized variable introduced botched logic: we were short-circuiting the s

[PULL 0/4] NBD patches for 2020-02-26

The following changes since commit db736e0437aa6fd7c1b7e4599c17f9619ab6b837: Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2020-02-25 13:31:16 +) are available in the Git repository at: https://repo.or.cz/qemu/ericb.git tags/pull-nbd-2020-02-26 for you

RE: [PATCH v2 02/13] block/iscsi:Remove redundant statement in iscsi_open()

>-Original Message- >From: Kevin Wolf [mailto:kw...@redhat.com] >Sent: Wednesday, February 26, 2020 5:55 PM >To: Chenqun (kuhn) >Cc: qemu-devel@nongnu.org; qemu-triv...@nongnu.org; >peter.mayd...@linaro.org; Zhanghailiang ; >Euler Robot ; Ronnie Sahlberg >; Paolo Bonzini ; Peter >Lieven ;

Re: [PATCH v5 4/4] target/riscv: add vector configure instruction

On 2020/2/27 3:20, Alistair Francis wrote: On Fri, Feb 21, 2020 at 1:45 AM LIU Zhiwei wrote: vsetvl and vsetvli are two configure instructions for vl, vtype. TB flags should update after configure instructions. The (ill, lmul, sew ) of vtype and the bit of (VSTART == 0 && VL == VLMAX) will

[PATCH v2 2/2] qemu-img: free memory before re-assign

collect_image_check() is called twice in img_check(), the filename/format will be alloced without free the original memory. It is not a big deal since the process will exit anyway, but seems like a clean code and it will remove the warning spotted by asan. Reported-by: Euler Robot Signed-off-by

[PATCH v2 0/2] fix two small memleaks

This series fix two small memleaks. 1. 'crypto_opts' forgot to free in qcow2_close(), do this cleanup in qcow2_close(); 2. Do free filename/format in collect_image_check() when we re-allocate it. v2->v1: - Instead of freeing part of fields in collect_image_check(), do discard the old check obj

[PATCH v2 1/2] block/qcow2: do free crypto_opts in qcow2_close()

'crypto_opts' forgot to free in qcow2_close(), this patch fix the bellow leak stack: Direct leak of 24 byte(s) in 1 object(s) allocated from: #0 0x7f0edd81f970 in __interceptor_calloc (/lib64/libasan.so.5+0xef970) #1 0x7f0edc6d149d in g_malloc0 (/lib64/libglib-2.0.so.0+0x5249d) #2 0x5

Re: [PATCH v2 2/2] linux-user/riscv: Update the syscall_nr's to the 5.5 kernel

Le 27/02/2020 à 01:10, Alistair Francis a écrit : > On Wed, Feb 26, 2020 at 4:02 PM Laurent Vivier wrote: >> >> Le 26/02/2020 à 20:32, Alistair Francis a écrit : >>> On Tue, Feb 25, 2020 at 3:50 AM Laurent Vivier wrote: Le 25/02/2020 à 00:21, Alistair Francis a écrit : > Signed-off-

Re: [PATCH v5 3/4] target/riscv: support vector extension csr

On 2020/2/27 2:42, Alistair Francis wrote: On Fri, Feb 21, 2020 at 1:45 AM LIU Zhiwei wrote: The v0.7.1 specification does not define vector status within mstatus. A future revision will define the privileged portion of the vector status. Signed-off-by: LIU Zhiwei --- target/riscv/cpu_bi

Re: [PATCH v2 2/2] linux-user/riscv: Update the syscall_nr's to the 5.5 kernel

On Wed, Feb 26, 2020 at 4:02 PM Laurent Vivier wrote: > > Le 26/02/2020 à 20:32, Alistair Francis a écrit : > > On Tue, Feb 25, 2020 at 3:50 AM Laurent Vivier wrote: > >> > >> Le 25/02/2020 à 00:21, Alistair Francis a écrit : > >>> Signed-off-by: Alistair Francis > ... > >> I think you can remov

[PATCH v6 8/9] iotests: don't use 'format' for drive_add

It shadows (with a different type) the built-in format. Use something else. Signed-off-by: John Snow --- tests/qemu-iotests/055| 3 ++- tests/qemu-iotests/iotests.py | 6 +++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/tests/qemu-iotests/055 b/tests/qemu-iotests/055

[PATCH v6 6/9] iotests: use python logging for iotests.log()

We can turn logging on/off globally instead of per-function. Remove use_log from run_job, and use python logging to turn on diffable output when we run through a script entry point. iotest 245 changes output order due to buffering reasons. Signed-off-by: John Snow --- tests/qemu-iotests/030

[PATCH v6 2/9] iotests: add script_initialize

Like script_main, but doesn't require a single point of entry. Replace all existing initialization sections with this drop-in replacement. This brings debug support to all existing script-style iotests. Signed-off-by: John Snow --- tests/qemu-iotests/149| 3 +- tests/qemu-iotests/194

[PATCH v6 4/9] iotest 258: use script_main

Since this one is nicely factored to use a single entry point, use script_main to run the tests. Signed-off-by: John Snow --- tests/qemu-iotests/258 | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/tests/qemu-iotests/258 b/tests/qemu-iotests/258 index a65151dda6..e

[PATCH v6 1/9] iotests: do a light delinting

This doesn't fix everything in here, but it does help clean up the pylint report considerably. This should be 100% style changes only; the intent is to make pylint more useful by working on establishing a baseline for iotests that we can gate against in the future. This will be important if (when?

[PATCH v6 3/9] iotests: replace mutable list default args

It's bad hygiene: if we modify this list, it will be modified across all invocations. Signed-off-by: John Snow --- tests/qemu-iotests/iotests.py | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py inde

[PATCH v6 0/9] iotests: use python logging

This series uses python logging to enable output conditionally on iotests.log(). We unify an initialization call (which also enables debugging output for those tests with -d) and then make the switch inside of iotests. It will help alleviate the need to create logged/unlogged versions of all the v

[PATCH v6 9/9] iotests: add pylintrc file

Repeatable results. run `pylint iotests.py` and you should get a pass. Signed-off-by: John Snow --- tests/qemu-iotests/pylintrc | 20 1 file changed, 20 insertions(+) create mode 100644 tests/qemu-iotests/pylintrc diff --git a/tests/qemu-iotests/pylintrc b/tests/qemu-iotes

[PATCH v6 5/9] iotests: Mark verify functions as private

Discourage their use. (Also, make pending patches not yet using the new entry points fail in a very obvious way.) Signed-off-by: John Snow --- tests/qemu-iotests/iotests.py | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/tests/qemu-iotests/iotests.py b

[PATCH v6 7/9] iotests: ignore import warnings from pylint

The right way to solve this is to come up with a virtual environment infrastructure that sets all the paths correctly, and/or to create installable python modules that can be imported normally. That's hard, so just silence this error for now. Signed-off-by: John Snow --- tests/qemu-iotests/iote

Re: [PATCH v2 2/2] linux-user/riscv: Update the syscall_nr's to the 5.5 kernel

Le 26/02/2020 à 20:32, Alistair Francis a écrit : > On Tue, Feb 25, 2020 at 3:50 AM Laurent Vivier wrote: >> >> Le 25/02/2020 à 00:21, Alistair Francis a écrit : >>> Signed-off-by: Alistair Francis ... >> I think you can remove following defintion as they should be translated >> by the target gli

Re: [PATCH v5 0/4] target-riscv: support vector extension part 1

On Wed, Feb 26, 2020 at 3:40 PM Jim Wilson wrote: > > On Wed, Feb 26, 2020 at 2:36 PM Alistair Francis wrote: > > On Wed, Feb 26, 2020 at 12:09 PM Jim Wilson wrote: > > > If this rvv 0.7.1 implementation is considered a temporary solution, > > > maybe we can just remove all of this work when the

Re: [PATCH v5 0/4] target-riscv: support vector extension part 1

On Wed, Feb 26, 2020 at 2:36 PM Alistair Francis wrote: > On Wed, Feb 26, 2020 at 12:09 PM Jim Wilson wrote: > > If this rvv 0.7.1 implementation is considered a temporary solution, > > maybe we can just remove all of this work when the official rvv spec if > > available? But presumably it is be

Re: [PATCH qemu v7 0/5] spapr: Kill SLOF

On 26/02/2020 22:34, Paolo Bonzini wrote: > On 26/02/20 00:58, Alexey Kardashevskiy wrote: >> >> >> On 21/02/2020 19:27, Paolo Bonzini wrote: >>> On 21/02/20 01:18, Alexey Kardashevskiy wrote: I am not quite sure I understood the request. Write my own small firmware and replace GRUB w

Re: [PATCH v5 1/2] block/nbd: extract the common cleanup code

On 12/4/19 9:45 PM, pannengy...@huawei.com wrote: From: Pan Nengyuan The BDRVNBDState cleanup code is common in two places, add nbd_clear_bdrvstate() function to do these cleanups. Signed-off-by: Stefano Garzarella Signed-off-by: Pan Nengyuan Reviewed-by: Vladimir Sementsov-Ogievskiy ---

Re: [PATCH v8 8/9] hw/arm/xilinx_zynq: connect uart clocks to slcr

On Tue, Feb 25, 2020 at 5:40 AM Damien Hedde wrote: > > Add the connection between the slcr's output clocks and the uarts inputs. > > Also add the main board clock 'ps_clk', which is hard-coded to 33.33MHz > (the default frequency). This clock is used to feed the slcr's input > clock. > > Signed-o

Re: [PATCH v8 7/9] hw/char/cadence_uart: add clock support

On Tue, Feb 25, 2020 at 5:31 AM Damien Hedde wrote: > > Switch the cadence uart to multi-phase reset and add the > reference clock input. > > The input clock frequency is added to the migration structure. > > The reference clock controls the baudrate generation. If it disabled, > any input charact

Re: [PATCH v8 9/9] qdev-monitor: print the device's clock with info qtree

On Tue, Feb 25, 2020 at 5:52 AM Damien Hedde wrote: > > This prints the clocks attached to a DeviceState when using > "info qtree" monitor command. For every clock, it displays the > direction, the name and if the clock is forwarded. For input clock, > it displays also the frequency. > > This is b

[PATCH 5/5] Revert "vfio/pci: Disable INTx fast path if using split irqchip"

With the resamplefd list introduced, we can savely enable VFIO INTx fast path again with split irqchip so it can still be faster than the complete slow path. Signed-off-by: Peter Xu --- hw/vfio/pci.c | 12 1 file changed, 12 deletions(-) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c i

Re: [PATCH v8 6/9] hw/misc/zynq_slcr: add clock generation for uarts

On Tue, Feb 25, 2020 at 5:56 AM Damien Hedde wrote: > > Add some clocks to zynq_slcr > + the main input clock (ps_clk) > + the reference clock outputs for each uart (uart0 & 1) > > This commit also transitional the slcr to multi-phase reset as it is > required to initialize the clocks correctly. >

[PATCH 4/5] KVM: Kick resamplefd for split kernel irqchip

This is majorly only for X86 because that's the only one that supports split irqchip for now. When the irqchip is split, we face a dilemma that KVM irqfd will be enabled, however the slow irqchip is still running in the userspace. It means that the resamplefd in the kernel irqfds won't take any ef

Re: [PATCH v1 4/4] accel/tcg: increase default code gen buffer size for 64 bit

On 2/26/20 10:10 AM, Alex Bennée wrote: > While 32mb is certainly usable a full system boot ends up flushing the > codegen buffer nearly 100 times. Increase the default on 64 bit hosts > to take advantage of all that spare memory. After this change I can > boot my tests system without any TB flushe

[PATCH 3/5] KVM: Pass EventNotifier into kvm_irqchip_assign_irqfd

So that kvm_irqchip_assign_irqfd() can have access to the EventNotifiers, especially the resample event. It is needed in follow up patch to cache and kick resamplefds from QEMU. Signed-off-by: Peter Xu --- accel/kvm/kvm-all.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(

Re: [PATCH] ppc: Officially deprecate the CPU "compat" property

On Wed, Feb 26, 2020 at 07:59:38PM +0100, Greg Kurz wrote: > Server class POWER CPUs have a "compat" property, which was obsoleted > by commit 7843c0d60d and replaced by a "max-cpu-compat" property on the > pseries machine type. A hack was introduced so that passing "compat" to > -cpu would still p

[PATCH 0/5] vfio/pci: Fix up breakage against split irqchip and INTx

VFIO INTx is not working with split irqchip. On new kernels KVM_IRQFD will directly fail with resamplefd attached so QEMU will automatically fallback to the INTx slow path. However on old kernels it's still broken. Only until recently I noticed that this could also break PXE boot for assigned NI

[PATCH 2/5] vfio/pci: Use kvm_irqchip_add_irqfd_notifier_gsi() for irqfds

VFIO is currently the only one left that is not using the generic function (kvm_irqchip_add_irqfd_notifier_gsi()) to register irqfds. Let VFIO use the common framework too. Follow up patches will introduce extra features for kvm irqfd, so that VFIO can easily leverage that after the switch. Signe

Re: [PATCH v1 3/4] accel/tcg: only USE_STATIC_CODE_GEN_BUFFER on 32 bit hosts

On 2/26/20 10:10 AM, Alex Bennée wrote: > There is no particular reason to use a static codegen buffer on 64 bit > hosts as we have address space to burn. Allow the common CONFIG_USER > case to use the mmap'ed buffers like SoftMMU. > > Signed-off-by: Alex Bennée > --- > accel/tcg/translate-all.c

[PATCH 1/5] vfio/pci: Disable INTx fast path if using split irqchip

It's currently broken. Let's use the slow path to at least make it functional. Signed-off-by: Peter Xu --- hw/vfio/pci.c | 12 1 file changed, 12 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 5e75a95129..98e0e0c994 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@

Re: R: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC

On Wed, 26 Feb 2020, Alex Bennée wrote: That's the wrong way around. We have regression tests for a reason. I'll happily accept patches to turn on hardfloat for PPC if: a) they don't cause regressions in our fairly extensive floating point tests Where are these tests and how to run them? I'm n

Re: [PATCH v1 2/4] accel/tcg: remove link between guest ram and TCG cache size

On 2/26/20 2:26 PM, Niek Linnenbank wrote: > Hi Alex, > > On Wed, Feb 26, 2020 at 7:10 PM Alex Bennée > wrote: > > Basing the TB cache size on the ram_size was always a little heuristic > and was broken by a1b18df9a4 which caused ram_size not to be fully >

Re: [PATCH v1 2/4] accel/tcg: remove link between guest ram and TCG cache size

On 2/26/20 10:10 AM, Alex Bennée wrote: > Basing the TB cache size on the ram_size was always a little heuristic > and was broken by a1b18df9a4 which caused ram_size not to be fully > realised at the time we initialise the TCG translation cache. > > The current DEFAULT_CODE_GEN_BUFFER_SIZE may sti

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