[PATCH] 9p: local: fix memory leak

Signed-off-by: Yan Wang --- hw/9pfs/9p-local.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c index ca641390fb..d0592c3b45 100644 --- a/hw/9pfs/9p-local.c +++ b/hw/9pfs/9p-local.c @@ -947,7 +947,7 @@ static int local_link(FsContext *ctx

[Bug 1857449] Re: QEMU x86_64 -nographic full system breaks host Bash terminal line wrapping state after simulation ends, requires reset or "tput smam" to fix it

Apparently the code you run (BIOS?) is sending the DECRST control sequence to the terminal, which disable the auto-wrap mode flag. Looking at the detailed explanations on https://github.com/mattiase/wraptest I'm not sure how QEMU can save/restore this flag. -- You received this bug notification

Re: [PATCH v3 08/29] linux-user: Include trace-root.h in syscall-trace.h

On 12/29/19 12:11 AM, Richard Henderson wrote: Code movement in an upcoming patch will show that this file was implicitly depending on trace-root.h being included beforehand. The inlined functions call trace_guest_user_syscall[_ret] which are indeed declared in the root trace-events file: tr

Re: [PATCH v3 07/29] linux-user: Include tcg.h in syscall.c

On 12/29/19 12:11 AM, Richard Henderson wrote: Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Yes, it uses tcg_register_thread(). Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/syscall.c |

Re: [PATCH v3 0/8] hw/avr: Introduce the Arduino boards

On Sun, Dec 29, 2019 at 11:58 PM wrote: > This series failed the docker-quick@centos7 build test. Please find the > testing commands and > their output below. If you have Docker installed, you can probably reproduce > it > locally. > Please send your feedback to patchew-de...@redhat.com Updatin

Re: [PATCH v5 5/6] hppa: Add emulation of Artist graphics

On Fri, Dec 27, 2019 at 9:58 PM Helge Deller wrote: > On 24.12.19 01:18, Philippe Mathieu-Daudé wrote: > > On 12/23/19 6:50 PM, Sven Schnelle wrote: > >> Hi Philippe, > >> > >> On Sun, Dec 22, 2019 at 01:37:48PM +0100, Philippe Mathieu-Daudé wrote: > +if (vga_interface_type != VGA_NONE)

Re: [PATCH v3 0/8] hw/avr: Introduce the Arduino boards

Patchew URL: https://patchew.org/QEMU/20191229224505.24466-1-f4...@amsat.org/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/

[PATCH v3 8/8] tests/acceptance: Test the Arduino MEGA2560 board

As the path name demonstrates, the FreeRTOS tests target a board based on a ATMega2560 MCU. We have one, the Arduino MEGA2560. Complementary documentation: https://feilipu.me/2012/01/15/ethermega-arduino-mega-2560-and-freertos/ https://feilipu.me/2015/11/24/arduino_freertos/ (see 'Compatibility')

[PATCH v3 7/8] tests/acceptance: Keep multilines comment consistent with other tests

Signed-off-by: Philippe Mathieu-Daudé --- note to maintainer: squash before merge? --- tests/acceptance/machine_avr6.py | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/tests/acceptance/machine_avr6.py b/tests/acceptance/machine_avr6.py index 394b3d4f8f..94a8004e94 1006

[PATCH v3 6/8] tests/acceptance: Do not set the machine type manually

Since commit ba21bde93 we don't need to set the machine type manually, the one set by the ":avocado: tags=machine" will be used. Suggested-by: Cleber Rosa Signed-off-by: Philippe Mathieu-Daudé --- tests/acceptance/machine_avr6.py | 1 - 1 file changed, 1 deletion(-) diff --git a/tests/acceptan

[PATCH v3 5/8] tests/boot-serial-test: Test some Arduino boards (AVR based)

The Arduino Duemilanove is based on a AVR5 CPU, while the Arduino MEGA2560 on a AVR6 CPU. Signed-off-by: Philippe Mathieu-Daudé --- tests/boot-serial-test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/boot-serial-test.c b/tests/boot-serial-test.c index e556f09db8..582a497963 1006

[PATCH v3 4/8] hw/avr: Add some Arduino boards

Arduino boards are build with AVR chipsets. Add some of the popular boards: - Arduino Duemilanove - Arduino Uno - Arduino Mega For more information: https://www.arduino.cc/en/Main/Products https://store.arduino.cc/arduino-genuino/most-popular Signed-off-by: Philippe Mathieu-Daudé --- v2: -

[PATCH v3 0/8] hw/avr: Introduce the Arduino boards

Hi, This series add the arduino boards, aiming at removing the 'sample' board that doesn't follow any specification. Since v2: - rebased on Michael's v40 Since v1: - Addressed Igor comments - Addressed Aleksandar comments - Fixed UART issue (was due to IRQ shifted by 2 in CPU) TODO after merge

[PATCH v3 3/8] hw/avr: Add some ATmega microcontrollers

Add some microcontrollers from the megaAVR family (ATmega series): - middle range: ATmega168 and ATmega328 - high range: ATmega1280 and ATmega2560 For product comparison: https://www.microchip.com/wwwproducts/ProductCompare/ATmega168P/ATmega328P https://www.microchip.com/wwwproducts/ProductCo

[PATCH v3 2/8] hw/timer/avr_timer16: Rename memory region debugging name

This device expose 3 different I/O regions. Name them differently to have a clearer 'info mtree' output. Signed-off-by: Philippe Mathieu-Daudé --- hw/timer/avr_timer16.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c inde

[PATCH v3 1/8] hw/char/avr: Reduce USART I/O size

Per the datasheet the USART uses 7 consecutive 8-bit registers. Signed-off-by: Philippe Mathieu-Daudé --- hw/char/avr_usart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/char/avr_usart.c b/hw/char/avr_usart.c index cb307fe23d..becdb87847 100644 --- a/hw/char/avr_usart.

Re: [PATCH v40 07/21] target/avr: Add instruction translation - Bit and Bit-test Instructions

On 12/29/19 10:51 PM, Michael Rolnik wrote: This includes: - LSR, ROR - ASR - SWAP - SBI, CBI - BST, BLD - BSET, BCLR Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé --- target/avr/translate.c | 241 +

Re: [PATCH v40 06/21] target/avr: Add instruction translation - Data Transfer Instructions

On 12/29/19 10:51 PM, Michael Rolnik wrote: This includes: - MOV, MOVW - LDI, LDS LDX LDY LDZ - LDDY, LDDZ - STS, STX STY STZ - STDY, STDZ - LPM, LPMX - ELPM, ELPMX - SPM, SPMX - IN, OUT - PUSH, POP - XCH - LAS, LAC LAT Signed-off-by: M

[PATCH v40 21/21] target/avr: Update MAINTAINERS file

Include AVR maintaners in MAINTAINERS file Signed-off-by: Michael Rolnik --- MAINTAINERS | 21 + 1 file changed, 21 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 387879aebc..90c0a0c27f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -163,6 +163,15 @@ S: Maintained

[PATCH v40 20/21] target/avr: Add Avocado test

The test is based on https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out. it also demostrates that timer and IRQ are working Signed-off-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Tested-by: Phil

[PATCH v40 19/21] target/avr: Add boot serial test

Print out 'T' through serial port Signed-off-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Acked-by: Thomas Huth --- tests/boot-serial-test.c | 10 ++ tests/Makefile.include | 2 ++ 2 files changed, 12 insertions(+) diff --git a/tests/boo

[PATCH v40 14/21] hw/avr: Add example board configuration

A simple board setup that configures an AVR CPU to run a given firmware image. This is all that's useful to implement without peripheral emulation as AVR CPUs include a lot of on-board peripherals. NOTE: this is not a real board NOTE: it's used for CPU testing Signed-off-by: Michael Rol

[PATCH v40 16/21] target/avr: Register AVR support with the rest of QEMU

Add AVR related definitions into QEMU Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic include/disas/dis-asm.h --- qapi/machine.json | 3 ++- include/disas/dis-asm.h| 19 +++ include/sysemu/arch_init.h | 1 + arch_

[PATCH v40 12/21] hw/avr: Add limited support for 16 bit timer peripheral

These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). Signed-off-by: Sarah Harris

[PATCH v40 17/21] target/avr: Add machine none test

Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic --- tests/machine-none-test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c index 5953d31755..3e5c74e73e 100644 --- a/tests/machine-none-t

[PATCH v40 13/21] hw/avr: Add dummy mask device

This is a simple device of just one register, whenver this register is written it calls qemu_set_irq function for each of 8 bits/IRQs.. It is used to implement AVR Power Reduction Signed-off-by: Michael Rolnik --- include/hw/misc/avr_mask.h | 47 hw/misc/avr_mask.c | 11

[PATCH v40 15/21] target/avr: Add section about AVR into QEMU documentation

Signed-off-by: Michael Rolnik --- qemu-doc.texi | 51 +++ 1 file changed, 51 insertions(+) diff --git a/qemu-doc.texi b/qemu-doc.texi index 39f950471f..515aacfae9 100644 --- a/qemu-doc.texi +++ b/qemu-doc.texi @@ -1741,6 +1741,7 @@ differences are

[PATCH v40 08/21] target/avr: Add instruction translation - MCU Control Instructions

This includes: - BREAK - NOP - SLEEP - WDR Signed-off-by: Michael Rolnik --- target/avr/translate.c | 68 ++ target/avr/insn.decode | 9 ++ 2 files changed, 77 insertions(+) diff --git a/target/avr/translate.c b/target/avr/translate.c

[PATCH v40 18/21] target/avr: Update build system

Make AVR support buildable Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic --- configure | 7 +++ default-configs/avr-softmmu.mak | 5 + target/avr/Makefile.objs| 34 + 3 fi

[PATCH v40 11/21] hw/avr: Add limited support for USART peripheral

These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). Signed-off-by: Sarah Harris

[PATCH v40 05/21] target/avr: Add instruction translation - Branch Instructions

This includes: - RJMP, IJMP, EIJMP, JMP - RCALL, ICALL, EICALL, CALL - RET, RETI - CPSE, CP, CPC, CPI - SBRC, SBRS, SBIC, SBIS - BRBC, BRBS Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé --- target/avr/translate.c | 533 ++

[PATCH v40 09/21] target/avr: Add instruction translation - CPU main translation function

Co-developed-by: Richard Henderson Co-developed-by: Michael Rolnik Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé --- target/avr/translate.c | 234 + 1 file changed, 234 insertions(+) diff --git a/target/avr/translate.c b/target/avr/tr

[PATCH v40 10/21] target/avr: Add instruction disassembly function

Provide function disassembles executed instruction when `-d in_asm` is provided Example: `./avr-softmmu/qemu-system-avr -bios free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf -d in_asm` will produce something like the following ``` ... IN: 0x014a: CALL 0x3808 IN: main 0x

[PATCH v40 04/21] target/avr: Add instruction translation - Arithmetic and Logic Instructions

This includes: - ADD, ADC, ADIW - SBIW, SUB, SUBI, SBC, SBCI - AND, ANDI - OR, ORI, EOR - COM, NEG - INC, DEC - MUL, MULS, MULSU - FMUL, FMULS, FMULSU - DES Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé --- target/avr/translate.c | 751 +

[PATCH v40 07/21] target/avr: Add instruction translation - Bit and Bit-test Instructions

This includes: - LSR, ROR - ASR - SWAP - SBI, CBI - BST, BLD - BSET, BCLR Signed-off-by: Michael Rolnik --- target/avr/translate.c | 241 + target/avr/insn.decode | 14 +++ 2 files changed, 255 insertions(+) diff --git a/target/av

[PATCH v40 01/21] target/avr: Add outward facing interfaces and core CPU logic

This includes: - CPU data structures - object model classes and functions - migration functions - GDB hooks Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Michael Rolnik Acked-by: Igor Mammedov Tested-by:

[PATCH v40 02/21] target/avr: Add instruction helpers

Stubs for unimplemented instructions and helpers for instructions that need to interact with QEMU. SPM and WDR are unimplemented because they require emulation of complex peripherals. The implementation of SLEEP is very limited due to the lack of peripherals to generate wake interrupts. Memory a

[PATCH v40 00/21] QEMU AVR 8 bit cores

This series of patches adds 8bit AVR cores to QEMU. All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested yet. However I was able to execute simple code with functions. e.g fibonacci calculation. This series of patches include a non real, sample board. No fuses support yet

[PATCH v40 06/21] target/avr: Add instruction translation - Data Transfer Instructions

This includes: - MOV, MOVW - LDI, LDS LDX LDY LDZ - LDDY, LDDZ - STS, STX STY STZ - STDY, STDZ - LPM, LPMX - ELPM, ELPMX - SPM, SPMX - IN, OUT - PUSH, POP - XCH - LAS, LAC LAT Signed-off-by: Michael Rolnik --- target/avr/translate.c | 986 +

[PATCH v40 03/21] target/avr: Add instruction translation - Registers definition

Signed-off-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé --- target/avr/translate.c | 172 + 1 file changed, 172 insertions(+) create mode 100644 target/avr/translate.c diff --git a/target/avr/translate.c b/tar

Re: [PATCH 3/4] migration-test: Make sure that multifd and cancel works

"Dr. David Alan Gilbert" wrote: > * Juan Quintela (quint...@redhat.com) wrote: >> Test that this sequerce works: >> +/* 1 ms should make it not converge*/ >> +migrate_set_parameter_int(from, "downtime-limit", 1); >> +/* 1GB/s */ >> +migrate_set_parameter_int(from, "max-bandwidth",

Re: [PATCH 1/4] qemu-file: Don't do IO after shutdown

"Dr. David Alan Gilbert" wrote: > * Juan Quintela (quint...@redhat.com) wrote: >> Be sure that we are not doing neither read/write after shutdown of the >> QEMUFile. >> >> Signed-off-by: Juan Quintela >> --- >> migration/qemu-file.c | 13 + >> 1 file changed, 13 insertions(+) >> >>

Re: [PATCH v3 13/29] cputlb: Provide cpu_(ld, st}*_mmuidx_ra for user-only

On Sunday, December 29, 2019, Richard Henderson < richard.hender...@linaro.org> wrote: > This finishes the new interface began with the previous patch. > Document the interface and deprecate MMU_MODE_SUFFIX. > > Reviewed-by: Alex Bennée > Signed-off-by: Richard Henderson > --- > include/exec/cp

Re: [PATCH v39 03/22] target/avr: Add instruction decoding

On Saturday, December 28, 2019, Michael Rolnik wrote: > Hi Aleksandar. > > This seems less logical to me. > Then next thing will be to partition disassember part right? > > > Please respond inline in future, since inline redponding is standard for this mailing list. What is not logical to you?

Re: [PATCH v39 00/22] QEMU AVR 8 bit cores

On Saturday, December 28, 2019, Michael Rolnik wrote: > but this is a sample board that has some ATmega2560 devices and its avr6 > core > >> >> avr6 core is much less represented in real boards than avr5 core - thetefore it shouldn't be the default - you series is not titled "Demo of RTOS on AVR"

[Bug 1857811] [NEW] qemu user static binary seems to lack support for network namespace.

Public bug reported: Whenever I execute emerge in gentoo linux in qemu-aarch64 chroot, I see the following error message. Unable to configure loopback interface: Operation not supported If I disable emerge's network-sandbox which utilizes network namespace, the error disappears. ** Affects: qem

[Bug 1829459] Re: qemu seems to lack support for pid namespace.

** Summary changed: - qemu: qemu_thread_create: Invalid argument + qemu seems to lack support for pid namespace. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1829459 Title: qemu seems to lack sup

virtio-net has a sudden high latency

Hi, all. virtio-net  has a sudden high latency when receiving.  i think it is irq related, but i have no idea to fix it. centos 3.10.0-693.21.1.el7.x86_64 ; qemu-kvm-ev-2.6.0-28.el7_3.9.1.x86_64  ;    physical machine has 40 cpus,   the two vms are on the same node,  cpu load is very low. 1) pi

Re: [PATCH v5 0/6] HPPA: i82596, PS/2 and graphics emulation

On 29.12.19 02:25, Richard Henderson wrote: > On 12/21/19 8:15 AM, Sven Schnelle wrote: >> these series adds quite a lot to the HPPA emulation in QEMU: >> i82596 emulation from Helge, PS/2 and Artist graphics emulation. >> >> See https://parisc.wiki.kernel.org/index.php/Qemu for a few screenshots >

[Bug 1856724] Re: SB.PCI0.SMB0 device drivers unavailable

I noticed this as well. Apparently it was introduced in the following commit: https://github.com/qemu/qemu/commit/ebe15582cafeb944a1c6e99aa526e81a1551c567 Saying: --- pc: Add an SMB0 ACPI device to q35 This is so I2C devices can be found in the ACPI namespace. Currently that's only IPMI, but d

Re: [PATCH v2 26/28] target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX

On Sun, Dec 29, 2019 at 08:18:35AM +1100, Richard Henderson wrote: > On 12/21/19 6:51 AM, Alex Bennée wrote: > >> --- a/target/ppc/mem_helper.c > >> +++ b/target/ppc/mem_helper.c > >> @@ -177,14 +177,7 @@ static void dcbz_common(CPUPPCState *env, > >> target_ulong addr, > >> } else { > >>