On 12/17/19 3:26 AM, Xiaoyao Li wrote:
On 12/17/2019 3:38 AM, Eduardo Habkost wrote:
From: Cathy Zhang
Cooper Lake is intel's successor to Cascade Lake, the new
CPU model inherits features from Cascadelake-Server, while
add one platform associated new feature: AVX512_BF16. Meanwhile,
add STIBP
Hi Niek,
On 12/17/19 12:35 AM, Niek Linnenbank wrote:
The Security Identifier device in Allwinner H3 System on Chip
gives applications a per-board unique identifier. This commit
adds support for the Allwinner H3 Security Identifier using
a 128-bit UUID value as input.
Signed-off-by: Niek Linnen
Eric Blake writes:
> On 12/13/19 8:11 AM, Peter Krempa wrote:
>> When a management application manages node names there's no reason to
>> recurse into backing images in the output of query-named-block-nodes.
>>
>> Add a parameter to the command which will return just the top level
>> structs.
>
>
Hi Niek,
On 12/17/19 12:35 AM, Niek Linnenbank wrote:
The Xunlong Orange Pi PC is an Allwinner H3 System on Chip
based embedded computer with mainline support in both U-Boot
and Linux. The board comes with a Quad Core Cortex A7 @ 1.3GHz,
512MB RAM, 100Mbit ethernet, USB, SD/MMC, USB, HDMI and
va
On Tue, Dec 17, 2019 at 02:28:44PM +0800, Kirti Wankhede wrote:
>
>
> On 12/17/2019 4:14 AM, Alex Williamson wrote:
> > On Tue, 17 Dec 2019 01:51:36 +0530
> > Kirti Wankhede wrote:
> >
> >> - Defined MIGRATION region type and sub-type.
> >>
> >> - Defined vfio_device_migration_info structure wh
On 2019-12-09, Fangrui Song wrote:
On 2019-12-01, Fangrui Song wrote:
Thanks for reviewing this patch!
On 2019-12-01, Richard Henderson wrote:
On 11/27/19 6:36 PM, Fangrui Song wrote:
On 2019-11-20, Fangrui Song wrote:
On 2019-11-15, Fangrui Song wrote:
For lld, --image-base is the preferr
Gentle ping.
On 12/9/2019 4:30 PM, Xu, Tao3 wrote:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend to use double small than DBL_MIN
- Add more
David Gibson writes:
> From: Vladimir Sementsov-Ogievskiy
>
> Make kvmppc_hint_smt_possible hint append helper well formed:
> rename errp to errp_in, as it is IN-parameter here (which is unusual
> for errp), rename function to be kvmppc_error_append_*_hint.
>
> Signed-off-by: Vladimir Sementsov-
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20191205174635.18758-13-vsement...@virtuozzo.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
qga/commands-posix.c | 2 +-
qga/commands-win
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Cornelia Huck
Message-Id: <20191205174635.18758-15-vsement...@virtuozzo.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: David Hildenbrand
Signed-off-by: Markus Armbruster
---
hw/s390x/event-fac
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20191205174635.18758-18-vsement...@virtuozzo.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Markus Armbruster
---
hw/usb/dev-network.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
Corey Minyard writes:
> On Mon, Dec 16, 2019 at 10:20:04AM +0100, Markus Armbruster wrote:
>> Corey Minyard writes:
>>
>> I've since posted v2 with a revamped commit message, and I'm ready to
>> post a pull request. I really want the whole thing committed before the
>> Christmas break, so Vlad
From: Vladimir Sementsov-Ogievskiy
We don't need Error **, as all callers pass local Error object, which
isn't used after the call. Use Error * instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Acked-by: Dr. David Alan Gilbert
Reviewed-by: Markus Armbruster
Message-Id: <20191205174635.1875
From: Vladimir Sementsov-Ogievskiy
All callers of nbd_iter_channel_error() pass the address of a
local_err variable, and only call this function if an error has
already occurred, using this function to propagate that error.
This is already implied by its name (local_err instead of the classic
err
From: Vladimir Sementsov-Ogievskiy
Mostly, Error ** is for returning error from the function, so the
callee sets it. However kvmppc_hint_smt_possible gets already filled
errp parameter. It doesn't change the pointer itself, only change the
internal state of referenced Error object. So we can make
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
Message-Id: <20191205174635.18758-11-vsement...@virtuozzo.com>
Signed-off-by: Markus Armbruster
---
include/block/snapshot.h | 2 +-
block/snapshot.c | 4 ++--
2 files changed, 3 ins
From: Vladimir Sementsov-Ogievskiy
Mostly, Error ** is for returning error from the function, so the
callee sets it. However error_append_security_model_hint and
error_append_socket_sockfd_hint get already filled errp
parameter. They don't change the pointer itself, only change the
internal state
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Stefan Berger
Message-Id: <20191205174635.18758-17-vsement...@virtuozzo.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Markus Armbruster
---
hw/tpm/tpm_emulator.c | 8
1 file changed
On 12/17/2019 4:14 AM, Alex Williamson wrote:
On Tue, 17 Dec 2019 01:51:36 +0530
Kirti Wankhede wrote:
- Defined MIGRATION region type and sub-type.
- Defined vfio_device_migration_info structure which will be placed at 0th
offset of migration region to get/set VFIO device related infor
On 12/17/2019 4:46 AM, Alex Williamson wrote:
On Tue, 17 Dec 2019 01:51:37 +0530
Kirti Wankhede wrote:
Flag VFIO_IOMMU_INFO_DIRTY_PGS in VFIO_IOMMU_GET_INFO indicates that driver
support dirty pages tracking.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
---
drivers/vfio/vfio_iomm
From: Vladimir Sementsov-Ogievskiy
Variable int err in inner scope shadows Error *err in outer scope.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20191205174635.18758-3-vsement...@virtuozzo.com>
Signed-off-by: Markus Arm
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20191205174635.18758-12-vsement...@virtuozzo.com>
Signed-off-by: Markus Armbruster
---
hw/i386/amd_iommu.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/i386/amd_
When os_mem_prealloc() fails, file_ram_alloc() calls qemu_ram_munmap()
and returns null. Except it doesn't when its @errp argument is null,
because it checks for failure with (errp && *errp). Introduced in
commit 056b68af77 "fix qemu exit on memory hotplug when allocation
fails at prealloc time".
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20191205174635.18758-19-vsement...@virtuozzo.com>
Signed-off-by: Markus Armbruster
---
include/qom/object.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
From: Vladimir Sementsov-Ogievskiy
Rename Error ** parameter in check_only_migratable to common errp.
In device_set_realized:
- Move "if (local_err != NULL)" closer to error setters.
- Drop 'Error **local_errp': it doesn't save any LoCs, but it's very
unusual.
Signed-off-by: Vladimir Sem
Local Error * variables are conventionally named @err or @local_err,
and Error ** parameters @errp. Naming local variables like parameters
is confusing. Clean that up.
Naming parameters like local variables is also confusing. Left for
another day.
Signed-off-by: Markus Armbruster
Reviewed-by:
isa_ipmi_bt_realize(), ipmi_isa_realize(), pci_ipmi_bt_realize(), and
pci_ipmi_kcs_realize() dereference @errp when IPMIInterfaceClass
method init() fails. That's wrong; see the big comment in error.h.
Introduced in commit 0719029c47 "ipmi: Add an ISA KCS low-level
interface", then imitated in com
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20191205174635.18758-14-vsement...@virtuozzo.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Markus Armbruster
---
monitor/qmp-cmds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
Message-Id: <20191205174635.18758-16-vsement...@virtuozzo.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Markus Armbruster
---
hw/sd/sdhci.c | 2 +-
1 file changed, 1 insertion(+),
From: Vladimir Sementsov-Ogievskiy
No reason for local_err here, use errp directly instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Marc-André Lureau
Reviewed-by: Gonglei
Message-Id: <20191205174635.18758-20-vsement...@virtuozzo.com>
Signe
build_guest_fsinfo_for_virtual_device() dereferences @errp when
build_guest_fsinfo_for_device() fails. That's wrong; see the big
comment in error.h. Introduced in commit 46d4c5723e "qga: Add
guest-get-fsinfo command".
No caller actually passes null.
Fix anyway: splice in a local Error *err, and
From: Vladimir Sementsov-Ogievskiy
We don't need Error **, as all callers pass local Error object, which
isn't used after the call, or NULL. Use Error * instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Markus Armbruster
Message-Id: <20191205174635.18758-6-vsement...@virtuozzo.
legacy_acpi_cpu_plug_cb() dereferences @errp when
acpi_set_cpu_present_bit() fails. That's wrong; see the big comment
in error.h. Introduced in commit cc43364de7 "acpi/cpu-hotplug:
introduce helper function to keep bit setting in one place".
No caller actually passes null, and acpi_set_cpu_prese
From: Vladimir Sementsov-Ogievskiy
Mostly, Error ** is for returning error from the function, so the
callee sets it. However these three functions get already filled errp
parameter. They don't change the pointer itself, only change the
internal state of referenced Error object. So we can make it
From: Vladimir Sementsov-Ogievskiy
No reason for local_err here, use errp directly instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Markus Armbruster
Reviewed-by: Cornelia Huck
Message-Id: <20191205174635.18758-21-vsement...@virtuozzo.com>
Signed-off-by: Markus Armbruster
--
The following changes since commit cb88904a54903ef6ba21a68a61d9cd51e2166304:
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-dec-16-2019'
into staging (2019-12-16 14:07:56 +)
are available in the Git repository at:
git://repo.or.cz/qemu/armbru.git tags/pull-error-2019-12
memory_device_get_free_addr() dereferences @errp when
memory_device_check_addable() fails. That's wrong; see the big
comment in error.h. Introduced in commit 1b6d6af21b "pc-dimm: factor
out capacity and slot checks into MemoryDevice".
No caller actually passes null.
Fix anyway: splice in a loca
From: Vladimir Sementsov-Ogievskiy
Mostly, Error ** is for returning error from the function, so the
callee sets it. However qbus_list_bus and qbus_list_dev get already
filled errp parameter. They don't change the pointer itself, only
change the internal state of referenced Error object. So we ca
Cc: Halil Pasic
Cc: Cornelia Huck
Cc: Christian Borntraeger
Signed-off-by: Markus Armbruster
Reviewed-by: Cornelia Huck
Acked-by: Halil Pasic
Message-Id: <20191204093625.14836-18-arm...@redhat.com>
---
hw/intc/s390_flic_kvm.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
fit_load_fdt() passes @errp to fit_image_addr(), then recovers from
ENOENT failures. Passing @errp is wrong, because it works only as
long as @errp is neither @error_fatal nor @error_abort. Error
recovery dereferences @errp. That's also wrong; see the big comment
in error.h. Error recovery can
Cc: "Daniel P. Berrangé"
Signed-off-by: Markus Armbruster
Message-Id: <20191204093625.14836-3-arm...@redhat.com>
Acked-by: Daniel P. Berrangé
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
include/crypto/tlssession.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/cr
Declaring a local Error *err without initializer looks suspicious.
Fuse the declaration with the initialization to avoid that.
Signed-off-by: Markus Armbruster
Message-Id: <20191204093625.14836-5-arm...@redhat.com>
Reviewed-by: Eric Blake
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Vladimi
qcrypto_tls_creds_load_cert() passes uninitialized GError *gerr by
reference to g_file_get_contents(). When g_file_get_contents() fails,
it'll try to set a GError. Unless @gerr is null by dumb luck, this
logs a ERROR_OVERWRITTEN_WARNING warning message and leaves @gerr
unchanged. qcrypto_tls_cre
Cc: "Daniel P. Berrangé"
Signed-off-by: Markus Armbruster
Message-Id: <20191204093625.14836-4-arm...@redhat.com>
Acked-by: Daniel P. Berrangé
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
include/io/task.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/io/task.h b/
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
Message-Id: <20191204093625.14836-19-arm...@redhat.com>
---
tests/test-blockjob.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tests/test-blockjob.c b/tests/test-blockjob.c
index e670a20617..4eeb184caf 100644
--- a
-msg parameter "timestamp" defaults to "off" if you don't specify msg,
and to "on" if you do. Messed up right in commit 5e2ac51917 "add
timestamp to error_report()". Mostly harmless, because "timestamp" is
the only parameter, so "if you do" is "-msg ''", which nobody does.
Change the default to
Hi David,
On 11/22/2019 10:41 AM, David Gibson wrote:
On Mon, Oct 14, 2019 at 01:38:16PM -0500, Shivaprasad G Bhat wrote:
device_add/del phase itself instead.
The guest kernel makes bind/unbind requests for the virtual NVDIMM device
at the region level granularity. Without interleaving, each
On Tue, Dec 17, 2019 at 04:21:39AM +0800, Kirti Wankhede wrote:
> VFIO_IOMMU_DIRTY_PAGES ioctl performs three operations:
> - Start unpinned pages dirty pages tracking while migration is active and
> device is running, i.e. during pre-copy phase.
> - Stop unpinned pages dirty pages tracking. This
From: Wainer dos Santos Moschetta
This adds a method to check if the tcg accelerator is enabled
in the QEMU binary.
Signed-off-by: Wainer dos Santos Moschetta
Reviewed-by: Alex Bennée
Reviewed-by: Cleber Rosa
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Cleber Rosa
Message-Id: <2019121619
From: Wainer dos Santos Moschetta
Since commit cbe6d6365a48 the command `qemu -accel help` returns
the list of accelerators enabled in the QEMU binary. This adds
the list_accel() method which return that same list.
Signed-off-by: Wainer dos Santos Moschetta
Message-Id: <20191216191438.93418-3-w
Currently a test can describe the target architecture binary that it
should primarily be run with, be setting a single tag value.
The same approach is expected to be done with other QEMU aspects to be
tested, for instance, the machine type and accelerator, so let's
generalize the logic into a util
From: Wainer dos Santos Moschetta
On linux_initrd and empty_cpu_model tests the same effect of
calling QEMU through run() to inspect the terminated process is
achieved with a sequence of set_qmp_monitor() / launch() / wait()
commands on an QEMUMachine object. This patch changes those
tests to use
The following changes since commit 856ffa6465ad38a31603223eb057a253114ceaea:
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20191216-1' into staging (2019-12-16
13:04:34 +)
are available in the Git repository at:
git://github.com/clebergnu/qemu.git t
From: Philippe Mathieu-Daudé
The kernel packaged was fetched from an unstable repository.
Use the stable snapshot archive instead.
Reviewed-by: Alex Bennée
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191126223810.20180-2-phi...@redhat.com>
Tested-by: Willian Rampazzo
Reviewed-by: Cle
From: Greg Kurz
The XSCOM bus is implemented with a QOM interface, which is mostly
generic from a CPU type standpoint, except for the computation of
addresses on the Pervasive Connect Bus (PCB) network. This is handled
by the pnv_xscom_pcba() function with a switch statement based on
the chip_typ
From: Greg Kurz
The pnv_dt_create() function generates different contents for the
"compatible" property of the root node in the DT, depending on the
CPU type. This is open coded with multiple ifs using pnv_is_powerXX()
helpers.
It seems cleaner to achieve with QOM. Introduce a base class for the
From: Greg Kurz
The pnv_chip_core_realize() function configures the XSCOM MMIO subregion
for each core of a single chip. The base address of the subregion depends
on the CPU type. Its computation is currently open-code using the
pnv_chip_is_powerXX() helpers. This can be achieved with QOM. Introd
From: Wainer dos Santos Moschetta
__init_.py import some sub-modules unnecessarily. So let's
clean it up.
Signed-off-by: Wainer dos Santos Moschetta
Suggested-by: Cleber Rosa
Reviewed-by: Cleber Rosa
Tested-by: Cleber Rosa
Message-Id: <20191216191438.93418-6-waine...@redhat.com>
Signed-off-b
From: Greg Kurz
It isn't used anymore.
Signed-off-by: Greg Kurz
Message-Id: <157623838530.360005.15470128760871845396.st...@bahia.lan>
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc/pnv_psi.c | 3 ---
include/hw/ppc/pnv_psi.h | 1 -
2 files changed, 4 deletions(
An Avocado Test ID[1] is composed by a number of components, but it
starts with the Test Name, usually a file system location that was
given to the loader.
Because the source directory is being given as a prefix to the
"tests/acceptance" directory containing the acceptance tests, the test
names wi
From: Wainer dos Santos Moschetta
Currently kvm_available() checks for the presence of kvm module
and, if target and host arches don't mismatch. This patch adds
an 3rd checking: if QEMU binary was compiled with kvm
support.
Signed-off-by: Wainer dos Santos Moschetta
Reviewed-by: Alex Bennée
Re
From: Greg Kurz
They aren't used anymore.
Signed-off-by: Greg Kurz
Message-Id: <157623840200.360005.1300941274565357363.st...@bahia.lan>
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
include/hw/ppc/pnv.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/h
The default vm provided by the test, available as self.vm, serves the
same purpose of the one obtained by self.get_vm(), but saves a line
and matches the style of other tests.
Signed-off-by: Cleber Rosa
Message-Id: <20190924194501.9303-2-cr...@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta
From: Marc-André Lureau
Traceback (most recent call last):
File "../scripts/analyze-migration.py", line 611, in
dump.read(desc_only = True)
File "../scripts/analyze-migration.py", line 513, in read
self.load_vmsd_json(file)
File "../scripts/analyze-migration.py", line 556, in load_
From: Wainer dos Santos Moschetta
This creates the 'accel' Python module to be the home for
utilities that deal with accelerators. Also moved kvm_available()
from __init__.py to this new module.
Signed-off-by: Wainer dos Santos Moschetta
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-D
From: Greg Kurz
PnvXScomInterface is an interface instance. It should never be
dereferenced. Drop the dummy type definition for extra safety,
which is the common practice with QOM interfaces.
While here also convert the bogus OBJECT_CHECK() to INTERFACE_CHECK().
Signed-off-by: Greg Kurz
Messag
The same way the arch tag is being used as a fallback for the arch
parameter, let's do the same for QEMU's machine and avoid some boiler
plate code.
This is now possible because, since Avocado 72.0, it's possible to use
tags with names that match the machine types on QEMU.
Signed-off-by: Cleber R
From: Greg Kurz
The pnv_pic_print_info() callback checks the type of the chip in order
to forward to the request appropriate interrupt controller. This can
be achieved with QOM. Introduce a method for this in the base chip class
and implement it in child classes.
This also prepares ground for th
From: Greg Kurz
It isn't used anymore.
Signed-off-by: Greg Kurz
Message-Id: <157623844102.360005.12070225703151669294.st...@bahia.lan>
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc/pnv.c | 5 -
include/hw/ppc/pnv.h | 9 -
2 files changed, 14 deletio
From: Suraj Jitindar Singh
The Access Segment Descriptor Register (ASDR) provides information about
the storage element when taking a hypervisor storage interrupt. When
performing nested radix address translation, this is normally the guest
real address. This register is present on POWER9 process
From: Greg Kurz
They aren't used anymore.
Signed-off-by: Greg Kurz
Message-Id: <157623842986.360005.1787401623906380181.st...@bahia.lan>
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
include/hw/ppc/pnv.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/h
From: Cédric Le Goater
The PBA bridge unit (Power Bus Access) connects the OCC (On Chip
Controller) to the Power bus and System Memory. The PBA is used to
gather sensor data, for power management, for sleep states, for
initial boot, among other things.
The PBA logic provides a set of four regist
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
Message-Id: <20191205184454.10722-4-...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/pnv_psi.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 7e725aaf2b..e6c266ac4a
From: Cédric Le Goater
This includes in QEMU a new CPU model for the POWER10 processor with
the same capabilities of a POWER9 process. The model will be extended
when support is completed.
Signed-off-by: Cédric Le Goater
Message-Id: <20191205184454.10722-2-...@kaod.org>
Signed-off-by: David Gib
From: Greg Kurz
The Processor Service Interface (PSI) model has a chip_type class level
attribute, which is used to generate the content of the "compatible" DT
property according to the CPU type.
Since the PSI model already has specialized classes for each supported
CPU type, it seems cleaner to
From: Cédric Le Goater
The OCC common area is mapped at a unique address on the system and
each OCC is assigned a segment to expose its sensor data :
-
| Start (Offset from | End | Size |Description
From: Greg Kurz
Since pnv_dt_xscom() is called from chip specific dt_populate() hooks,
it shouldn't have to guess the chip type in order to populate the "reg"
property. Just pass the base address and address size as arguments.
Signed-off-by: Greg Kurz
Message-Id: <157623841868.360005.1757762482
From: Greg Kurz
PPCVirtualHypervisor is an interface instance. It should never be
dereferenced. Drop the dummy type definition for extra safety, which
is the common practice with QOM interfaces.
Signed-off-by: Greg Kurz
Message-Id: <157589808041.21182.18121655959115011353.st...@bahia.lan>
Signe
From: Cédric Le Goater
Some devices could be initialized in the instance_init handler but not
realized for configuration reasons. Nodes should not be added in the DT
for such devices.
Signed-off-by: Cédric Le Goater
Message-Id: <20191210135845.19773-3-...@kaod.org>
Reviewed-by: Greg Kurz
Revie
From: Suraj Jitindar Singh
The virtual timebase register (VTB) is a 64-bit register which
increments at the same rate as the timebase register, present on POWER8
and later processors.
The register is able to be read/written by the hypervisor and read by
the supervisor. All other accesses are ill
From: Greg Kurz
The correct way to do this is to deassert the input pins on the CPU side.
This is the case since a previous change.
Signed-off-by: Greg Kurz
Message-Id: <157548862298.3650476.1228720391270249433.st...@bahia.lan>
Signed-off-by: David Gibson
---
hw/intc/xics.c | 3 ---
1 file ch
From: Cédric Le Goater
This is an empty shell with the XSCOM bus and cores. The chip controllers
will come later.
Signed-off-by: Cédric Le Goater
Message-Id: <20191205184454.10722-3-...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/pnv.c | 158
From: Wainer dos Santos Moschetta
The QEMUMachine VM has a monitor setup on which an QMP
connection is always attempted on _post_launch() (executed
by launch()). In case the QEMU process immediatly exits
then the qmp.accept() (used to establish the connection) stalls
until it reaches timeout and
From: Cédric Le Goater
The POWER10 PSIHB controller is very similar to the one on POWER9. We
should probably introduce a common PnvPsiXive object.
The ESB page size should be changed to 64k when P10 support is ready.
Signed-off-by: Cédric Le Goater
Message-Id: <20191205184454.10722-5-...@kaod.
From: Greg Kurz
Signed-off-by: Greg Kurz
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <157623837421.360005.412120366652768311.st...@bahia.lan>
Signed-off-by: David Gibson
---
include/hw/ppc/pnv_xscom.h | 22 +++---
include/hw/ppc/spapr_vio.h | 6 +++---
2 files changed, 14
From: Cédric Le Goater
We will use it to resend missed interrupts when a vCPU context is
pushed on a HW thread.
Signed-off-by: Cédric Le Goater
Message-Id: <20191125065820.927-17-...@kaod.org>
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/intc/xive.c| 21 +++--
From: Marc-André Lureau
Use int.from_bytes() from python 3.2 instead.
Signed-off-by: Marc-André Lureau
Message-Id: <20191127101038.327080-3-marcandre.lur...@redhat.com>
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
Signed-off-by: Cleber Rosa
---
scripts/analyze-migration.py |
From: Greg Kurz
This only makes sense with an emulated CPU. Don't set the bit in
CPUState::interrupt_request when using KVM to avoid confusions.
Signed-off-by: Greg Kurz
Message-Id: <157548863423.3650476.16424649423510075159.st...@bahia.lan>
Signed-off-by: David Gibson
---
target/ppc/helper_r
From: Cédric Le Goater
It is now unused.
Reviewed-by: Greg Kurz
Signed-off-by: Cédric Le Goater
Message-Id: <20191125065820.927-16-...@kaod.org>
Signed-off-by: David Gibson
---
hw/intc/pnv_xive.c| 13 -
hw/intc/spapr_xive.c | 8
hw/intc/xive.c| 7 ---
From: Cédric Le Goater
When doing CAM line compares, fetch the block id from the interrupt
controller which can have set the PC_TCTXT_CHIPID field.
Signed-off-by: Cédric Le Goater
Message-Id: <20191125065820.927-20-...@kaod.org>
Signed-off-by: David Gibson
---
hw/intc/pnv_xive.c| 6 +
From: Philippe Mathieu-Daudé
Now than we use the stable snapshot archive, we can remove this check.
This reverts commit d2499aca4bac613d837e2720e7bbe3378bc91245.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191126223810.20180-3-phi...@redhat.com>
Tested-by: Willian Rampazzo
Signed-off
From: Cédric Le Goater
The TIMA operations are performed on behalf of the XIVE IVPE sub-engine
(Presenter) on the thread interrupt context registers. The current
operations supported by the model are simple and do not require access
to the controller but more complex operations will need access t
spapr_ovec_diff(ov, old, new) has somewhat complex semantics. ov is set
to those bits which are in new but not old, and it returns as a boolean
whether or not there are any bits in old but not new.
It turns out that both callers only care about the second, not the first.
This is basically equival
From: Cédric Le Goater
Same a POWER9, only the MMIO window changes.
Signed-off-by: Cédric Le Goater
Message-Id: <20191205184454.10722-6-...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/pnv.c | 25 ++---
hw/ppc/pnv_lpc.c | 30 ++--
From: Greg Kurz
We add an extra node to advertise power management on some machines,
namely powernv9 and powernv10. This is achieved by using the
pnv_is_power9() and pnv_is_power10() helpers.
This can be achieved with QOM. Add a method to the base class for
powernv machines and have it implement
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
Message-Id: <20191125065820.927-6-...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/ppc.c | 9 +++--
include/hw/ppc/ppc.h | 1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
inde
From: Cédric Le Goater
The TIMA region gives access to the thread interrupt context registers
of a CPU. It is mapped at the same address on all chips and can be
accessed by any CPU of the system. To identify the chip from which the
access is being done, the PowerBUS uses a 'chip' field in the
loa
From: Cédric Le Goater
This is useful to dump the saved contexts of the vCPUs : configuration
of the base END index of the vCPU and the Interrupt Pending Buffer
register, which is updated when an interrupt can not be presented.
When dumping the NVT table, we skip empty indirect pages which are n
From: Greg Kurz
Since pnv_dt_xscom() is called from chip specific dt_populate() hooks,
it shouldn't have to guess the chip type in order to populate the
"compatible" property. Just pass the compat string and its size as
arguments.
Signed-off-by: Greg Kurz
Message-Id: <157623842430.360005.951396
PAPR allows the interrupt controller used on a POWER9 machine (XICS or
XIVE) to be selected by the guest operating system, by using the
ibm,client-architecture-support (CAS) feature negotiation call.
Currently, if the guest selects an interrupt controller different from the
one selected at initial
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