Can confirm this is still an issue with 4.1.0.
?field.comment=Can confirm this is still an issue with 4.1.0.
** Attachment added: "Files created on Windows and Debian"
https://bugs.launchpad.net/qemu/+bug/1759522/+attachment/5300530/+files/vhdx_comparison.7z
--
You received this bug notifi
Hi,
I've attached some example files to
https://bugs.launchpad.net/qemu/+bug/1759522 - the bug still exists in qemu
4.1.0.
Thanks,
Adam
Current trunk still displays the problem.
A git bisection between 4.0.0 and 4.1.0 revealed:
b6c246942b14d3e0dec46a6c5868ed84e7dbea19 is the first bad commit
commit b6c246942b14d3e0dec46a6c5868ed84e7dbea19
Author: Alberto Garcia
Date: Fri May 10 19:22:54 2019 +0300
qcow2: Define and use QC
Patchew URL: https://patchew.org/QEMU/20191026164546.30020-1-laur...@vivier.eu/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v15 00/11] hw/m68k: add Apple Machintosh Quadra 800 machine
Type: series
Message-id: 20191026164546.3
From: Stefan Hajnoczi
Implement the VIRTIO 1.0 virtio-pci interface. The main change here is
that the register layout is no longer a fixed layout in BAR 0. Instead
we have to iterate of PCI Capabilities to find descriptions of where
various registers are located. The vring registers are also m
From: Stefan Hajnoczi
The current libqos virtio-pci.c code implements the VIRTIO Legacy
interface. Extract existing code in preparation for VIRTIO 1.0 support.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Sergio Lopez
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <
From: Stefan Hajnoczi
The Legacy virtio-pci interface always uses BAR 0. VIRTIO 1.0 may need
to use a different BAR index, so make it configurable.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20191023100425.12168-15-stefa...@redhat
From: Stefan Hajnoczi
The VIRTIO 1.0 code will need to perform additional steps but it will
reuse the common virtqueue setup/cleanup code. Make these functions
public.
Make sure to invoke callbacks via QVirtioBus instead of directly calling
the virtio-pci Legacy versions of these functions.
Si
From: Stefan Hajnoczi
Device initialization has an extra step in VIRTIO 1.0. The FEATURES_OK
status bit is set to indicate that feature negotiation has completed.
The driver then reads the status register again to check that the device
agrees with the final features.
Implement this step as part
Hi,
here's the new version of the patches to add subcluster allocation
support to qcow2.
Please refer to the cover letter of the first version for a full
description of the patches:
https://lists.gnu.org/archive/html/qemu-block/2019-10/msg00983.html
This version includes a few tests, but I'm
Ideally it should be possible to zero individual subclusters using
this function, but this is currently not implemented.
Signed-off-by: Alberto Garcia
---
block/qcow2.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/block/qcow2.c b/block/qcow2.c
index 01322ca449..537569ce88 100644
---
This patch adds the following new fields to BDRVQcow2State:
- subclusters_per_cluster: Number of subclusters in a cluster
- subcluster_size: The size of each subcluster, in bytes
- subcluster_bits: No. of bits so 1 << subcluster_bits = subcluster_size
Images without subclusters are treated as if
In the previous patch we added a new QCow2ClusterType named
QCOW2_CLUSTER_UNALLOCATED_SUBCLUSTER. There is a couple of places
where this new value needs to be handled, and that is what this patch
does.
Signed-off-by: Alberto Garcia
---
block/qcow2.c | 13 +
1 file changed, 9 insertio
Public bug reported:
Creating a compressed image then running `qemu-img check <..>.qcow2' on
said image seems to report bogus corruption in some (but not all) cases:
Step 1.
# qemu-img info win7-base.qcow2
image: win7-base.qcow2
file format: qcow2
virtual size: 20 GiB (21474836480 bytes)
disk si
From: Stefan Hajnoczi
VIRTIO 1.0 PCI devices have multiple PCI_CAP_ID_VNDR capabilities so we
need a way to iterate over them. Extend qpci_find_capability() to take
the last address.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Thomas Huth
--
v3:
* Document qpci_find_capability()
Message-Id:
handle_alloc() creates a QCowL2Meta structure in order to update the
image metadata and perform the necessary copy-on-write operations.
This patch moves that code to a separate function so it can be used
from other places.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 76 +++
Extended L2 entries are 128-bit wide: 64 bits for the entry itself and
64 bits for the subcluster allocation bitmap.
In order to support them correctly get/set_l2_entry() need to be
updated so they take the entry width into account in order to
calculate the correct offset.
This patch also adds th
From: Stefan Hajnoczi
VIRTIO 1.0 uses little-endian for the vring. Legacy VIRTIO uses guest
endianness. Adjust the code to handle both.
Note that qvirtio_readq() is not defined because it has no users. All
the other accessors are really needed.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Th
On Fri, Oct 25, 2019 at 12:01:50PM +0200, Stefan Hajnoczi wrote:
> tests/vhost-user-fs-test.c needs fuse.h. The private copy that
> virtiofsd has can be replaced with a properly imported file using
> update-linux-headers.sh.
>
> TODO rerun update-linux-headers.sh with upstream kernel tree!
>
> S
The size of an L2 entry is 64 bits, but if we want to have subclusters
we need extended L2 entries. This means that we have to access L2
tables and slices differently depending on whether an image has
extended L2 entries or not.
This patch replaces all l2_slice[] accesses with calls to
get_l2_entr
Setting the QCOW_OFLAG_ZERO bit of the L2 entry is forbidden if an
image has subclusters. Instead, the individual 'all zeroes' bits must
be used.
Signed-off-by: Alberto Garcia
---
block/qcow2-refcount.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/block/qcow2-refc
qcow2 images with subclusters have 128-bit L2 entries. The first 64
bits contain the same information as traditional images and the last
64 bits form a bitmap with the status of each individual subcluster.
Because of that we cannot assume that L2 entries are sizeof(uint64_t)
anymore. This function
This function returns the type of an individual subcluster. If an
image does not have subclusters then this returns the exact same value
as qcow2_get_cluster_type().
The information in standard and extended L2 entries is encoded in a
slightly different way, but all existing QCow2ClusterType values
Two changes are needed in order to add subcluster support to this
function: deallocated clusters must have their bitmaps cleared, and
expanded clusters must have all the "subcluster allocated" bits set.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 2 ++
1 file changed, 2 insertions(
Subcluster allocation in qcow2 is implemented by extending the
existing L2 table entries and adding additional information to
indicate the allocation status of each subcluster.
This patch documents the changes to the qcow2 format and how they
affect the calculation of the L2 cache size.
Signed-of
This function will be used by the qcow2 code to check if an image has
subclusters or not.
At the moment this simply returns false. Once all patches needed for
subcluster support are ready then QEMU will be able to create and
read images with subclusters and this function will return the actual
val
The bdrv_co_pwrite_zeroes() call here fills complete clusters with
zeroes, but it can happen that some subclusters are not part of the
write request or the copy-on-write. This patch makes sure that only
the affected subclusters are overwritten.
A potential improvement would be to also fill with ze
For a given offset, return the subcluster number within its cluster
(i.e. with 32 subclusters per cluster it returns a number between 0
and 31).
Signed-off-by: Alberto Garcia
---
block/qcow2.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/block/qcow2.h b/block/qcow2.h
index 278ca41314
From: Stefan Hajnoczi
virtio_device_stop_ioeventfd() has not been used since commit
310837de6c1e0badfd736b1b316b1698c53120a7 ("virtio: introduce
grab/release_ioeventfd to fix vhost") in 2016.
Nowadays ioeventfd is stopped implicitly by the virtio transport when
lifecycle events such as the VM pa
From: Stefan Hajnoczi
The MSI-X vectors are programmed differently in the VIRTIO 1.0 and
Legacy interfaces. Introduce callbacks so different implementations can
be used depending on the interface version.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Sergio Lopez
Reviewed-by: Thomas Huth
Messa
From: Stefan Hajnoczi
Instead of just passing the vring page frame number, pass the full
QVirtQueue. This will allow the VIRTIO 1.0 transport to program the
fine-grained vring address registers in the future.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Sergio Lopez
Reviewed-by: Thomas Huth
R
On Wed 23 Oct 2019 12:39:14 PM CEST, Vladimir Sementsov-Ogievskiy wrote:
> Hi!
>
> This is very interesting! Could you please export a branch to look at,
> as patches can't be applied on master now :(
I just sent a new version with some updates and rebased on top of the
current master.
Berto
Now that the implementation of subclusters is complete we can finally
add the necessary options to create and read images with this feature,
which we call "extended L2 entries".
Signed-off-by: Alberto Garcia
---
block/qcow2.c| 46 ++
block/qcow2.h
Signed-off-by: Alberto Garcia
---
tests/qemu-iotests/271 | 235 +
tests/qemu-iotests/271.out | 183 +
tests/qemu-iotests/group | 1 +
3 files changed, 419 insertions(+)
create mode 100755 tests/qemu-iotests/271
create mode
When writing to a qcow2 file there are two functions that take a
virtual offset and return a host offset, possibly allocating new
clusters if necessary:
- handle_copied() looks for normal data clusters that are already
allocated and have a reference count of 1. In those clusters we
ca
We are going to need it in other places.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 34 +++---
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index 6c1dcdc781..aa1010a515 100644
--- a/block/
l2meta_cow_start() and l2meta_cow_end() are not necessarily
cluster-aligned if the image has subclusters, so update the
calculation of old_start and old_end to guarantee that no two requests
try to write on the same cluster.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 4 ++--
1 fil
Setting the QCOW_OFLAG_ZERO bit of the L2 entry is forbidden if an
image has subclusters. Instead, the individual 'all zeroes' bits must
be used.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/block/qcow
The logic of this function remains pretty much the same, except that
it uses count_contiguous_subclusters(), which combines the logic of
count_contiguous_clusters() / count_contiguous_clusters_unallocated()
and checks individual subclusters.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.
The L2 bitmap needs to be updated after each write to indicate what
new subclusters are now allocated.
This needs to happen even if the cluster was already allocated and the
L2 entry was otherwise valid.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 16
1 file chang
If an image has subclusters then there are more copy-on-write
scenarios that we need to consider. Let's say we have a write request
from the middle of subcluster #3 until the end of the cluster:
- If the cluster is new, then subclusters #0 to #3 from the old
cluster must be copied into the
Compressed clusters always have the bitmap part of the extended L2
entry set to 0.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index acb7226e03..3ba8a98073 100644
--- a/block/qcow2-clust
Traditional qcow2 images don't allow preallocation if a backing file
is set. This is because once a cluster is allocated there is no way to
tell that its data should be read from the backing file.
Extended L2 entries have individual allocation bits for each
subcluster, and therefore it is perfectl
Setting the QCOW_OFLAG_ZERO bit of the L2 entry is forbidden if an
image has subclusters. Instead, the individual 'all zeroes' bits must
be used.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/block/qcow2-cluster.c
From: Stefan Hajnoczi
In VIRTIO 1.0 feature bits changed from 32-bit to 64-bit. (In fact, the
transports allow even more feature bits but nothing uses more than 64
bits today.)
Add 64-bit feature bit support to virtio-mmio and virtio-pci. This will
be necessary for VIRTIO 1.0 support.
Signed-
From: Stefan Hajnoczi
There was no real virtio-mmio ABI change between Legacy and VIRTIO 1.0
except that the Version field was incremented from 1 to 2.
However, QEMU does not allow Legacy drivers to perform VIRTIO 1.0
operations like accessing 64-bit feature bits. Since we will introduce
64-bit
From: Stefan Hajnoczi
The VIRTIO Configuration Space cannot be accessed before device feature
bits have been read because a driver doesn't know the endianness until
it has checked VIRTIO_F_VERSION_1.
Fix this problem in preparation for VIRTIO 1.0 support.
Signed-off-by: Stefan Hajnoczi
Reviewe
From: Jason Wang
This patch implements basic support for the packed virtqueue. Compare
the split virtqueue which has three rings, packed virtqueue only have
one which is supposed to have better cache utilization and more
hardware friendly.
Please refer virtio specification for more information.
From: Jason Wang
Signed-off-by: Jason Wang
Signed-off-by: Eugenio Pérez
Reviewed-by: Jens Freimann
Message-Id: <20191025083527.30803-9-epere...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/virtio/virtio.h | 4 +++-
1 file changed, 3 insertions
From: Jason Wang
This patch implements event suppression through device/driver
area. Please refer virtio specification for more information.
Signed-off-by: Wei Xu
Signed-off-by: Jason Wang
Signed-off-by: Eugenio Pérez
Message-Id: <20191025083527.30803-7-epere...@redhat.com>
Reviewed-by: Micha
From: Wei Xu
There is slight size difference between split/packed rings.
This is the refactor of split ring as well as a helper to expanding
device and driver area size calculation for packed ring.
Signed-off-by: Wei Xu
Signed-off-by: Jason Wang
Signed-off-by: Eugenio Pérez
Reviewed-by: Jens
From: Jason Wang
Signed-off-by: Jason Wang
Signed-off-by: Eugenio Pérez
Reviewed-by: Jens Freimann
Message-Id: <20191025083527.30803-8-epere...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/net/vhost_net.c | 2 ++
1 file changed, 2 insertions(+)
diff
From: Eugenio Pérez
The function virtio_del_queue was not called at unrealize() callback.
This was detected due to add an allocated element on the vq introduce
in future commits (used_elems) and running address sanitizer memory
leak detector.
Signed-off-by: Eugenio Pérez
Message-Id: <201910250
The following changes since commit 58560ad254fbda71d4daa6622d71683190070ee2:
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' into
staging (2019-10-24 16:22:58 +0100)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_
From: Wei Xu
Define packed ring structure according to Qemu nomenclature,
field data(wrap counter, etc) are also included.
Signed-off-by: Wei Xu
Signed-off-by: Jason Wang
Signed-off-by: Eugenio Pérez
Reviewed-by: Jens Freimann
Message-Id: <20191025083527.30803-2-epere...@redhat.com>
Reviewed
From: Eugenio Pérez
The function virtio_del_queue was not called at unrealize() callback.
This was detected due to add an allocated element on the vq introduce
in future commits (used_elems) and running address sanitizer memory
leak detector.
Signed-off-by: Eugenio Pérez
Message-Id: <201910250
The PIIX3 is not tied to the i440FX and can even be used without it.
Move its creation to the machine code (pc_piix.c).
We have now removed the last trace of southbridge code in the i440FX
northbridge.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c
Extract the PIIX3 creation code from the i440fx_init() function.
Reviewed-by: Aleksandar Markovic
Reviewed-by: Esteban Bosse
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/piix.c | 51 --
1 file changed, 31 insertions(+), 20 deletions(-)
diff
From: Philippe Mathieu-Daudé
The RCR_IOPORT register belongs to the PIIX chipset.
Move the definition to "piix.h", and prepend the PIIX prefix.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
v2: prepend PIIX prefix (Aleksandar)
---
hw/i386/acpi-build.c | 2
From: Philippe Mathieu-Daudé
Move all the PIIX3 functions to a new file: hw/isa/piix3.c.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
Checkpatch warning:
ERROR: spaces required around that '*' (ctx:VxV)
#312: FILE: hw/isa/piix3.c:248:
+.subsections = (cons
The IRQ Route Control registers definitions belong to the PIIX
chipset. We were only defining the 'A' register. Define the other
B, C and D registers, and use them.
Acked-by: Paul Durrant
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/xen/xen-hvm.c |
The Malta board instantiate a PIIX4 chipset doing various
calls. Refactor all those related calls into a single
function: piix4_create().
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/mips_malta.c | 47 +++-
1 file cha
We will move this code, fix its style first.
Reviewed-by: Aleksandar Markovic
Reviewed-by: Esteban Bosse
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/piix.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 95b0412
From: Hervé Poussineau
Remove i8254 instanciated in malta board, to not have it twice.
Acked-by: Michael S. Tsirkin
Acked-by: Paolo Bonzini
Signed-off-by: Hervé Poussineau
Message-Id: <20171216090228.28505-10-hpous...@reactos.org>
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Math
From: Philippe Mathieu-Daudé
Remove mc146818rtc instanciated in malta board, to not have it twice.
Acked-by: Michael S. Tsirkin
Acked-by: Paolo Bonzini
Signed-off-by: Hervé Poussineau
Message-Id: <20171216090228.28505-13-hpous...@reactos.org>
[PMD: rebased, set RTC base_year to 2000]
Reviewed
From: Philippe Mathieu-Daudé
The hw/pci-host/piix.c contains a mix of PIIX3 and i440FX chipsets
functions. To be able to split it, we need to export some
declarations first.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 1 +
hw/acpi
From: Philippe Mathieu-Daudé
We moved all the PIIX3 southbridge code out of hw/pci-host/piix.c,
it now only contains i440FX northbridge code.
Rename it to match the chipset modelled.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS |
From: Hervé Poussineau
Add ISA irqs as piix4 gpio in, and CPU interrupt request as piix4 gpio out.
Remove i8259 instanciated in malta board, to not have it twice.
We can also remove the now unused piix4_init() function.
Acked-by: Michael S. Tsirkin
Acked-by: Paolo Bonzini
Signed-off-by: Hervé
From: Hervé Poussineau
The i8257 is not a chipset on the Malta board, but is part of
the PIIX4 chipset.
Create the i8257 in the PIIX4 code, remove the one instantiated
in malta board, to not have it twice.
Acked-by: Michael S. Tsirkin
Acked-by: Paolo Bonzini
Signed-off-by: Hervé Poussineau
Me
These devices implemented their load_state_old() handler 10 years
ago, previous to QEMU v0.12.
Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines,
we can drop this code.
Note: the mips_r4k machine started to use the i8254 device just
after QEMU v0.5.0, but the MIPS machine types are
In the next commit we'll refactor the PIIX4 code out of
mips_malta_init(). As a preliminary step, add the 'ide_drives'
variable and create the drive array dynamically.
Reviewed-by: Aleksandar Markovic
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/mips_malta.c | 7
From: Hervé Poussineau
The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset.
Acked-by: Michael S. Tsirkin
Acked-by: Paolo Bonzini
Signed-off-by: Hervé Poussineau
Message-Id: <20171216090228.28505-7-hpous...@reactos.org>
Reviewed-by: Aleksandar Markovic
Reviewed-by: Li Qi
From: Hervé Poussineau
Other piix4 parts are already named piix4-ide and piix4-usb-uhci.
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Michael S. Tsirkin
Acked-by: Paolo Bonzini
Signed-off-by: Hervé Poussineau
Message-Id: <20171216090228.28505-15-hpous...@reactos.org>
Reviewed-by: Aleksandar
From: Philippe Mathieu-Daudé
Now that we properly refactored the piix4_create() function, let's
move it to hw/isa/piix4.c where it belongs, so it can be reused
on other places.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/piix4.c| 30 ++
Changes since v2 [0]:
- Use a #define
- Reword one description
- Added review tags (thanks all for reviewing!)
Changes since v1 [1]:
- Removed patch reintroducing DO_UPCAST() use (thuth)
- Took various patches out to reduce series (thuth)
- Added review tags (thanks all for reviewing!)
$ git back
From: Philippe Mathieu-Daudé
This function isn't used anymore.
This reverts commit 22ec3283efba9ba0792790da786d6776d83f2a92.
Reviewed-by: Thomas Huth
Reviewed-by: Li Qiang
Reviewed-by: Esteban Bosse
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/irq.c| 14 --
include/hw/
From: Philippe Mathieu-Daudé
The PIIX4 Southbridge is not used by the PC machine,
but by the Malta board (MIPS). Add a new section to
keep it covered.
Suggested-by: Michael S. Tsirkin
Reviewed-by: Aleksandar Markovic
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINER
Hi Mark,
On Sat, Oct 26, 2019 at 10:35:20AM +0100, Mark Cave-Ayland wrote:
> > However, the VRAM in Artist is not really exposed to the Host. Instead,
> > there's the Chipset inbetween that can do byte swapping (Colormap is LE,
> > VRAM is BE) and Bit-to-Byte/Word/Dword conversion. For example yo
26.10.2019 20:37, Nir Soffer wrote:
> On Fri, Oct 25, 2019 at 1:11 PM Max Reitz wrote:
>>
>> Hi,
>>
>> It seems to me that there is a bug in Linux’s XFS kernel driver, as
>> I’ve explained here:
>>
>> https://lists.nongnu.org/archive/html/qemu-block/2019-10/msg01429.html
>>
>> In combination with
On Fri, Oct 25, 2019 at 1:11 PM Max Reitz wrote:
>
> Hi,
>
> It seems to me that there is a bug in Linux’s XFS kernel driver, as
> I’ve explained here:
>
> https://lists.nongnu.org/archive/html/qemu-block/2019-10/msg01429.html
>
> In combination with our commit c8bb23cbdbe32f, this may lead to gue
On Fri, Oct 25, 2019 at 1:24 PM Max Reitz wrote:
>
> The XFS kernel driver has a bug that may cause data corruption for qcow2
> images as of qemu commit c8bb23cbdbe32f. We can work around it by
> treating post-EOF fallocates as serializing up until infinity (INT64_MAX
> in practice).
>
> Signed-o
On Fri, Oct 25, 2019 at 1:22 PM Max Reitz wrote:
>
> We will need this for the next patch.
>
> Signed-off-by: Max Reitz
> ---
> block/file-posix.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/block/file-posix.c b/block/file-posix.c
> index 695fcf740d..5cd54c8bff 1
On 10/26/19 6:45 PM, Laurent Vivier wrote:
This will be needed to implement pseudo-DMA
Signed-off-by: Laurent Vivier
:)
Reviewed-by: Philippe Mathieu-Daudé
---
hw/scsi/esp.c | 46 +-
1 file changed, 29 insertions(+), 17 deletions(-)
diff --g
Let's add bitmaps persistence qcow2 feature and postcopy bitmaps
migration to Dirty Bitmaps section.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 556ce0bfe3..51f31b4011 100644
--- a/MAINTAINERS
+
26.10.2019 12:19, Tuguoyi wrote:
> In check_constraints_on_bitmap(), the sanity check on the
> granularity will cause uint64_t integer left-shift overflow
> when cluster_size is 2M and the granularity is bigger than
> 32K which is even smaller than the default value for a qcow2
> disk with cluster_
26.10.2019 14:29, Philippe Mathieu-Daudé wrote:
> On 10/26/19 12:12 PM, Vladimir Sementsov-Ogievskiy wrote:
>> Make it obvious, from the two values which is found at path and which
>> is expected.
>
> Maybe:
>
> "From the two values compared, make it obvious which is found at path, and
> which i
Le 25/10/2019 à 16:01, Paolo Bonzini a écrit :
> On 22/10/19 13:17, Laurent Vivier wrote:
>> +if (s->dma_memory_read) {
>> +s->dma_memory_read(s->dma_opaque, &s->cmdbuf[s->cmdlen], len);
>> +} else {
>> +set_pdma(s, CMD, s->cmdlen, len);
>> +s->pd
This patch adds basic support for the NuBus bus. This is used by 680x0
Macintosh.
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
Reviewed-by: Thomas Huth
---
include/hw/nubus/mac-nubus-bridge.h | 24
include/hw/nubus/nubus.h|
Inside the 680x0 Macintosh, VIA (Versatile Interface Adapter) is used
to interface the keyboard, Mouse, and real-time clock. It also provides
control line for the floppy disk driver, video interface, sound circuitry
and serial interface.
This implementation is based on the MOS6522 object.
Co-deve
SWIM (Sander-Wozniak Integrated Machine) is the floppy controller of
the 680x0 Macintosh.
This patch introduces only the basic support: it allows to switch from
IWM (Integrated WOZ Machine) mode to the SWIM mode and makes the linux
driver happy.
It cannot read any floppy image.
Co-developed-by:
There is no DMA in Quadra 800, so the CPU reads/writes the data from the
PDMA register (offset 0x100, ESP_PDMA in hw/m68k/q800.c) and copies them
to/from the memory.
There is a nice assembly loop in the kernel to do that, see
linux/drivers/scsi/mac_esp.c:MAC_ESP_PDMA_LOOP().
The start of the tran
If you want to test the machine, it doesn't yet boot a MacROM, but you can
boot a linux kernel from the command line.
You can install your own disk using debian-installer with:
./qemu-system-m68k \
-M q800 \
-serial none -serial mon:stdio \
-m 1000M -drive file=m68k.qcow2,format=q
From: Philippe Mathieu-Daudé
This test boots a Linux kernel on a Quadra 800 board
and verify the serial is working.
Example:
$ avocado --show=app,console run -t machine:q800
tests/acceptance/boot_linux_console.py
console: ABCFGHIJK
console: Linux version 5.2.0-2-m68k (debian-ker...@lists
This patch adds support for a graphic framebuffer device.
This device can be added as a sysbus device or as a NuBus device.
It is accessed as a framebuffer but the color palette can be set.
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
Reviewed
VIA needs to be able to poll the ADB interface and to read/write data
from/to the bus.
This patch adds functions allowing that.
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
Reviewed-by: Hervé Poussineau
Reviewed-by: Thomas Huth
---
include/
This is needed by Quadra 800, this card can run on little-endian
or big-endian bus.
Signed-off-by: Laurent Vivier
Tested-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Hervé Poussineau
---
hw/net/dp8393x.c | 88 +++-
1 file ch
To prepare following patches move do_cmd and DMA special case
from handle_ti() to esp_do_dma().
This part of the code must be only executed with real DMA, not with
pseudo-DMA. And PDMA is detected in esp_do_dma(), so move this part
of the code in esp_do_dma(). We keep the code in handle_ti_cmd()
i
This will be needed to implement pseudo-DMA
Signed-off-by: Laurent Vivier
---
hw/scsi/esp.c | 46 +-
1 file changed, 29 insertions(+), 17 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 09b28cba17..0230ede21d 100644
--- a/hw/scsi/esp.c
+
I'm rebasing some of these patches for seven years now,
too many years...
if you want to test the machine, I'm sorry, it doesn't boot
a MacROM, but you can boot a linux kernel from the command line.
You can install your own disk using debian-installer, with:
...
-M q800 \
-serial non
Le 22/10/2019 à 14:21, Philippe Mathieu-Daudé a écrit :
> Hi Laurent,
>
> On 10/22/19 1:17 PM, Laurent Vivier wrote:
>> There is no DMA in Quadra 800, so the CPU reads/writes the data from the
>> PDMA register (offset 0x100, ESP_PDMA in hw/m68k/q800.c) and copies them
>> to/from the memory.
>>
>>
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