Re: [Qemu-devel] [PATCH v4 00/54] plugins for TCG

Alex Bennée writes: > Hi, > > This is the latest iteration of the plugins series. The main changes > from the last version are: > > - dropped passing of haddr to plugins > > This makes the code for handling the plugins less invasive in the > softmmu path at the cost of offloading processing to

[Qemu-devel] [PATCH v2] spapr: quantify error messages regarding capability settings

Its not immediately obvious how cap-X=Y setting need to be applied to the command line so, for spapr capability error messages, this has been clarified to: ..[try] appending -machine cap-X=Y The wrong value messages have been left as is, as the user has found the right location. Signed-off-by:

[Qemu-devel] [Bug 1838569] Re: virtio-balloon change breaks post 4.0 upgrade

** Description changed: - We upgraded the libvirt UCA packages from 3.6 to 4.0 as part of a queens upgrade and noticed that + We upgraded the libvirt UCA packages from 3.6 to 4.0 and qemu 2.10 to 2.11 as part of a queens upgrade and noticed that virtio-ballon is broken when instances live mig

Re: [Qemu-devel] [PATCH] migration: always initial RAMBlock.bmap to 1 for new migration

Thanks, I didn't notice this case. On Sun, Jul 14, 2019 at 10:51:19PM +0800, Ivan Ren wrote: >Reproduce the problem: >migrate >migrate_cancel >migrate > >Error happen for memory migration > >The reason as follows: >1. qemu start, ram_list.dirty_memory[DIRTY_MEMORY_MIGRATION] all set to > 1 by a

Re: [Qemu-devel] [PATCH] spapr: quantify error messages regarding capability settings

On Thu, Aug 01, 2019 at 09:34:38AM +1000, Daniel Black wrote: > Its not immediately obvious how cap-X=y setting need to be applied > to the command line so this has been clarified to "appending to the > machine name" in spapr capability error messages. > > The wrong value messages have been left a

Re: [Qemu-devel] [PATCH v2] x86: Intel AVX512_BF16 feature enabling

Hi, Looking forward to your comments. :) Thanks! Jing On 7/25/2019 2:14 PM, Jing Liu wrote: Intel CooperLake cpu adds AVX512_BF16 instruction, defining as CPUID.(EAX=7,ECX=1):EAX[bit 05]. The patch adds a property for setting the subleaf of CPUID leaf 7 in case that people would like to speci

Re: [Qemu-devel] [PATCH] migration: always initial ram_counters for a new migration

On Tue, Jul 30, 2019 at 01:36:32PM +0800, Ivan Ren wrote: >From: Ivan Ren > >This patch fix a multifd migration bug in migration speed calculation, this >problem can be reproduced as follows: >1. start a vm and give a heavy memory write stress to prevent the vm be > successfully migrated to dest

Re: [Qemu-devel] [PATCH] riscv: rv32: Root page table address can be larger than 32-bit

Hi Richard, On Thu, Aug 1, 2019 at 1:35 AM Richard Henderson wrote: > > On 7/31/19 5:45 AM, Bin Meng wrote: > > -target_ulong base; > > +hwaddr base; > ... > > -target_ulong pte_addr = base + idx * ptesize; > > +hwaddr pte_addr = base + idx * ptesize; > > I believe that yo

Re: [Qemu-devel] [PATCH] numa: numa nodeid need not be sequential

On 7/31/2019 5:17 PM, Daniel Black wrote: On Wed, 31 Jul 2019 18:40:33 +1000 Daniel Black wrote: Replace all nodeid assumptions with lookups in the numa_info array Tao Xu, Sorry, only just noticed your patches of the move of numa_info and other elements into MachineState. I approve of it.

[Qemu-devel] [PATCH v2] docs/nvdimm: add example on persistent backend setup

Persistent backend setup requires some knowledge about nvdimm and ndctl tool. Some users report they may struggle to gather these knowledge and have difficulty to setup it properly. Here we provide two examples for persistent backend and gives the link to ndctl. By doing so, user could try it dire

Re: [Qemu-devel] [PATCH] docs/nvdimm: add example on persistent backend setup

On Tue, Jul 30, 2019 at 07:03:45AM +0100, Stefan Hajnoczi wrote: >On Tue, Jul 30, 2019 at 1:52 AM Wei Yang wrote: >> >> Hi, Stefan >> >> Thanks for your comments :-) >> >> On Mon, Jul 29, 2019 at 02:58:59PM +0100, Stefan Hajnoczi wrote: >> >On Wed, Jul 24, 2019 at 03:03:07PM +0800, Wei Yang wrote:

Re: [Qemu-devel] [RFC] virtio-mmio: implement modern (v2) personality (virtio-1)

On 30/07/19 18:06, Laszlo Ersek wrote: > On 07/29/19 14:57, Sergio Lopez wrote: >> Implement the modern (v2) personality, according to the VirtIO 1.0 >> specification. >> >> Support for v2 among guests is not as widespread as it'd be >> desirable. While the Linux driver has had it for a while, supp

[Qemu-devel] [PATCH] spapr: quantify error messages regarding capability settings

Its not immediately obvious how cap-X=y setting need to be applied to the command line so this has been clarified to "appending to the machine name" in spapr capability error messages. The wrong value messages have been left as is, as the user has found the right location. Signed-off-by: Daniel B

Re: [Qemu-devel] [PATCH for-4.2 v10 11/15] virtio-iommu: Expose the IOAPIC MSI reserved region when relevant

> From: Auger Eric [mailto:eric.au...@redhat.com] > Sent: Thursday, August 1, 2019 3:45 AM > > Hi Michael, > > On 7/31/19 9:25 PM, Michael S. Tsirkin wrote: > > On Tue, Jul 30, 2019 at 11:20:44PM +, Tian, Kevin wrote: > >>> From: Michael S. Tsirkin [mailto:m...@redhat.com] > >>> Sent: Wednesd

[Qemu-devel] [RFC PATCH 1/5] hw/boards: Add sockets in CpuTopology structure

Add sockets in CpuTopology. This is required when building the CPU topology. Signed-off-by: Babu Moger --- hw/core/machine.c | 1 + hw/i386/pc.c| 1 + include/hw/boards.h | 2 ++ vl.c| 1 + 4 files changed, 5 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machi

[Qemu-devel] [RFC PATCH 5/5] i386: Fix pkg_id offset EPYC

Per Processor Programming Reference (PPR) for AMD Family 17h Models, the pkg_id offset in apicid is 6. Fix the offset based on EPYC models. Signed-off-by: Babu Moger --- target/i386/cpu.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.c b/targe

[Qemu-devel] [RFC PATCH 3/5] i386: Use topology functions from topology.h

Use the functions defined in topology.h and remove the old code. Signed-off-by: Babu Moger --- target/i386/cpu.c | 146 +- 1 file changed, 27 insertions(+), 119 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 19751e37a7..be458306

[Qemu-devel] [RFC PATCH 2/5] hw/i386: Add AMD EPYC topology encoding

Currently, the apicid is a sequential number in x86 cpu models. This works fine for most of the cases. But, in certain cases this will result into cpu topology inconsistency. This problem was observed in AMD EPYC cpu models. To address that we need to build apicid as per the hardware specification

[Qemu-devel] [RFC PATCH 0/5] APIC ID fixes for AMD EPYC CPU models

These series fixes the problems encoding APIC ID for AMD EPYC cpu models. https://bugzilla.redhat.com/show_bug.cgi?id=1728166 This is the first pass to give an idea of the changes required to address the issue. Please feel free to comment. Currently, apic id is decoded based on sockets/dies/cores

[Qemu-devel] [RFC PATCH 4/5] hw/i386: Generate apicid based on cpu_type

Check the cpu_type before calling the apicid functions from topology.h. Signed-off-by: Babu Moger --- hw/i386/pc.c | 81 +--- 1 file changed, 70 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ef39463fd5..dad55c940f 1

Re: [Qemu-devel] [RFC PATCH v1 06/22] target/i386: introduce gen_gvec_ld_modrm_* helpers

On 7/31/19 10:56 AM, Jan Bobek wrote: > +static inline void gen_gvec_ld_modrm_2(CPUX86State *env, DisasContext *s, > + int modrm, unsigned vece, > + uint32_t oprsz, uint32_t maxsz, > +

[Qemu-devel] [Bug 1838569] [NEW] virtio-balloon change breaks post 4.0 upgrade

Public bug reported: We upgraded the libvirt UCA packages from 3.6 to 4.0 as part of a queens upgrade and noticed that virtio-ballon is broken when instances live migrate (started with a prior 3.6 version) with: 2019-07-24T06:46:49.487109Z qemu-system-x86_64: warning: Unknown firmware file i

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

On 7/31/19 1:09 PM, Aleksandar Markovic wrote: > > > On Wed, Jul 31, 2019 at 9:51 PM Richard Henderson > > wrote: > > On 7/31/19 10:57 AM, Jan Bobek wrote: > > +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs, > > +               

Re: [Qemu-devel] [RFC] virtio-mmio: implement modern (v2) personality (virtio-1)

On Wed, Jul 31, 2019 at 02:22:09PM +0200, Sergio Lopez wrote: > > Michael S. Tsirkin writes: > > > On Mon, Jul 29, 2019 at 02:57:55PM +0200, Sergio Lopez wrote: > >> Implement the modern (v2) personality, according to the VirtIO 1.0 > >> specification. > >> > >> Support for v2 among guests is n

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

On 7/31/19 1:27 PM, Aleksandar Markovic wrote: > > > On Wed, Jul 31, 2019 at 9:36 PM Richard Henderson > > wrote: > > On 7/31/19 10:56 AM, Jan Bobek wrote: > > +#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), > (modrm), M

Re: [Qemu-devel] [PATCH] ehci: Ensure that device is not NULL before calling usb_ep_get

On Wed, Jul 31, 2019 at 01:08:50PM +0200, Philippe Mathieu-Daudé wrote: > On 7/30/19 7:45 PM, Guenter Roeck wrote: > > The following assert is seen once in a while while resetting the > > Linux kernel. > > > > qemu-system-x86_64: hw/usb/core.c:734: usb_ep_get: > > Assertion `dev != NULL' faile

[Qemu-devel] [PATCH 3/3] iotests/118: Add -blockdev based tests

The code path for -device drive= or without a drive=... option for empty drives, which is supposed to be used with -blockdev differs enough from the -drive based path with a user-owned BlockBackend, so we want to test both paths at least for the basic tests implemented by TestInitiallyFilled and Te

[Qemu-devel] [PATCH 2/3] iotests/118: Create test classes dynamically

We're getting a ridiculous number of child classes of TestInitiallyFilled and TestInitiallyEmpty that differ only in a few attributes that we want to test in all combinations. Instead of explicitly writing down every combination, let's use a loop and create those classes dynamically. Signed-off-b

[Qemu-devel] [PATCH v2 32/32] target/arm: generate a custom MIDR for -cpu max

From: Alex Bennée While most features are now detected by probing the ID_* registers kernels can (and do) use MIDR_EL1 for working out of they have to apply errata. This can trip up warnings in the kernel as it tries to work out if it should apply workarounds to features that don't actually exist

[Qemu-devel] [PATCH v2 26/32] target/arm: Flush tlbs for E2&0 translation regime

Signed-off-by: Richard Henderson --- target/arm/helper.c | 31 --- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 30f93f4792..b9f0d387f4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3917,

[Qemu-devel] [PATCH v2 31/32] target/arm: check TGE and E2H flags for EL0 pauth traps

From: Alex Bennée According to ARM ARM we should only trap from EL0 when TCG or E2H are 0. Signed-off-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/pauth_helper.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/arm/pauth_helper.c b/target/arm/pa

[Qemu-devel] [PATCH 0/3] iotests: More media change tests

This series is motivated by the bug fixed in commit 7cef3d1290 ('scsi-cd: Fix inserting read-only media in empty drive'). After the series is applied, media change is tested for all combinations of floppy/ide-cd/scsi-cd with -drive/-blockdev and initially empty drive/inserted media. Kevin Wolf (3)

[Qemu-devel] [PATCH v2 30/32] target/arm: Enable ARMv8.1-VHE in -cpu max

Signed-off-by: Richard Henderson --- target/arm/cpu64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1901997a06..b1bb394c6d 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -337,6 +337,7 @@ static void aarch64_max_initfn(Object *obj)

[Qemu-devel] [PATCH v2 24/32] target/arm: Update arm_sctlr for VHE

Use this function in many more places in order to select the correct control. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/cpu.h | 10 ++ target/arm/arch_dump.c| 2 +- target/arm/helper-a64.c | 2 +- target/arm/helper.c | 10 +-

qemu-devel@nongnu.org

Signed-off-by: Richard Henderson --- target/arm/helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index c6b40a12b4..15a054a141 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8894,6 +8894,7 @@ static inline bool regime_is_user(CP

[Qemu-devel] [PATCH v2 23/32] target/arm: Update arm_mmu_idx for VHE

This covers initial generation in arm_mmu_idx, and reconstruction in core_to_arm_mmu_idx. As a conseqeuence, we also need a bit in TBFLAGS in order to make the latter reliable. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/cpu.h| 2 ++ target/arm/helper.c | 42 +

[Qemu-devel] [PATCH v2 21/32] target/arm: Reorganize ARMMMUIdx

Prepare for, but do not yet implement, the EL2&0 regime and the Secure EL2 regime. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 173 - target/arm/internals.h | 44 +-- target/arm/helper.c| 60 -- target/arm/m_help

[Qemu-devel] [PATCH v2 29/32] target/arm: Update {fp, sve}_exception_el for VHE

When TGE+E2H are both set, CPACR_EL1 is ignored. Signed-off-by: Richard Henderson --- target/arm/helper.c | 53 - 1 file changed, 28 insertions(+), 25 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 15a054a141..b29717edb6 100

[Qemu-devel] [PATCH 1/3] iotests/118: Test media change for scsi-cd

The test covered only floppy and ide-cd. Add scsi-cd as well. Signed-off-by: Kevin Wolf --- tests/qemu-iotests/118 | 20 tests/qemu-iotests/118.out | 4 ++-- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/tests/qemu-iotests/118 b/tests/qemu-iotests/118

[Qemu-devel] [PATCH v2 18/32] target/arm: Rename ARMMMUIdx_S1SE* to ARMMMUIdx_SE*

This is part of a reorganization to the set of mmu_idx. The Secure regimes all have a single stage translation; there is no point in pointing out that the idx is for stage1. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 8 target/arm/internals.h | 4 ++-- targe

[Qemu-devel] [PATCH v2 14/32] target/arm: Simplify tlb_force_broadcast alternatives

Rather than call to a separate function and re-compute any parameters for the flush, simply use the correct flush function directly. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 52 + 1 file changed, 24 insertion

[Qemu-devel] [PATCH v2 20/32] target/arm: Rename ARMMMUIdx_S1E2 to ARMMMUIdx_E2

This is part of a reorganization to the set of mmu_idx. The non-secure EL2 regime only has a single stage translation; there is no point in pointing out that the idx is for stage1. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 4 ++-- target/arm/internals.h | 2 +- target/arm/h

[Qemu-devel] [PATCH v2 27/32] target/arm: Update arm_phys_excp_target_el for TGE

The TGE bit routes all asynchronous exceptions to EL2. Signed-off-by: Richard Henderson --- target/arm/helper.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index b9f0d387f4..c6b40a12b4 100644 --- a/target/arm/helper.c +++ b/target/arm/helpe

[Qemu-devel] [PATCH v2 13/32] target/arm: Split out vae1_tlbmask, vmalle1_tlbmask

No functional change, but unify code sequences. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 118 ++-- 1 file changed, 37 insertions(+), 81 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index e

[Qemu-devel] [PATCH v2 16/32] target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2

The EL1&0 regime is the only one that uses 2-stage translation. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 4 +-- target/arm/internals.h | 2 +- target/arm/helper.c| 54 +++--- target/arm/translate-a64.c | 2 +- target/arm/tra

[Qemu-devel] [PATCH v2 19/32] target/arm: Rename ARMMMUIdx*_S1E3 to ARMMMUIdx*_SE3

This is part of a reorganization to the set of mmu_idx. The EL3 regime only has a single stage translation, and is always secure. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 4 ++-- target/arm/internals.h | 2 +- target/arm/helper.c| 18 +- target/arm/tran

[Qemu-devel] [PATCH v2 25/32] target/arm: Install asids for E2&0 translation regime

When clearing HCR_E2H, this involves re-installing the EL1&0 asid. Signed-off-by: Richard Henderson --- target/arm/helper.c | 38 ++ 1 file changed, 34 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 2883d6e568..30f9

[Qemu-devel] [PATCH v2 12/32] target/arm: Add VHE system register redirection and aliasing

Several of the EL1/0 registers are redirected to the EL2 version when in EL2 and HCR_EL2.E2H is set. Many of these registers have side effects. Link together the two ARMCPRegInfo structures after they have been properly instantiated. Install common dispatch routines to all of the relevant registe

[Qemu-devel] [PATCH v2 15/32] target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_*

This is part of a reorganization to the set of mmu_idx. This emphasizes that they apply to the EL1&0 regime. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 8 +++ target/arm/internals.h | 4 ++-- target/arm/helper.c| 44 +++---

[Qemu-devel] [PATCH v2 17/32] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*

This is part of a reorganization to the set of mmu_idx. The EL1&0 regime is the only one that uses 2-stage translation. Spelling out Stage avoids confusion with Secure. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 4 ++-- target/arm/internals.h | 6 +++--- target/arm/helper.c

[Qemu-devel] [PATCH v2 22/32] target/arm: Add regime_has_2_ranges

Signed-off-by: Richard Henderson --- target/arm/internals.h | 16 target/arm/helper.c| 22 +- target/arm/translate-a64.c | 3 +-- 3 files changed, 22 insertions(+), 19 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h inde

[Qemu-devel] [PATCH v2 11/32] target/arm: Add the hypervisor virtual counter

Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/cpu-qom.h | 1 + target/arm/cpu.h | 11 + target/arm/cpu.c | 2 ++ target/arm/helper.c | 57 4 files changed, 66 insertions(+), 5 deletions(-) diff --git a/ta

[Qemu-devel] [PATCH v2 08/32] target/arm: Add CONTEXTIDR_EL2

Not all of the breakpoint types are supported, but those that only examine contextidr are extended to support the new register. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 50 +-- target/arm/helper.c | 11 ++

[Qemu-devel] [PATCH v2 10/32] target/arm: Update CNTVCT_EL0 for VHE

The virtual offset may be 0 depending on EL, E2H and TGE. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 40 +--- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c ind

[Qemu-devel] [PATCH v2 09/32] target/arm: Add TTBR1_EL2

At the same time, add writefn to TTBR0_EL2 and TCR_EL2. A later patch will update any ASID therein. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/target/arm/helper.c b/tar

[Qemu-devel] [PATCH v2 07/32] target/arm: Enable HCR_E2H for VHE

Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/cpu.h| 7 --- target/arm/helper.c | 6 +- 2 files changed, 5 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e6a76d14c6..e37008a4f7 100644 --- a/target/arm/cpu.h +++ b/targe

[Qemu-devel] [PATCH v2 06/32] target/arm: Define isar_feature_aa64_vh

Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/cpu.h | 5 + 1 file changed, 5 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 94c990cddb..e6a76d14c6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3573,6 +3573,11 @@ static inline bool

[Qemu-devel] [PATCH v2 05/32] target/arm: Install ASIDs for EL2

The VMID is the ASID for the 2nd stage page lookup. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 26 -- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index c0dc76ed41..65e3

[Qemu-devel] [PATCH v2 04/32] target/arm: Install ASIDs for short-form from EL1

This is less complex than the LPAE case, but still we now avoid the flush in case it is only the PROCID field that is changing. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 34 -- 1 file changed, 24 insertions(+), 10 deletio

[Qemu-devel] [PATCH v2 01/32] cputlb: Add tlb_set_asid_for_mmuidx

Although we can't do much with ASIDs except remember them, this will allow cleanups within target/ that should make things clearer. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- v2: Assert cpu_is_self; only flush idx w/ asid mismatch. v3: Improve asid comment. --- include/exec/c

[Qemu-devel] [PATCH v2 02/32] cputlb: Add tlb_flush_asid_by_mmuidx and friends

Since we have remembered ASIDs, we can further minimize flushing by comparing against the one we want to flush. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 16 include/qom/cpu.h | 2 ++ accel/tcg/cputlb.c | 55

[Qemu-devel] [PATCH v2 03/32] target/arm: Install ASIDs for long-form from EL1

In addition to providing the core with the current ASID, this minimizes both the number of flushes due to non-changing ASID as well as the set of mmu_idx that are affected by each flush. In particular, updates to the secure mode registers flushes only the relevant secure mode mmu_idx's, and simila

[Qemu-devel] [PATCH v2 00/32] target/arm: Implement ARMv8.1-VHE

About half of this patch set is cleanup of the qemu tlb handling leading up to the actual implementation of VHE, and the biggest piece of that: The EL2&0 translation regime. Changes since v1: * Merge feedback from AJB. * Split out 7 renaming patches from "Reorganize ARMMMUIdx". * Alex's MIDR

Re: [Qemu-devel] [PATCH v5 2/5] 9p: Treat multiple devices on one export as an error

On Wed, 3 Jul 2019 13:01:34 +0200 Christian Schoenebeck via Qemu-devel wrote: > The QID path should uniquely identify a file. However, the > inode of a file is currently used as the QID path, which > on its own only uniquely identifies files within a device. > Here we track the device hosting the

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

On Wed, Jul 31, 2019 at 9:36 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 7/31/19 10:56 AM, Jan Bobek wrote: > > +#define gen_pand_mm(env, s, modrm) gen_gvec_ld_modrm_mm ((env), (s), > (modrm), MO_64, tcg_gen_gvec_and, 0112) > > +#define gen_pand_xmm(env, s, modrm) gen_gvec

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

On Wed, Jul 31, 2019 at 9:51 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 7/31/19 10:57 AM, Jan Bobek wrote: > > +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs, > > + uint32_t aofs, uint32_t bofs, > > +

Re: [Qemu-devel] [RFC PATCH v1 03/22] target/i386: Use prefix, aflag and dflag from DisasContext

On Wed, Jul 31, 2019 at 9:41 PM Aleksandar Markovic < aleksandar.m.m...@gmail.com> wrote: > > > On Wed, Jul 31, 2019 at 7:59 PM Jan Bobek wrote: > >> From: Richard Henderson >> >> The variables are already there, we just have to hide the ones >> in disas_insn so that we are forced to use them. >

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

On 7/31/19 10:57 AM, Jan Bobek wrote: > +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs, > + uint32_t aofs, uint32_t bofs, > + uint32_t oprsz, uint32_t maxsz) > +{ > +tcg_gen_gvec_cmp(TCG_COND_EQ, vece, dofs, aofs

Re: [Qemu-devel] [PATCH for-4.2 v10 11/15] virtio-iommu: Expose the IOAPIC MSI reserved region when relevant

Hi Michael, On 7/31/19 9:25 PM, Michael S. Tsirkin wrote: > On Tue, Jul 30, 2019 at 11:20:44PM +, Tian, Kevin wrote: >>> From: Michael S. Tsirkin [mailto:m...@redhat.com] >>> Sent: Wednesday, July 31, 2019 3:38 AM >>> >>> On Tue, Jul 30, 2019 at 07:21:33PM +0200, Eric Auger wrote: We intr

Re: [Qemu-devel] [RFC PATCH v1 03/22] target/i386: Use prefix, aflag and dflag from DisasContext

On Wed, Jul 31, 2019 at 7:59 PM Jan Bobek wrote: > From: Richard Henderson > > The variables are already there, we just have to hide the ones > in disas_insn so that we are forced to use them. > > Signed-off-by: Richard Henderson > --- > target/i386/translate.c | 299 --

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

On 7/31/19 10:56 AM, Jan Bobek wrote: > +#define gen_pand_mm(env, s, modrm) gen_gvec_ld_modrm_mm ((env), (s), > (modrm), MO_64, tcg_gen_gvec_and, 0112) > +#define gen_pand_xmm(env, s, modrm) gen_gvec_ld_modrm_xmm ((env), (s), > (modrm), MO_64, tcg_gen_gvec_and, 0112) > +#define gen_vpand_xmm(

Re: [Qemu-devel] [RFC] virtio-mmio: implement modern (v2) personality (virtio-1)

On Wed, Jul 31, 2019 at 02:22:09PM +0200, Sergio Lopez wrote: > > Michael S. Tsirkin writes: > > > On Mon, Jul 29, 2019 at 02:57:55PM +0200, Sergio Lopez wrote: > >> Implement the modern (v2) personality, according to the VirtIO 1.0 > >> specification. > >> > >> Support for v2 among guests is n

Re: [Qemu-devel] [PATCH for-4.2 v10 11/15] virtio-iommu: Expose the IOAPIC MSI reserved region when relevant

On Tue, Jul 30, 2019 at 11:20:44PM +, Tian, Kevin wrote: > > From: Michael S. Tsirkin [mailto:m...@redhat.com] > > Sent: Wednesday, July 31, 2019 3:38 AM > > > > On Tue, Jul 30, 2019 at 07:21:33PM +0200, Eric Auger wrote: > > > We introduce a new msi_bypass field which indicates whether > > >

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bo...@gmail.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec M

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bo...@gmail.com/ Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190731175702.4916-1-jan.bo...@gmail.com Type: series Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimpl

Re: [Qemu-devel] [PATCH v5 1/5] 9p: unsigned type for type, version, path

On Wed, 3 Jul 2019 12:55:45 +0200 Christian Schoenebeck via Qemu-devel wrote: > There is no need for signedness on these QID fields for 9p. > > Signed-off-by: Antonios Motakis > [CS: - Also make QID type unsigned. > - Adjust donttouch_stat() to new types. > - Adjust trace-events to ne

Re: [Qemu-devel] [RFC PATCH v1 07/22] target/i386: add vector register file alignment constraints

On 7/31/19 10:56 AM, Jan Bobek wrote: > gvec operations require that all vectors be aligned on 16-byte > boundary; make sure the MM/XMM/YMM/ZMM register file is aligned as > neccessary. > > Signed-off-by: Jan Bobek > --- > target/i386/cpu.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deleti

Re: [Qemu-devel] [RFC PATCH v1 05/22] target/i386: introduce gen_ld_modrm_* helpers

On 7/31/19 10:56 AM, Jan Bobek wrote: > These help with decoding/loading ModR/M vector operands; the operand's > register offset is returned, which is suitable for use with gvec > infrastructure. > > Signed-off-by: Jan Bobek > --- > target/i386/translate.c | 47 ++

Re: [Qemu-devel] [RFC] virtio-mmio: implement modern (v2) personality (virtio-1)

On Wed, Jul 31, 2019 at 03:55:51PM +0200, Cornelia Huck wrote: > On Tue, 30 Jul 2019 16:18:52 -0400 > "Michael S. Tsirkin" wrote: > > > On Tue, Jul 30, 2019 at 03:14:00PM +0200, Cornelia Huck wrote: > > > On Tue, 30 Jul 2019 14:17:48 +0200 > > > Andrea Bolognani wrote: > > > > > > > On Tue, 2

Re: [Qemu-devel] [PATCH 1/5] virtiofsd: take lo->mutex around lo_add_fd_mapping()

* Stefan Hajnoczi (stefa...@redhat.com) wrote: > The lo_add_fd_mapping() function assumes lo->mutex is held, so we should > acquire it. > > Signed-off-by: Stefan Hajnoczi Thanks, applied Would it make sense for me to squash this into: virtiofsd: passthrough_ll: add fd_map to hide file descr

[Qemu-devel] [Bug 1821006] Re: qemu: Unsupported syscall: 382

Hello. As far as I can tell, this is still an issue with the latest available ubuntu, 18.04.2, which has: version 2.11.1(Debian 1:2.11+dfsg- 1ubuntu7.15) Anyone know where I could get a newer version that would be compatible with Ubuntu? -- You received this bug notification because you are a m

Re: [Qemu-devel] [EXTERNAL][PATCH for 4.2 v4 12/12] linux-user: Add support for semtimedop() syscall

> From: Aleksandar Rikalo > > Add support for semtimedop() emulation. It is based on invocation > of safe_semtimedop(). Hi, Laurent, Aleksandar R. is considering submitting this part too: diff --git a/linux-user/syscall.c b/linux-user/syscall.c index b5bc6e4..0e56b8d 100644 --- a/linux-user/sy

[Qemu-devel] [PATCH for 4.2 v4 10/12] linux-user: Add support for HDIO_GET_BUSSTATE and HDIO_SET_BUSSTATE ioctls

From: Aleksandar Markovic Add support for HDIO_GET_BUSSTATE and HDIO_SET_BUSSTATE ioctls. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h | 2 ++ linux-user/syscall_defs.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index b9

[Qemu-devel] [PATCH for 4.2 v4 08/12] linux-user: Add support for HDIO_GET_ACOUSTIC and HDIO_SET_ACOUSTIC ioctls

From: Aleksandar Markovic Add support for HDIO_GET_ACOUSTIC and HDIO_SET_ACOUSTIC ioctls. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h | 2 ++ linux-user/syscall_defs.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index b5

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bo...@gmail.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec M

[Qemu-devel] [PATCH for 4.2 v4 06/12] linux-user: Add support for HDIO_GET_NICE and HDIO_SET_NICE ioctls

From: Aleksandar Markovic Add support for HDIO_GET_NICE and HDIO_SET_NICE ioctls. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h | 2 ++ linux-user/syscall_defs.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index 6551938..8

[Qemu-devel] [PATCH for 4.2 v4 12/12] linux-user: Add support for semtimedop() syscall

From: Aleksandar Rikalo Add support for semtimedop() emulation. It is based on invocation of safe_semtimedop(). Conversion is left out of safe_semtimedop(), since other safe_xxx() usually don't contain similar conversions. Signed-off-by: Aleksandar Rikalo Signed-off-by: Aleksandar Markovic --

[Qemu-devel] [PATCH for 4.2 v4 09/12] linux-user: Add support for HDIO_GET_ADDRESS and HDIO_SET_ADDRESS ioctls

From: Aleksandar Markovic Add support for HDIO_GET_ADDRESS and HDIO_SET_ADDRESS ioctls. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h | 2 ++ linux-user/syscall_defs.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index c9b8

[Qemu-devel] [PATCH for 4.2 v4 11/12] linux-user: Add support for RNDRESEEDCRNG ioctl

From: Aleksandar Markovic RNDRESEEDCRNG is a newer ioctl (added in kernel 4.17), and an "ifdef" guard is used for that reason in this patch. Signed-off-by: Aleksandar Markovic Reviewed-by: Laurent Vivier --- linux-user/ioctls.h | 3 +++ linux-user/syscall_defs.h | 1 + 2 files changed,

[Qemu-devel] [PATCH for 4.2 v4 05/12] linux-user: Add support for FDSETEMSGTRESH, FDSETMAXERRS, and FDGETMAXERRS ioctls

From: Aleksandar Markovic FDSETEMSGTRESH, FDSETMAXERRS, and FDGETMAXERRS ioctls are commands for controlling error reporting of a floppy drive. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h| 2 ++ linux-user/syscall_defs.h | 19 +++ linux-user/syscall_typ

[Qemu-devel] [PATCH for 4.2 v4 07/12] linux-user: Add support for HDIO_GET_WCACHE and HDIO_SET_WCACHE ioctls

From: Aleksandar Markovic Add support for HDIO_GET_WCACHE and HDIO_SET_WCACHE ioctls. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h | 2 ++ linux-user/syscall_defs.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index 895ba3

[Qemu-devel] [PATCH for 4.2 v4 04/12] linux-user: Add support for FDFMTBEG, FDFMTTRK, and FDFMTEND ioctls

From: Aleksandar Markovic FDFMTBEG, FDFMTTRK, and FDFMTEND ioctls provide means for controlling formatting of a floppy drive. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h| 3 +++ linux-user/syscall_defs.h | 3 +++ linux-user/syscall_types.h | 5 + 3 files changed, 11

[Qemu-devel] [PATCH for 4.2 v4 03/12] linux-user: Add support for FDRESET, FDRAWCMD, FDTWADDLE, and FDEJECT ioctls

From: Aleksandar Markovic FDRESET, FDRAWCMD, FDTWADDLE, and FDEJECT ioctls are misc commands for controlling a floppy drive. Signed-off-by: Aleksandar Markovic --- linux-user/ioctls.h | 4 linux-user/syscall_defs.h | 4 2 files changed, 8 insertions(+) diff --git a/linux-user/

[Qemu-devel] [PATCH for 4.2 v4 02/12] linux-user: Add support for FDMSGON and FDMSGOFF ioctls

From: Aleksandar Markovic FDMSGON and FDMSGOFF switch informational messages of floppy drives on and off. Signed-off-by: Aleksandar Markovic Reviewed-by: Laurent Vivier --- linux-user/ioctls.h | 2 ++ linux-user/syscall_defs.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/linux

[Qemu-devel] [PATCH for 4.2 v4 01/12] linux user: Add support for FDFLUSH ioctl

From: Yunqiang Su FDFLUSH is used for flushing buffers of floppy drives. Support in QEMU is needed because some of Debian packages use this ioctl while running post-build tests. One such example is 'tar' package. Signed-off-by: Yunqiang Su Signed-off-by: Aleksandar Markovic Reviewed-by: Lauren

[Qemu-devel] [PATCH for 4.2 v4 00/12] linux-user: Misc patches for 4.2

From: Aleksandar Markovic A set of misc linux user patches for 4.2. v2->v3: - reworked the patch on semtimedop() - added five patches containing support for ten additional ioctls - minor improvements of code formatting v2->v3: - minor code formatting improvements - added a patch

Re: [Qemu-devel] [ANNOUNCE] QEMU 4.1.0-rc3 is now available

On Wed, 31 Jul 2019 at 19:05, Philippe Mathieu-Daudé wrote: > > > Unless there are any release critical bugs discovered, this > > will be the last release candidate before final release of 4.1.0 > > on the 6th August. Otherwise we'll do an rc4 and release on > > the 13th August. > > We for

Re: [Qemu-devel] [ANNOUNCE] QEMU 4.1.0-rc3 is now available

> Unless there are any release critical bugs discovered, this > will be the last release candidate before final release of 4.1.0 > on the 6th August. Otherwise we'll do an rc4 and release on > the 13th August. We forgot to update the slirp submodule :( Does that mean we need a rc4? Thank

[Qemu-devel] [RFC PATCH v1 21/22] target/i386: reimplement (V)PMAXUB

Use the gvec infrastructure to achieve the desired functionality. Signed-off-by: Jan Bobek --- target/i386/ops_sse.h| 4 target/i386/ops_sse_header.h | 2 -- target/i386/translate.c | 12 +++- 3 files changed, 11 insertions(+), 7 deletions(-) diff --git a/target/i386

[Qemu-devel] [RFC PATCH v1 20/22] target/i386: reimplement (V)PMAXSW

Use the gvec infrastructure to achieve the desired functionality. Signed-off-by: Jan Bobek --- target/i386/ops_sse.h| 3 --- target/i386/ops_sse_header.h | 2 -- target/i386/translate.c | 12 +++- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/target/i386/

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