Ping for comments :)
On 7/16/2019 10:51 PM, Tao Xu wrote:
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache attributes and bandwidth and latency details,
related to
On Fri, Jul 19, 2019 at 2:12 AM Stefan Weil wrote:
>
> Signed-off-by: Stefan Weil
Reviewed-by: Marc-André Lureau
> ---
> audio/audio.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/audio/audio.c b/audio/audio.c
> index 5fd9a58a80..a7a13e900a 100644
> --- a/audio/audio.c
> +++ b/a
The pseries guests do not normally allocate PCI resources and rely on
the system firmware doing so. Furthermore at least at some point in
the past the pseries guests won't even allowed to change BARs, probably
it is still the case for phyp. So since the initial commit we have [1]
which prevents res
On Fri, Jul 19, 2019 at 12:45:55PM +1000, Alexey Kardashevskiy wrote:
> I messed up with my local git so reposting.
>
> The following changes since commit 216965b20b04fbf74e0ce3a3175a9171dba210de:
>
> ppc/pnv: update skiboot to v6.4 (2019-07-18 16:49:57 +1000)
>
> are available in the Git repo
I messed up with my local git so reposting.
The following changes since commit 216965b20b04fbf74e0ce3a3175a9171dba210de:
ppc/pnv: update skiboot to v6.4 (2019-07-18 16:49:57 +1000)
are available in the Git repository at:
g...@github.com:aik/qemu.git tags/qemu-slof-20190719
for you to fetch
On Fri, Jul 19, 2019 at 09:12:16AM +1000, Nicholas Piggin wrote:
> Greg Kurz's on July 18, 2019 8:13 pm:
> > On Thu, 18 Jul 2019 13:42:11 +1000
> > Nicholas Piggin wrote:
> >
> >> Implement cpu_exec_enter/exit on ppc which calls into new methods of
> >> the same name in PPCVirtualHypervisorClass.
On Thu, Jul 18, 2019 at 09:20:56AM +0200, Thomas Huth wrote:
> On 16/07/2019 07.35, Alexey Kardashevskiy wrote:
> > SLOF implements one itself so let's remove it from QEMU. It is one less
> > image and simpler setup as the RTAS blob never stays in its initial place
> > anyway as the guest OS always
Hi All:
I have 2 questions about (un)hotplug on pcie-root-port.
First Question (hotplug failure because of redundant PCI_EXP_LNKSTA_DLLLA bit
set):
during VM boot, qemu sets PCI_EXP_LNKSTA_DLLLA according to this process:
pcie_cap_init() -> pcie_cap_v1_fill(),
even if there's no p
From: Alistair Francis
Add OpenSBI version 0.4 as a git submodule and as a prebult binary.
OpenSBI (https://github.com/riscv/opensbi) aims to provide an open-source
reference implementation of the RISC-V Supervisor Binary Interface (SBI)
specifications for platform-specific firmwares executing i
The following changes since commit 0b18cfb8f1828c905139b54c8644b0d8f4aad879:
Update version for v4.1.0-rc1 release (2019-07-16 18:01:28 +0100)
are available in the Git repository at:
git://github.com/palmer-dabbelt/qemu.git tags/riscv-for-master-4.1-rc2
for you to fetch changes up to fdd1bd
From: Alistair Francis
If the user hasn't specified a firmware to load (with -bios) or
specified no bios (with -bios none) then load OpenSBI by default. This
allows users to boot a RISC-V kernel with just -kernel.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Tested-by: Bin Meng
Revie
On Thu, Jul 18, 2019 at 10:15:52PM +0200, Ivan Warren wrote:
>
> Le 7/18/2019 à 7:19 PM, Greg Kurz a écrit :
> > We usually mention the subsystem name in the subject, ie.
> >
> > target/ppc: Allow bit 15 to be set to 1 on slbmfee and slbmfev
> Gotcha ! Still learning the process as I go. Next tim
> -Original Message-
> From: Philippe Mathieu-Daudé [mailto:phi...@redhat.com]
> Sent: Thursday, July 18, 2019 6:54 PM
> To: Peter Maydell
> Cc: Zhang, Chen ; Li Zhijian ;
> Jason Wang ; qemu-dev ;
> Zhang Chen
> Subject: Re: [Qemu-devel] [PATCH V3] net/colo-compare.c: Fix memory leak
>
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Thursday, July 18, 2019 9:42 PM
> To: Zhang, Chen
> Cc: Li Zhijian ; Jason Wang ;
> qemu-dev ; Zhang Chen
> Subject: Re: [PATCH V3] net/colo-compare.c: Fix memory leak and code style
> issue.
>
> On Thu
The following changes since commit 5a30afd844be309a820658d956720356ec1d9769:
ppc/pnv: update skiboot to v6.4 (2019-07-19 11:46:31 +1000)
are available in the Git repository at:
g...@github.com:aik/qemu.git tags/qemu-slof-20190719
for you to fetch changes up to 2ef7bff0a1aa90bb449c2edac553fe
Thanks for all your comments. I'm going to write a simple demo to go
through the whole workflow first, and then adjust the policies following
the conclusions of our discussion.
Heyi
On 2019/7/16 16:47, Dave Martin wrote:
On Mon, Jul 15, 2019 at 03:44:46PM +0100, Mark Rutland wrote:
On Mon,
On Fri, Jul 19, 2019 at 02:39:10AM +0800, Kirti Wankhede wrote:
>
>
> On 7/12/2019 6:03 AM, Yan Zhao wrote:
> > On Tue, Jul 09, 2019 at 05:49:18PM +0800, Kirti Wankhede wrote:
> >> Dirty page tracking (.log_sync) is part of RAM copying state, where
> >> vendor driver provides the bitmap of pages
On Fri, Jul 19, 2019 at 02:32:33AM +0800, Kirti Wankhede wrote:
>
> On 7/12/2019 6:02 AM, Yan Zhao wrote:
> > On Fri, Jul 12, 2019 at 03:08:31AM +0800, Kirti Wankhede wrote:
> >>
> >>
> >> On 7/11/2019 9:53 PM, Dr. David Alan Gilbert wrote:
> >>> * Yan Zhao (yan.y.z...@intel.com) wrote:
> On
On 18/07/2019 20:49, Thomas Huth wrote:
On 18/07/2019 12.40, Greg Kurz wrote:
On Thu, 18 Jul 2019 17:55:12 +1000
Alexey Kardashevskiy wrote:
On 18/07/2019 17:20, Thomas Huth wrote:
On 16/07/2019 07.35, Alexey Kardashevskiy wrote:
SLOF implements one itself so let's remove it from QEMU.
On 7/18/19 5:26 AM, Paolo Bonzini wrote:
> On 18/07/19 11:17, Philippe Mathieu-Daudé wrote:
>> The 'piix3-ide' (and 'piix3-ide-xen') devices are part of the
>> PIIX3 chipset modelled as TYPE_PIIX3_PCI_DEVICE (respectivelly
>> TYPE_PIIX3_XEN_DEVICE). The PIIX3 chipset can not be created
>> in par
this series seems to provide a more complete fix
https://patchwork.ozlabs.org/cover/1131259/
On 7/15/19 12:06 PM, Andrey Shinkevich wrote:
> The Valgrind tool reports about the uninitialised buffer 'buf'
> instantiated on the stack of the function guess_disk_lchs().
> Pass 'read-zeroes=on' to the null block driver to make it deterministic.
> The output of the tests 051, 186 and 227 now
On 7/17/2019 3:07 AM, Alex Williamson wrote:
> On Tue, 9 Jul 2019 15:19:12 +0530
> Kirti Wankhede wrote:
>
>> - Migration functions are implemented for VFIO_DEVICE_TYPE_PCI device in this
>> patch series.
>> - VFIO device supports migration or not is decided based of migration region
>> qu
Paolo Bonzini's on July 18, 2019 9:08 pm:
> On 18/07/19 12:39, Nicholas Piggin wrote:
>> Any comments on this series would be welcome. Hopefully someone who
>> knows i386 can give some feedback on the possible bug fix, and
>> whether the new wakeup method will suit i386.
>
> Looks good, though onl
Christian Borntraeger's on July 18, 2019 9:27 pm:
>
>
> On 18.07.19 13:06, Paolo Bonzini wrote:
>> On 18/07/19 12:39, Nicholas Piggin wrote:
>>> Commit 1405819637f53 ("qmp: don't emit the RESET event on wakeup from
>>> S3") changed system wakeup to avoid calling qapi_event_send_reset.
>>> Commit
Greg Kurz's on July 18, 2019 8:13 pm:
> On Thu, 18 Jul 2019 13:42:11 +1000
> Nicholas Piggin wrote:
>
>> Implement cpu_exec_enter/exit on ppc which calls into new methods of
>> the same name in PPCVirtualHypervisorClass. These are used by spapr
>> to implement the splpar VPA dispatch counter init
On 07/18/19 14:59, Peter Maydell wrote:
> In arm_cpu_realizefn() we make several assertions about the values of
> guest ID registers:
> * if the CPU provides AArch32 v7VE or better it must advertise the
>ARM_DIV feature
> * if the CPU provides AArch32 A-profile v6 or better it must
>adver
Indeed I think gemu_log() is the problem here.
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1828723
Title:
[RFE] option to suppress gemu_log() output
Status in QEMU:
New
Bug description:
Wit
Signed-off-by: Stefan Weil
---
crypto/hash-nettle.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/crypto/hash-nettle.c b/crypto/hash-nettle.c
index 96f186f442..074cece468 100644
--- a/crypto/hash-nettle.c
+++ b/crypto/hash-nettle.c
@@ -28,10 +28,10 @@
typedef void (*q
Signed-off-by: Stefan Weil
---
audio/audio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/audio/audio.c b/audio/audio.c
index 5fd9a58a80..a7a13e900a 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -304,6 +304,7 @@ void audio_pcm_init_info (struct audio_pcm_info *info,
struct audsettin
Patchew URL: https://patchew.org/QEMU/20190718115420.19919-1-...@kaod.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker
On 7/18/19 8:38 PM, Laszlo Ersek wrote:
> On 07/18/19 17:03, Laszlo Ersek wrote:
>> On 07/18/19 12:48, Philippe Mathieu-Daudé wrote:
>>> To avoid incoherent states when the machine resets (see but report
>>
>> (1) For the PULL request, please fix the typo: s/but/bug/
>>
>>> below), add the device r
Le 7/18/2019 à 7:19 PM, Greg Kurz a écrit :
We usually mention the subsystem name in the subject, ie.
target/ppc: Allow bit 15 to be set to 1 on slbmfee and slbmfev
Gotcha ! Still learning the process as I go. Next time I submit
something, I'll follow the guidelines more accurately.
On Thu,
On Thu, Jul 18, 2019 at 07:14:23PM +0300, Evgeny Yakovlev wrote:
> When very large regions (32GB sized in our case, PCI pass-through of GPUs)
> are compared substraction result does not fit into gint.
>
> As a result crs_replace_with_free_ranges does not get sorted ranges and
> incorrectly compute
On 07/18/19 14:30, Peter Maydell wrote:
> On Wed, 17 Jul 2019 at 16:08, Laszlo Ersek wrote:
>>
>> On 07/17/19 15:46, Peter Maydell wrote:
>>> On Wed, 17 Jul 2019 at 14:36, Philippe Mathieu-Daudé
>>> wrote:
I still wonder why this didn't assert on Peter's setup.
>>>
>>> My setup does not ass
On 7/12/2019 8:22 AM, Yan Zhao wrote:
> On Tue, Jul 09, 2019 at 05:49:17PM +0800, Kirti Wankhede wrote:
>> Flow during _RESUMING device state:
>> - If Vendor driver defines mappable region, mmap migration region.
>> - Load config state.
>> - For data packet, till VFIO_MIG_FLAG_END_OF_STATE is no
On 7/16/2019 9:59 PM, Cornelia Huck wrote:
> On Tue, 9 Jul 2019 15:19:09 +0530
> Kirti Wankhede wrote:
>
>> This function is used in follwing patch in this series.
>
> "This function will be used for the migration region." ?
>
> ("This series" will be a bit confusing when this has been merge
On 7/12/2019 8:14 AM, Yan Zhao wrote:
> On Tue, Jul 09, 2019 at 05:49:16PM +0800, Kirti Wankhede wrote:
>> Added .save_live_pending, .save_live_iterate and .save_live_complete_precopy
>> functions. These functions handles pre-copy and stop-and-copy phase.
>>
>> In _SAVING|_RUNNING device state o
On 7/12/2019 6:03 AM, Yan Zhao wrote:
> On Tue, Jul 09, 2019 at 05:49:18PM +0800, Kirti Wankhede wrote:
>> Dirty page tracking (.log_sync) is part of RAM copying state, where
>> vendor driver provides the bitmap of pages which are dirtied by vendor
>> driver through migration region and as part
On 07/18/19 17:03, Laszlo Ersek wrote:
> On 07/18/19 12:48, Philippe Mathieu-Daudé wrote:
>> To avoid incoherent states when the machine resets (see but report
>
> (1) For the PULL request, please fix the typo: s/but/bug/
>
>> below), add the device reset callback.
>>
>> A "system reset" sets the
On 7/12/2019 6:02 AM, Yan Zhao wrote:
> On Fri, Jul 12, 2019 at 03:08:31AM +0800, Kirti Wankhede wrote:
>>
>>
>> On 7/11/2019 9:53 PM, Dr. David Alan Gilbert wrote:
>>> * Yan Zhao (yan.y.z...@intel.com) wrote:
On Thu, Jul 11, 2019 at 06:50:12PM +0800, Dr. David Alan Gilbert wrote:
> * Ya
** Description changed:
tag: v4.1.0-rc1
./configure --enable-sanitizers --extra-cflags=-O1
- ==26130==ERROR: UndefinedBehaviorSanitizer: SEGV on unknown address
0x0008 (pc 0x0046d588 bp 0x7fff6ee9f940 sp 0x7fff6ee9f8e8 T26130)
+ ==26130==ERROR: UndefinedBehaviorSanitizer: SE
Public bug reported:
tag: v4.1.0-rc1
./configure --enable-sanitizers --extra-cflags=-O1
==26130==ERROR: UndefinedBehaviorSanitizer: SEGV on unknown address
0x0008 (pc 0x0046d588 bp 0x7fff6ee9f940 sp 0x7fff6ee9f8e8 T26130)
==26130==The signal is caused by a WRITE memory access.
==261
On 7/18/19 6:20 AM, no-re...@patchew.org wrote:
> PASS 17 test-bdrv-drain /bdrv-drain/graph-change/drain_all
> =
> ==10263==ERROR: AddressSanitizer: heap-use-after-free on address
> 0x6122c1f0 at pc 0x555fd5bd7cb6 bp 0x7f3e853b
We usually mention the subsystem name in the subject, ie.
target/ppc: Allow bit 15 to be set to 1 on slbmfee and slbmfev
On Thu, 18 Jul 2019 14:44:49 +0200
Ivan Warren wrote:
> Allow bit 15 to be 1 in the slbmfee and slbmfev in TCG
> as per Power ISA 3.0B (Power 9) Book III pages 1029 and 1030.
On Thu, Jul 18, 2019 at 11:34 PM Alistair Francis
wrote:
> On Thu, Jul 18, 2019 at 8:00 AM Chih-Min Chao
> wrote:
> >
> >
> >
> > On Thu, Jul 18, 2019 at 6:47 AM Alistair Francis
> wrote:
> >>
> >> On Tue, Jul 16, 2019 at 10:21 PM Chih-Min Chao
> wrote:
> >> >
> >> >
> >> >
> >> > On Wed, Jul
On Thu, 18 Jul 2019 10:21:28 -0500
Shivaprasad G Bhat wrote:
> The current code is broken for more than vcpu as
> each thread would overwrite and there were memory leaks.
>
> Make it part of PowerPCCPU so that every thread has a
> separate one. Avoid using the timer_new_ns which is
> not the pre
When very large regions (32GB sized in our case, PCI pass-through of GPUs)
are compared substraction result does not fit into gint.
As a result crs_replace_with_free_ranges does not get sorted ranges and
incorrectly computes PCI64 free space regions. Which then makes linux
guest complain about dev
Patchew URL:
https://patchew.org/QEMU/1563464932-24284-1-git-send-email-wr...@yandex-team.ru/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH] i386/acpi: fix gint overflow in crs_range_compare
Message-i
When very large regions (32GB sized in our case, PCI pass-through of GPUs)
are compared substraction result does not fit into gint.
As a result crs_replace_with_free_ranges does not get sorted ranges and
incorrectly computes PCI64 free space regions. Which then makes linux
guest complain about dev
On 18/07/19 16:34, Sergio Lopez wrote:
> I've just added support for starting the machine from SeaBIOS (Stefan
> Hajnoczi pointed in another thread that it can be as fast as qboot, and
> given that the latter doesn't support mptables, I just tested this
> one). I tried to keep it as minimalistic as
Patchew URL:
https://patchew.org/QEMU/20190718091726.9874-1-yury-ko...@yandex-team.ru/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bas
On Thu, Jul 18, 2019 at 8:00 AM Chih-Min Chao wrote:
>
>
>
> On Thu, Jul 18, 2019 at 6:47 AM Alistair Francis wrote:
>>
>> On Tue, Jul 16, 2019 at 10:21 PM Chih-Min Chao
>> wrote:
>> >
>> >
>> >
>> > On Wed, Jul 17, 2019 at 6:59 AM Alistair Francis
>> > wrote:
>> >>
>> >> On Tue, Jul 16, 2019
On Wed, 17 Jul 2019 17:04:54 +0200
Paolo Bonzini wrote:
> On 17/07/19 16:54, Collin Walling wrote:
> > PCI host plugging will check for the MSI-X capability on the
> > PCI device. If the MSI-X cap is missing, we fail device plugging.
> > We do not check for MSI. Only MSI-X.
> >
> > Specifically,
Evgeny Yakovlev
Lead Software Engineer, Yandex.Cloud Hypervisor Team
On 18.07.2019 17:59, Kevin Wolf wrote:
Am 18.07.2019 um 15:52 hat Евгений Яковлев geschrieben:
Hi everyone,
My previous message was misformatted, so here's another one. Sorry about
that.
We're currently working on implemen
Stefan Hajnoczi writes:
> On Tue, Jul 02, 2019 at 02:11:02PM +0200, Sergio Lopez wrote:
>> Microvm is a machine type inspired by both NEMU and Firecracker, and
>> constructed after the machine model implemented by the latter.
>>
>> It's main purpose is providing users a KVM-only machine type wi
The current code is broken for more than vcpu as
each thread would overwrite and there were memory leaks.
Make it part of PowerPCCPU so that every thread has a
separate one. Avoid using the timer_new_ns which is
not the preferred way to create timers.
Signed-off-by: Shivaprasad G Bhat
---
v2: h
** Changed in: qemu
Status: New => Confirmed
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1815423
Title:
x86_64 TCG: Incorrect floating point cast to int.
Status in QEMU:
Confirmed
Bug
On 07/18/19 12:48, Philippe Mathieu-Daudé wrote:
> To avoid incoherent states when the machine resets (see but report
(1) For the PULL request, please fix the typo: s/but/bug/
> below), add the device reset callback.
>
> A "system reset" sets the device state machine in READ_ARRAY mode
> and, af
A fix for this was committed as abcac736c1505254ec3 and will be in the
upcoming 4.1 release.
** Changed in: qemu
Status: In Progress => Fix Committed
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/b
This might be the same underlying problem as LP:1815423 which also
mentions some issues with Javascript calculations involving arithmetic
operations on a js "undefined" value. That bug has a C-only reproduce
case so is probably a good place to start for anybody interesting in
investigating and fixi
On Thu, Jul 18, 2019 at 6:47 AM Alistair Francis
wrote:
> On Tue, Jul 16, 2019 at 10:21 PM Chih-Min Chao
> wrote:
> >
> >
> >
> > On Wed, Jul 17, 2019 at 6:59 AM Alistair Francis
> wrote:
> >>
> >> On Tue, Jul 16, 2019 at 2:50 PM Philippe Mathieu-Daudé
> >> wrote:
> >> >
> >> > On 7/16/19 10:4
Am 18.07.2019 um 15:52 hat Евгений Яковлев geschrieben:
> Hi everyone,
>
> My previous message was misformatted, so here's another one. Sorry about
> that.
>
> We're currently working on implementing a qemu BDRV format driver which we
> are using with virtio-blk devices.
>
> I have a question co
On 7/18/19 5:59 AM, Peter Maydell wrote:
> In arm_cpu_realizefn() we make several assertions about the values of
> guest ID registers:
> * if the CPU provides AArch32 v7VE or better it must advertise the
>ARM_DIV feature
> * if the CPU provides AArch32 A-profile v6 or better it must
>adve
Am 18.07.2019 um 15:47 schrieb Philippe Mathieu-Daudé:
> On 7/18/19 3:16 PM, Peter Maydell wrote:
>> If configure detects that it's being run on a source tree which
>> is missing git modules, it prints an error messages suggesting
>> that the user downloads a correct source archive from the project
** Summary changed:
- Incorrect floating point cast to int.
+ x86_64 TCG: Incorrect floating point cast to int.
--
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https://bugs.launchpad.net/bugs/1815423
Title:
x86_64 TCG: Incorrect f
** Changed in: qemu
Status: New => In Progress
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https://bugs.launchpad.net/bugs/1830864
Title:
Assertion `no_aa32 || ({ ARMCPU *cpu_ = (cpu);
isar_feature_arm_div(&cpu_->isar)
On 7/17/19 11:01 PM, tony.ngu...@bt.com wrote:
> This patch moves the define of target access alignment earlier from
> target/foo/cpu.h to configure.
>
> Suggested in Richard Henderson's reply to "[PATCH 1/4] tcg: TCGMemOp is now
> accelerator independent MemOp"
>
> Signed-off-by: Tony Nguyen
>
I can boot a KVM guest (either with the debian stretch qemu-system-arm
2.8.1, or with a head-of-upstream-git QEMU), which wouldn't work with
EL3 enabled, so I'm not sure what is going wrong for you. To try to
debug this further you'd need to build QEMU from source and start
running it under the deb
Sergio Lopez writes:
> Paolo Bonzini writes:
>
>> On 02/07/19 12:52, Sergio Lopez wrote:
>>> As I said, I'm also in favor of microvm supporting booting from
>>> firmware in the future, as long we keep the simple mode too.
>>
>> The simple mode adds code to QEMU's x86 target that only exists to
Public bug reported:
Hello.
I was trying to debug this segfault:
https://lists.nongnu.org/archive/html/qemu-ppc/2019-07/msg00186.html
I recompiled latest qemu from git (commit
0b18cfb8f1828c905139b54c8644b0d8f4aad879 ), using this configure line:
./configure --target-list=i386-softmmu,x86_64-so
Hi everyone,
My previous message was misformatted, so here's another one. Sorry about
that.
We're currently working on implementing a qemu BDRV format driver which
we are using with virtio-blk devices.
I have a question concerning BDRV request fragmentation and virtio-blk
write request sub
On 18/07/19 15:45, Denis V. Lunev wrote:
> There are the following flags available in libvirt inside cpu_map.xm
>
>
>
>
>
>
> We have faced the problem that QEMU does not start once these flags are
> present in the domain.xml.
>
> This patch just adds proper name
On 7/18/19 3:16 PM, Peter Maydell wrote:
> If configure detects that it's being run on a source tree which
> is missing git modules, it prints an error messages suggesting
> that the user downloads a correct source archive from the project
> website. However https://www.qemu.org/download/ is a link
There are the following flags available in libvirt inside cpu_map.xm
We have faced the problem that QEMU does not start once these flags are
present in the domain.xml.
This patch just adds proper names into the map.
Signed-off-by: Denis V. Lunev
CC: Paolo Bonzi
Hi everyone,
We're currently working on implementing a qemu BDRV format driver which
we are using with virtio-blk devices.
I have a question concerning BDRV request fragmentation and virtio-blk
write request submission which is not entirely clear to me by only
reading virtio spec. Could you
On Thu, 18 Jul 2019 at 10:27, Zhang Chen wrote:
>
> From: Zhang Chen
>
> This patch to fix the origin "char *data" menory leak, code style issue
> and add necessary check here.
> Reported-by: Coverity (CID 1402785)
>
> Signed-off-by: Zhang Chen
> ---
> net/colo-compare.c | 28 ++
On 18/07/2019 15.16, Peter Maydell wrote:
> If configure detects that it's being run on a source tree which
> is missing git modules, it prints an error messages suggesting
> that the user downloads a correct source archive from the project
> website. However https://www.qemu.org/download/ is a lin
If configure detects that it's being run on a source tree which
is missing git modules, it prints an error messages suggesting
that the user downloads a correct source archive from the project
website. However https://www.qemu.org/download/ is a link to a
page with multiple tabs, with the default b
On Thu, 18 Jul 2019 at 12:50, Stefan Weil wrote:
>
> Am 18.07.2019 um 13:29 schrieb Thomas Huth:
> > I guess we should simply re-arrange the order of the tabs ... the
> > OS-agnostic source code tab should come first (since this is about what
> > we provide for download on our site), and then the
On 18/07/19 14:49, Daniel P. Berrangé wrote:
> On Thu, Jul 18, 2019 at 04:04:13PM +0400, Marc-André Lureau wrote:
>> Our module system does not support Windows, because it relies on
>> resolving symbols from the main executable.
>>
>> If there is enough interest in supporting modules on Windows, we
On Tue, 16 Jul 2019 16:38:16 +0100
Shameer Kolothum wrote:
> From: Eric Auger
>
> PCDIMM hotplug addition updated the DSDT. Update the reference table.
it's not correct process. series should be merged through Michael's pci branch
and see
commit ab50f22309a17c772c51931940596e707c200739 (mst/pc
This happens because:
* the host kernel is older than 4.15 and does not expose ID registers to
userspace via the KVM_GET_ONE_REG ioctl
* our fallback set of ID register values in target/arm/kvm64.c
kvm_arm_get_host_cpu_features() is extremely minimalist
* the consistency checks on ID register
From: Daniel P. Berrangé
The SIOCGSTAMP symbol was previously defined in the
asm-generic/sockios.h header file. QEMU sees that header
indirectly via sys/socket.h
In linux kernel commit 0768e17073dc527ccd18ed5f96ce85f9985e9115
the asm-generic/sockios.h header no longer defines SIOCGSTAMP.
Instead
On Tue, 16 Jul 2019 16:38:14 +0100
Shameer Kolothum wrote:
> This adds support to use GED for system power down event.
[...]
> @@ -232,6 +238,13 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev,
> AcpiEventStatusBits ev)
> acpi_ged_event(s, sel);
> }
>
> +static void acpi_ged_pm_po
On 18/07/2019 08:16, David Gibson wrote:
> On Thu, Jul 18, 2019 at 03:12:17PM +0930, Joel Stanley wrote:
>> Currently we fail to boot a qemu powernv machine with a Power9
>> processor:
>>
>> PLAT: Detected generic platform
>> PLAT: Detected BMC platform generic
>> CPU: All 1 processors called in
On Tue, 16 Jul 2019 16:38:15 +0100
Shameer Kolothum wrote:
> Use GED for system_powerdown event instead of GPIO for ACPI.
> Guest boot with DT still uses GPIO.
I'd hate to keep ACPI GPIO around but taking in account migration
wouldn't this patch break ACPI GPIO based button on 4.0 and older wh
In arm_cpu_realizefn() we make several assertions about the values of
guest ID registers:
* if the CPU provides AArch32 v7VE or better it must advertise the
ARM_DIV feature
* if the CPU provides AArch32 A-profile v6 or better it must
advertise the Jazelle feature
These are essentially cons
On 18/07/19 14:04, Marc-André Lureau wrote:
> Our module system does not support Windows, because it relies on
> resolving symbols from the main executable.
>
> If there is enough interest in supporting modules on Windows, we could
> generate an import library for the executable and link with it:
On Thu, Jul 18, 2019 at 04:04:13PM +0400, Marc-André Lureau wrote:
> Our module system does not support Windows, because it relies on
> resolving symbols from the main executable.
>
> If there is enough interest in supporting modules on Windows, we could
> generate an import library for the execut
Allow bit 15 to be 1 in the slbmfee and slbmfev in TCG
as per Power ISA 3.0B (Power 9) Book III pages 1029 and 1030.
Per this specification, bit 15 is implementation specific
so it may be 1, but can probably ne safely ignored.
Power ISA 2.07B (Power 7/Power 8) indicates the bit is
reserved but so
On Tue, 16 Jul 2019 16:38:12 +0100
Shameer Kolothum wrote:
> This initializes the GED device with base memory and irq, configures
> ged memory hotplug event and builds the corresponding aml code. With
> this, both hot and cold plug of device memory is enabled now for Guest
> with ACPI boot.
>
>
On Thu, 18 Jul 2019 10:52:10 +
Shameerali Kolothum Thodi wrote:
> Hi Igor,
>
> > -Original Message-
> > From: Qemu-devel
> > [mailto:qemu-devel-bounces+shameerali.kolothum.thodi=huawei.com@nongn
> > u.org] On Behalf Of Igor Mammedov
> > Sent: 17 July 2019 15:33
> > To: Shameerali Kol
On Wed, 17 Jul 2019 at 16:08, Laszlo Ersek wrote:
>
> On 07/17/19 15:46, Peter Maydell wrote:
> > On Wed, 17 Jul 2019 at 14:36, Philippe Mathieu-Daudé
> > wrote:
> >> I still wonder why this didn't assert on Peter's setup.
> >
> > My setup does not assert because my host kernel correctly
> > pro
When dumping the END and NVT tables, the error logging is too noisy.
Signed-off-by: Cédric Le Goater
---
hw/intc/pnv_xive.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index c1501a6b5bce..e7acab0dff51 100644
--- a/hw/intc/pnv_x
This is to track the configuration of the base END index of the vCPU
and the Interrupt Pending Buffer. The NVT IPB is updated when an
interrupt can not be presented to a vCPU.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/pnv_xive.c | 22
On Thu, Jul 18, 2019 at 1:43 PM Daniel P. Berrangé
wrote:
> On Thu, Jul 18, 2019 at 01:29:02PM +0200, Thomas Huth wrote:
> > On 18/07/2019 12.55, Aleksandar Markovic wrote:
> > > On Thu, Jul 18, 2019 at 10:58 AM Philippe Mathieu-Daudé <
> phi...@redhat.com>
> > > wrote:
> > >>
> > >> On 7/18/19 9
If the XIVE presenter can not find the NVT dispatched on any of the HW
threads, it can not deliver the interrupt. XIVE offers an escalation
mechanism to handle such scenarios and inform the hypervisor that an
action should be taken.
Escalation is configured by setting the 'e' bit and the EAS in wo
We will use it to resend missed interrupts when a vCPU context is
pushed a HW thread.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive.h | 1 +
hw/intc/xive.c| 15 +++
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/include/hw/ppc/xive.h b/include/hw/p
Patchew URL:
https://patchew.org/QEMU/1563451264-46176-1-git-send-email-pbonz...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH] curses: assert get_wch return value is okay
Message-id: 1563
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